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https://github.com/RPCSX/llvm.git
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a466b368fe
Lay out trellis-shaped CFGs optimally.
A trellis of the shape below:
A B
|\ /|
| \ / |
| X |
| / \ |
|/ \|
C D
would be laid out A; B->C ; D by the current layout algorithm. Now we identify
trellises and lay them out either A->C; B->D or A->D; B->C. This scales with an
increasing number of predecessors. A trellis is a a group of 2 or more
predecessor blocks that all have the same successors.
because of this we can tail duplicate to extend existing trellises.
As an example consider the following CFG:
B D F H
/ \ / \ / \ / \
A---C---E---G---Ret
Where A,C,E,G are all small (Currently 2 instructions).
The CFG preserving layout is then A,B,C,D,E,F,G,H,Ret.
The current code will copy C into B, E into D and G into F and yield the layout
A,C,B(C),E,D(E),F(G),G,H,ret
define void @straight_test(i32 %tag) {
entry:
br label %test1
test1: ; A
%tagbit1 = and i32 %tag, 1
%tagbit1eq0 = icmp eq i32 %tagbit1, 0
br i1 %tagbit1eq0, label %test2, label %optional1
optional1: ; B
call void @a()
br label %test2
test2: ; C
%tagbit2 = and i32 %tag, 2
%tagbit2eq0 = icmp eq i32 %tagbit2, 0
br i1 %tagbit2eq0, label %test3, label %optional2
optional2: ; D
call void @b()
br label %test3
test3: ; E
%tagbit3 = and i32 %tag, 4
%tagbit3eq0 = icmp eq i32 %tagbit3, 0
br i1 %tagbit3eq0, label %test4, label %optional3
optional3: ; F
call void @c()
br label %test4
test4: ; G
%tagbit4 = and i32 %tag, 8
%tagbit4eq0 = icmp eq i32 %tagbit4, 0
br i1 %tagbit4eq0, label %exit, label %optional4
optional4: ; H
call void @d()
br label %exit
exit:
ret void
}
here is the layout after D27742:
straight_test: # @straight_test
; ... Prologue elided
; BB#0: # %entry ; A (merged with test1)
; ... More prologue elided
mr 30, 3
andi. 3, 30, 1
bc 12, 1, .LBB0_2
; BB#1: # %test2 ; C
rlwinm. 3, 30, 0, 30, 30
beq 0, .LBB0_3
b .LBB0_4
.LBB0_2: # %optional1 ; B (copy of C)
bl a
nop
rlwinm. 3, 30, 0, 30, 30
bne 0, .LBB0_4
.LBB0_3: # %test3 ; E
rlwinm. 3, 30, 0, 29, 29
beq 0, .LBB0_5
b .LBB0_6
.LBB0_4: # %optional2 ; D (copy of E)
bl b
nop
rlwinm. 3, 30, 0, 29, 29
bne 0, .LBB0_6
.LBB0_5: # %test4 ; G
rlwinm. 3, 30, 0, 28, 28
beq 0, .LBB0_8
b .LBB0_7
.LBB0_6: # %optional3 ; F (copy of G)
bl c
nop
rlwinm. 3, 30, 0, 28, 28
beq 0, .LBB0_8
.LBB0_7: # %optional4 ; H
bl d
nop
.LBB0_8: # %exit ; Ret
ld 30, 96(1) # 8-byte Folded Reload
addi 1, 1, 112
ld 0, 16(1)
mtlr 0
blr
The tail-duplication has produced some benefit, but it has also produced a
trellis which is not laid out optimally. With this patch, we improve the layouts
of such trellises, and decrease the cost calculation for tail-duplication
accordingly.
This patch produces the layout A,C,E,G,B,D,F,H,Ret. This layout does have
back edges, which is a negative, but it has a bigger compensating
positive, which is that it handles the case where there are long strings
of skipped blocks much better than the original layout. Both layouts
handle runs of executed blocks equally well. Branch prediction also
improves if there is any correlation between subsequent optional blocks.
Here is the resulting concrete layout:
straight_test: # @straight_test
; BB#0: # %entry ; A (merged with test1)
mr 30, 3
andi. 3, 30, 1
bc 12, 1, .LBB0_4
; BB#1: # %test2 ; C
rlwinm. 3, 30, 0, 30, 30
bne 0, .LBB0_5
.LBB0_2: # %test3 ; E
rlwinm. 3, 30, 0, 29, 29
bne 0, .LBB0_6
.LBB0_3: # %test4 ; G
rlwinm. 3, 30, 0, 28, 28
bne 0, .LBB0_7
b .LBB0_8
.LBB0_4: # %optional1 ; B (Copy of C)
bl a
nop
rlwinm. 3, 30, 0, 30, 30
beq 0, .LBB0_2
.LBB0_5: # %optional2 ; D (Copy of E)
bl b
nop
rlwinm. 3, 30, 0, 29, 29
beq 0, .LBB0_3
.LBB0_6: # %optional3 ; F (Copy of G)
bl c
nop
rlwinm. 3, 30, 0, 28, 28
beq 0, .LBB0_8
.LBB0_7: # %optional4 ; H
bl d
nop
.LBB0_8: # %exit
Differential Revision: https://reviews.llvm.org/D28522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295223 91177308-0d34-0410-b5e6-96231b3b80d8
475 lines
15 KiB
LLVM
475 lines
15 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
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; marked as external to prevent possible optimizations
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@a = external global i32
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@b = external global i32
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@c = external global i32
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@d = external global i32
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; (a > 10 && b == c) || (a >= 10 && b == d)
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define i32 @combine_gt_ge_10() #0 {
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; CHECK-LABEL: combine_gt_ge_10
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; CHECK: cmp
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; CHECK: b.le
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; CHECK: ret
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; CHECK-NOT: cmp
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; CHECK: b.lt
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp = icmp sgt i32 %0, 10
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br i1 %cmp, label %land.lhs.true, label %lor.lhs.false
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land.lhs.true: ; preds = %entry
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%1 = load i32, i32* @b, align 4
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%2 = load i32, i32* @c, align 4
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%cmp1 = icmp eq i32 %1, %2
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br i1 %cmp1, label %return, label %land.lhs.true3
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lor.lhs.false: ; preds = %entry
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%cmp2 = icmp sgt i32 %0, 9
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br i1 %cmp2, label %land.lhs.true3, label %if.end
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land.lhs.true3: ; preds = %lor.lhs.false, %land.lhs.true
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%3 = load i32, i32* @b, align 4
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%4 = load i32, i32* @d, align 4
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%cmp4 = icmp eq i32 %3, %4
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br i1 %cmp4, label %return, label %if.end
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if.end: ; preds = %land.lhs.true3, %lor.lhs.false
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br label %return
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return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
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ret i32 %retval.0
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}
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; (a > 5 && b == c) || (a < 5 && b == d)
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define i32 @combine_gt_lt_5() #0 {
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; CHECK-LABEL: combine_gt_lt_5
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; CHECK: cmp
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; CHECK: b.le
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; CHECK: ret
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; CHECK-NOT: cmp
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; CHECK: b.ge
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp = icmp sgt i32 %0, 5
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br i1 %cmp, label %land.lhs.true, label %lor.lhs.false
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land.lhs.true: ; preds = %entry
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%1 = load i32, i32* @b, align 4
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%2 = load i32, i32* @c, align 4
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%cmp1 = icmp eq i32 %1, %2
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br i1 %cmp1, label %return, label %if.end
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lor.lhs.false: ; preds = %entry
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%cmp2 = icmp slt i32 %0, 5
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br i1 %cmp2, label %land.lhs.true3, label %if.end
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land.lhs.true3: ; preds = %lor.lhs.false
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%3 = load i32, i32* @b, align 4
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%4 = load i32, i32* @d, align 4
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%cmp4 = icmp eq i32 %3, %4
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br i1 %cmp4, label %return, label %if.end
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if.end: ; preds = %land.lhs.true3, %lor.lhs.false, %land.lhs.true
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br label %return
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return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
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ret i32 %retval.0
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}
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; (a < 5 && b == c) || (a <= 5 && b == d)
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define i32 @combine_lt_ge_5() #0 {
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; CHECK-LABEL: combine_lt_ge_5
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; CHECK: cmp
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; CHECK: b.ge
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; CHECK: ret
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; CHECK-NOT: cmp
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; CHECK: b.gt
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp = icmp slt i32 %0, 5
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br i1 %cmp, label %land.lhs.true, label %lor.lhs.false
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land.lhs.true: ; preds = %entry
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%1 = load i32, i32* @b, align 4
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%2 = load i32, i32* @c, align 4
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%cmp1 = icmp eq i32 %1, %2
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br i1 %cmp1, label %return, label %land.lhs.true3
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lor.lhs.false: ; preds = %entry
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%cmp2 = icmp slt i32 %0, 6
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br i1 %cmp2, label %land.lhs.true3, label %if.end
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land.lhs.true3: ; preds = %lor.lhs.false, %land.lhs.true
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%3 = load i32, i32* @b, align 4
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%4 = load i32, i32* @d, align 4
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%cmp4 = icmp eq i32 %3, %4
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br i1 %cmp4, label %return, label %if.end
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if.end: ; preds = %land.lhs.true3, %lor.lhs.false
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br label %return
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return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
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ret i32 %retval.0
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}
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; (a < 5 && b == c) || (a > 5 && b == d)
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define i32 @combine_lt_gt_5() #0 {
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; CHECK-LABEL: combine_lt_gt_5
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; CHECK: cmp
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; CHECK: b.ge
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; CHECK: ret
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; CHECK-NOT: cmp
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; CHECK: b.le
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp = icmp slt i32 %0, 5
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br i1 %cmp, label %land.lhs.true, label %lor.lhs.false
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land.lhs.true: ; preds = %entry
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%1 = load i32, i32* @b, align 4
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%2 = load i32, i32* @c, align 4
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%cmp1 = icmp eq i32 %1, %2
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br i1 %cmp1, label %return, label %if.end
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lor.lhs.false: ; preds = %entry
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%cmp2 = icmp sgt i32 %0, 5
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br i1 %cmp2, label %land.lhs.true3, label %if.end
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land.lhs.true3: ; preds = %lor.lhs.false
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%3 = load i32, i32* @b, align 4
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%4 = load i32, i32* @d, align 4
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%cmp4 = icmp eq i32 %3, %4
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br i1 %cmp4, label %return, label %if.end
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if.end: ; preds = %land.lhs.true3, %lor.lhs.false, %land.lhs.true
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br label %return
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return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
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ret i32 %retval.0
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}
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; (a > -5 && b == c) || (a < -5 && b == d)
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define i32 @combine_gt_lt_n5() #0 {
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; CHECK-LABEL: combine_gt_lt_n5
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; CHECK: cmn
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; CHECK: b.le
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; CHECK: ret
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; CHECK-NOT: cmn
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; CHECK: b.ge
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp = icmp sgt i32 %0, -5
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br i1 %cmp, label %land.lhs.true, label %lor.lhs.false
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land.lhs.true: ; preds = %entry
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%1 = load i32, i32* @b, align 4
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%2 = load i32, i32* @c, align 4
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%cmp1 = icmp eq i32 %1, %2
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br i1 %cmp1, label %return, label %if.end
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lor.lhs.false: ; preds = %entry
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%cmp2 = icmp slt i32 %0, -5
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br i1 %cmp2, label %land.lhs.true3, label %if.end
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land.lhs.true3: ; preds = %lor.lhs.false
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%3 = load i32, i32* @b, align 4
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%4 = load i32, i32* @d, align 4
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%cmp4 = icmp eq i32 %3, %4
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br i1 %cmp4, label %return, label %if.end
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if.end: ; preds = %land.lhs.true3, %lor.lhs.false, %land.lhs.true
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br label %return
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return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
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ret i32 %retval.0
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}
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; (a < -5 && b == c) || (a > -5 && b == d)
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define i32 @combine_lt_gt_n5() #0 {
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; CHECK-LABEL: combine_lt_gt_n5
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; CHECK: cmn
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; CHECK: b.ge
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; CHECK: ret
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; CHECK-NOT: cmn
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; CHECK: b.le
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp = icmp slt i32 %0, -5
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br i1 %cmp, label %land.lhs.true, label %lor.lhs.false
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land.lhs.true: ; preds = %entry
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%1 = load i32, i32* @b, align 4
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%2 = load i32, i32* @c, align 4
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%cmp1 = icmp eq i32 %1, %2
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br i1 %cmp1, label %return, label %if.end
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lor.lhs.false: ; preds = %entry
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%cmp2 = icmp sgt i32 %0, -5
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br i1 %cmp2, label %land.lhs.true3, label %if.end
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land.lhs.true3: ; preds = %lor.lhs.false
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%3 = load i32, i32* @b, align 4
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%4 = load i32, i32* @d, align 4
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%cmp4 = icmp eq i32 %3, %4
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br i1 %cmp4, label %return, label %if.end
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if.end: ; preds = %land.lhs.true3, %lor.lhs.false, %land.lhs.true
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br label %return
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return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
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ret i32 %retval.0
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}
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%struct.Struct = type { i64, i64 }
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@glob = internal unnamed_addr global %struct.Struct* null, align 8
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declare %struct.Struct* @Update(%struct.Struct*) #1
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; no checks for this case, it just should be processed without errors
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define void @combine_non_adjacent_cmp_br(%struct.Struct* nocapture readonly %hdCall) #0 {
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entry:
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%size = getelementptr inbounds %struct.Struct, %struct.Struct* %hdCall, i64 0, i32 0
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%0 = load i64, i64* %size, align 8
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br label %land.rhs
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land.rhs:
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%rp.06 = phi i64 [ %0, %entry ], [ %sub, %while.body ]
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%1 = load i64, i64* inttoptr (i64 24 to i64*), align 8
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%cmp2 = icmp sgt i64 %1, 0
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br i1 %cmp2, label %while.body, label %while.end
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while.body:
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%2 = load %struct.Struct*, %struct.Struct** @glob, align 8
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%call = tail call %struct.Struct* @Update(%struct.Struct* %2) #2
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%sub = add nsw i64 %rp.06, -2
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%cmp = icmp slt i64 %0, %rp.06
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br i1 %cmp, label %land.rhs, label %while.end
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while.end:
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ret void
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}
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; undefined external to prevent possible optimizations
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declare void @do_something() #1
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define i32 @do_nothing_if_resultant_opcodes_would_differ() #0 {
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; CHECK-LABEL: do_nothing_if_resultant_opcodes_would_differ
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; CHECK: cmn
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; CHECK: b.le
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; CHECK: cmp
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; CHECK: b.gt
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp4 = icmp slt i32 %0, -1
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br i1 %cmp4, label %while.body.preheader, label %while.end
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while.body.preheader: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body, %while.body.preheader
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%i.05 = phi i32 [ %inc, %while.body ], [ %0, %while.body.preheader ]
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tail call void @do_something() #2
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%inc = add nsw i32 %i.05, 1
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%cmp = icmp slt i32 %i.05, 0
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br i1 %cmp, label %while.body, label %while.cond.while.end_crit_edge
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while.cond.while.end_crit_edge: ; preds = %while.body
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%.pre = load i32, i32* @a, align 4
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br label %while.end
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while.end: ; preds = %while.cond.while.end_crit_edge, %entry
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%1 = phi i32 [ %.pre, %while.cond.while.end_crit_edge ], [ %0, %entry ]
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%cmp1 = icmp slt i32 %1, 2
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br i1 %cmp1, label %land.lhs.true, label %if.end
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land.lhs.true: ; preds = %while.end
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%2 = load i32, i32* @b, align 4
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%3 = load i32, i32* @d, align 4
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%cmp2 = icmp eq i32 %2, %3
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br i1 %cmp2, label %return, label %if.end
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if.end: ; preds = %land.lhs.true, %while.end
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br label %return
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return: ; preds = %if.end, %land.lhs.true
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%retval.0 = phi i32 [ 0, %if.end ], [ 123, %land.lhs.true ]
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ret i32 %retval.0
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}
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define i32 @do_nothing_if_compares_can_not_be_adjusted_to_each_other() #0 {
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; CHECK-LABEL: do_nothing_if_compares_can_not_be_adjusted_to_each_other
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; CHECK: cmp
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; CHECK: b.gt
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; CHECK: cmn
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; CHECK: b.lt
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entry:
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%0 = load i32, i32* @a, align 4
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%cmp4 = icmp slt i32 %0, 1
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br i1 %cmp4, label %while.body.preheader, label %while.end
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while.body.preheader: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body, %while.body.preheader
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%i.05 = phi i32 [ %inc, %while.body ], [ %0, %while.body.preheader ]
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tail call void @do_something() #2
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%inc = add nsw i32 %i.05, 1
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%cmp = icmp slt i32 %i.05, 0
|
|
br i1 %cmp, label %while.body, label %while.end.loopexit
|
|
|
|
while.end.loopexit: ; preds = %while.body
|
|
br label %while.end
|
|
|
|
while.end: ; preds = %while.end.loopexit, %entry
|
|
%1 = load i32, i32* @c, align 4
|
|
%cmp1 = icmp sgt i32 %1, -3
|
|
br i1 %cmp1, label %land.lhs.true, label %if.end
|
|
|
|
land.lhs.true: ; preds = %while.end
|
|
%2 = load i32, i32* @b, align 4
|
|
%3 = load i32, i32* @d, align 4
|
|
%cmp2 = icmp eq i32 %2, %3
|
|
br i1 %cmp2, label %return, label %if.end
|
|
|
|
if.end: ; preds = %land.lhs.true, %while.end
|
|
br label %return
|
|
|
|
return: ; preds = %if.end, %land.lhs.true
|
|
%retval.0 = phi i32 [ 0, %if.end ], [ 123, %land.lhs.true ]
|
|
ret i32 %retval.0
|
|
}
|
|
|
|
; Test in the following case, we don't hit 'cmp' and trigger a false positive
|
|
; cmp w19, #0
|
|
; cinc w0, w19, gt
|
|
; ...
|
|
; fcmp d8, #0.0
|
|
; b.gt .LBB0_5
|
|
|
|
define i32 @fcmpri(i32 %argc, i8** nocapture readonly %argv) {
|
|
|
|
; CHECK-LABEL: fcmpri:
|
|
; CHECK: cmp w0, #2
|
|
; CHECK: b.lt .LBB9_3
|
|
; CHECK-NOT: cmp w0, #1
|
|
; CHECK-NOT: b.le .LBB9_3
|
|
|
|
; CHECK-LABEL-DAG: .LBB9_3
|
|
; CHECK: cmp w19, #0
|
|
; CHECK: fcmp d8, #0.0
|
|
; CHECK-NOT: cmp w19, #1
|
|
; CHECK-NOT: b.ge .LBB9_5
|
|
|
|
entry:
|
|
%cmp = icmp sgt i32 %argc, 1
|
|
br i1 %cmp, label %land.lhs.true, label %if.end
|
|
|
|
land.lhs.true: ; preds = %entry
|
|
%arrayidx = getelementptr inbounds i8*, i8** %argv, i64 1
|
|
%0 = load i8*, i8** %arrayidx, align 8
|
|
%cmp1 = icmp eq i8* %0, null
|
|
br i1 %cmp1, label %if.end, label %return
|
|
|
|
if.end: ; preds = %land.lhs.true, %entry
|
|
%call = call i32 @zoo(i32 1)
|
|
%call2 = call double @yoo(i32 -1)
|
|
%cmp4 = icmp sgt i32 %call, 0
|
|
%add = zext i1 %cmp4 to i32
|
|
%cond = add nsw i32 %add, %call
|
|
%call7 = call i32 @xoo(i32 %cond, i32 2)
|
|
%cmp9 = fcmp ogt double %call2, 0.000000e+00
|
|
br i1 %cmp9, label %cond.end14, label %cond.false12
|
|
|
|
cond.false12: ; preds = %if.end
|
|
%sub = fadd fast double %call2, -1.000000e+00
|
|
br label %cond.end14
|
|
|
|
cond.end14: ; preds = %if.end, %cond.false12
|
|
%cond15 = phi double [ %sub, %cond.false12 ], [ %call2, %if.end ]
|
|
%call16 = call i32 @woo(double %cond15, double -2.000000e+00)
|
|
br label %return
|
|
|
|
return: ; preds = %land.lhs.true, %cond.end14
|
|
%retval.0 = phi i32 [ 4, %cond.end14 ], [ 3, %land.lhs.true ]
|
|
ret i32 %retval.0
|
|
}
|
|
|
|
define void @cmp_shifted(i32 %in, i32 %lhs, i32 %rhs) {
|
|
; CHECK-LABEL: cmp_shifted:
|
|
; CHECK: cmp w0, #2, lsl #12
|
|
; [...]
|
|
; CHECK: cmp w0, #1
|
|
|
|
%tst_low = icmp sgt i32 %in, 8191
|
|
br i1 %tst_low, label %true, label %false
|
|
|
|
true:
|
|
call i32 @zoo(i32 128)
|
|
ret void
|
|
|
|
false:
|
|
%tst = icmp sgt i32 %in, 0
|
|
br i1 %tst, label %truer, label %falser
|
|
|
|
truer:
|
|
call i32 @zoo(i32 42)
|
|
ret void
|
|
|
|
falser:
|
|
call i32 @zoo(i32 1)
|
|
ret void
|
|
}
|
|
|
|
define i32 @combine_gt_ge_sel(i64 %v, i64* %p) #0 {
|
|
; CHECK-LABEL: combine_gt_ge_sel
|
|
; CHECK: ldr [[reg1:w[0-9]*]],
|
|
; CHECK: cmp [[reg1]], #0
|
|
; CHECK: csel {{.*}}, gt
|
|
entry:
|
|
%0 = load i32, i32* @a, align 4
|
|
%cmp = icmp sgt i32 %0, 0
|
|
%m = select i1 %cmp, i64 %v, i64 0
|
|
store i64 %m, i64* %p
|
|
br i1 %cmp, label %lor.lhs.false, label %land.lhs.true
|
|
|
|
land.lhs.true: ; preds = %entry
|
|
%1 = load i32, i32* @b, align 4
|
|
%2 = load i32, i32* @c, align 4
|
|
%cmp1 = icmp eq i32 %1, %2
|
|
br i1 %cmp1, label %return, label %land.lhs.true3
|
|
|
|
lor.lhs.false: ; preds = %entry
|
|
%cmp2 = icmp sgt i32 %0, 1
|
|
br i1 %cmp2, label %land.lhs.true3, label %if.end
|
|
|
|
land.lhs.true3: ; preds = %lor.lhs.false, %land.lhs.true
|
|
%3 = load i32, i32* @b, align 4
|
|
%4 = load i32, i32* @d, align 4
|
|
%cmp4 = icmp eq i32 %3, %4
|
|
br i1 %cmp4, label %return, label %if.end
|
|
|
|
if.end: ; preds = %land.lhs.true3, %lor.lhs.false
|
|
br label %return
|
|
|
|
return: ; preds = %if.end, %land.lhs.true3, %land.lhs.true
|
|
%retval.0 = phi i32 [ 0, %if.end ], [ 1, %land.lhs.true3 ], [ 1, %land.lhs.true ]
|
|
ret i32 %retval.0
|
|
}
|
|
|
|
declare i32 @zoo(i32)
|
|
|
|
declare double @yoo(i32)
|
|
|
|
declare i32 @xoo(i32, i32)
|
|
|
|
declare i32 @woo(double, double)
|