Marcin Koscielnicki b527cb338d [PowerPC] Fix the EH_SjLj_Setup pseudo. ... This instruction is just a control flow marker - it should not actually exist in the object file. Unfortunately, nothing catches it before it gets to AsmPrinter. If integrated assembler is used, it's considered to be a normal 4-byte instruction, and emitted as an all-0 word, crashing the program. With external assembler, a comment is emitted. Fixed by setting Size to 0 and handling it in MCCodeEmitter - this means the comment will still be emitted if integrated assembler is not used. This broke an ASan test, which has been disabled for a long time as a result (see the discussion on D19657). We can reenable it once this lands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267943 91177308-0d34-0410-b5e6-96231b3b80d8		2016-04-28 21:24:37 +00:00
..
AArch64	[AArch64] Set correct successors in CMPXCHG pseudo expansion.	2016-04-27 20:33:02 +00:00
AMDGPU	AMDGPU: Emit error if too much LDS is used	2016-04-28 19:37:35 +00:00
ARM	[ARM] Set correct successors in CMPXCHG pseudo expansion.	2016-04-27 20:32:54 +00:00
BPF
CPP
Generic	Introduce llvm.load.relative intrinsic.	2016-04-22 21:18:02 +00:00
Hexagon	[RDF] Improve handling of inline-asm	2016-04-28 20:33:33 +00:00
Inputs
Lanai	[lanai] Add subword scheduling itineraries.	2016-04-20 18:28:55 +00:00
Mips	[mips][atomics] Fix partword atomic binary operation implementation	2016-04-28 16:26:43 +00:00
MIR	tests: tweak MIR for ARM tests to correct MI issues	2016-04-26 17:54:21 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Fix the EH_SjLj_Setup pseudo.	2016-04-28 21:24:37 +00:00
SPARC	[SPARC] [SSP] Add support for LOAD_STACK_GUARD.	2016-04-26 10:37:14 +00:00
SystemZ	[SystemZ] Support Swift Calling Convention	2016-04-28 00:17:23 +00:00
Thumb
Thumb2
WebAssembly	[WebAssembly] Account for implicit operands when computing operand indices.	2016-04-26 01:40:56 +00:00
WinEH
X86	[X86] Enable the post-RA-scheduler for clang's default 32-bit cpu.	2016-04-27 22:52:35 +00:00
XCore