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c220fde748
Differential revision: https://reviews.llvm.org/D24295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281137 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.2 KiB
TableGen
73 lines
2.2 KiB
TableGen
//===-- CIInstructions.td - CI Instruction Defintions ---------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// Instruction definitions for CI and newer.
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//===----------------------------------------------------------------------===//
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// Remaining instructions:
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// S_CBRANCH_CDBGUSER
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// S_CBRANCH_CDBGSYS
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// S_CBRANCH_CDBGSYS_OR_USER
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// S_CBRANCH_CDBGSYS_AND_USER
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//===----------------------------------------------------------------------===//
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// VOP1 Instructions
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//===----------------------------------------------------------------------===//
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let SubtargetPredicate = isCIVI in {
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let SchedRW = [WriteDoubleAdd] in {
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defm V_TRUNC_F64 : VOP1Inst <vop1<0x17>, "v_trunc_f64",
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VOP_F64_F64, ftrunc
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>;
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defm V_CEIL_F64 : VOP1Inst <vop1<0x18>, "v_ceil_f64",
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VOP_F64_F64, fceil
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>;
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defm V_FLOOR_F64 : VOP1Inst <vop1<0x1A>, "v_floor_f64",
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VOP_F64_F64, ffloor
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>;
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defm V_RNDNE_F64 : VOP1Inst <vop1<0x19>, "v_rndne_f64",
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VOP_F64_F64, frint
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>;
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} // End SchedRW = [WriteDoubleAdd]
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let SchedRW = [WriteQuarterRate32] in {
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defm V_LOG_LEGACY_F32 : VOP1Inst <vop1<0x45, 0x4c>, "v_log_legacy_f32",
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VOP_F32_F32
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>;
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defm V_EXP_LEGACY_F32 : VOP1Inst <vop1<0x46, 0x4b>, "v_exp_legacy_f32",
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VOP_F32_F32
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>;
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} // End SchedRW = [WriteQuarterRate32]
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//===----------------------------------------------------------------------===//
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// VOP3 Instructions
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//===----------------------------------------------------------------------===//
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defm V_MQSAD_U16_U8 : VOP3Inst <vop3<0x172>, "v_mqsad_u16_u8",
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VOP_I32_I32_I32
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>;
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defm V_QSAD_PK_U16_U8 : VOP3Inst <vop3<0x172, 0x1e5>, "v_qsad_pk_u16_u8",
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VOP_I64_I64_I32_I64, int_amdgcn_qsad_pk_u16_u8>;
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defm V_MQSAD_U32_U8 : VOP3Inst <vop3<0x174, 0x1e7>, "v_mqsad_u32_u8",
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VOP_V4I32_I64_I32_V4I32, int_amdgcn_mqsad_u32_u8>;
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let isCommutable = 1 in {
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defm V_MAD_U64_U32 : VOP3Inst <vop3<0x176>, "v_mad_u64_u32",
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VOP_I64_I32_I32_I64
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>;
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// XXX - Does this set VCC?
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defm V_MAD_I64_I32 : VOP3Inst <vop3<0x177>, "v_mad_i64_i32",
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VOP_I64_I32_I32_I64
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>;
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} // End isCommutable = 1
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} // End SubtargetPredicate = isCIVI
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