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llvm/lib/Target/AMDGPU
History
Matt Arsenault 93e6e5414d Finish renaming remaining analyzeBranch functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281535 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-14 20:43:16 +00:00
..
AsmParser
AMDGPU] Assembler: better support for immediate literals in assembler.
2016-09-09 14:44:04 +00:00
Disassembler
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InstPrinter
AMDGPU] Assembler: better support for immediate literals in assembler.
2016-09-09 14:44:04 +00:00
MCTargetDesc
AMDGPU] Assembler: better support for immediate literals in assembler.
2016-09-09 14:44:04 +00:00
TargetInfo
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Utils
AMDGPU] Assembler: better support for immediate literals in assembler.
2016-09-09 14:44:04 +00:00
AMDGPU.h
AMDGPU: Split SILowerControlFlow into two pieces
2016-08-22 19:33:16 +00:00
AMDGPU.td
[AMDGPU] Assembler: Move disabled SDWA and DPP instruction into Disable asm variant
2016-09-12 14:42:43 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPU/SI: Handle aliases in AMDGPUAlwaysInlinePass
2016-08-31 11:18:33 +00:00
AMDGPUAnnotateKernelFeatures.cpp
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AMDGPUAnnotateUniformValues.cpp
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AMDGPUAsmPrinter.cpp
AMDGPU: Remove a useless variable which caused build failure for lld.
2016-09-07 18:31:11 +00:00
AMDGPUAsmPrinter.h
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
AMDGPUCallingConv.td
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AMDGPUCallLowering.cpp
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AMDGPUCallLowering.h
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AMDGPUCodeGenPrepare.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
AMDGPUInstructions.td
AMDGPU] Assembler: better support for immediate literals in assembler.
2016-09-09 14:44:04 +00:00
AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
AMDGPU: Run LoadStoreVectorizer pass by default
2016-09-09 22:29:28 +00:00
AMDGPUISelLowering.cpp
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
AMDGPUISelLowering.h
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPUPromoteAlloca.cpp
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPURuntimeMetadata.h
AMDGPU: Add hidden kernel arguments to runtime metadata
2016-09-07 17:44:00 +00:00
AMDGPUSubtarget.cpp
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
AMDGPUSubtarget.h
AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is 8-byte aligned for HSA
2016-09-09 19:28:00 +00:00
AMDGPUTargetMachine.cpp
AMDGPU: Run LoadStoreVectorizer pass by default
2016-09-09 22:29:28 +00:00
AMDGPUTargetMachine.h
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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AMDGPUTargetTransformInfo.h
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AMDILCFGStructurizer.cpp
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
2016-08-24 01:52:46 +00:00
AMDKernelCodeT.h
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BUFInstructions.td
[AMDGPU] Refactor MUBUF/MTBUF instructions
2016-09-10 13:09:16 +00:00
CaymanInstructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
CIInstructions.td
[AMDGPU] Refactor MUBUF/MTBUF instructions
2016-09-10 13:09:16 +00:00
CMakeLists.txt
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
DSInstructions.td
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EvergreenInstructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
FLATInstructions.td
[AMDGPU] Refactor FLAT TD instructions
2016-09-05 11:22:51 +00:00
GCNHazardRecognizer.cpp
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GCNHazardRecognizer.h
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GCNSchedStrategy.cpp
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
GCNSchedStrategy.h
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
LLVMBuild.txt
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MIMGInstructions.td
AMDGPU/SI: MIMG TD Refactoring.
2016-09-01 17:54:54 +00:00
Processors.td
AMDGPU : Add XNACK feature to GPUs that support it.
2016-09-06 19:55:17 +00:00
R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
R600InstrInfo.h
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
R600Instructions.td
AMDGPU: Select mulhi 24-bit instructions
2016-08-27 01:32:27 +00:00
R600Intrinsics.td
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R600ISelLowering.cpp
[CodeGen] Split out the notions of MI invariance and MI dereferenceability.
2016-09-11 01:38:58 +00:00
R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDebuggerInsertNops.cpp
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SIDefines.h
Revert "AMDGPU: Use SOPK compare instructions"
2016-09-14 18:04:42 +00:00
SIFixControlFlowLiveIntervals.cpp
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SIFixSGPRCopies.cpp
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SIFoldOperands.cpp
AMDGPU: Support folding FrameIndex operands
2016-09-14 15:51:33 +00:00
SIFrameLowering.cpp
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
SIFrameLowering.h
AMDGPU: Refactor frame lowering
2016-08-31 21:52:21 +00:00
SIInsertSkips.cpp
AMDGPU: Split SILowerControlFlow into two pieces
2016-08-22 19:33:16 +00:00
SIInsertWaits.cpp
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SIInstrFormats.td
Revert "AMDGPU: Use SOPK compare instructions"
2016-09-14 18:04:42 +00:00
SIInstrInfo.cpp
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
SIInstrInfo.h
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
SIInstrInfo.td
Revert "AMDGPU: Use SOPK compare instructions"
2016-09-14 18:04:42 +00:00
SIInstructions.td
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
SIIntrinsics.td
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SIISelLowering.cpp
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
SIISelLowering.h
AMDGPU: Improve splitting 64-bit bit ops by constants
2016-09-14 15:19:03 +00:00
SILoadStoreOptimizer.cpp
SILoadStoreOptimizer.cpp: Fix a warning in r279991. [-Wunused-variable]
2016-08-30 11:50:21 +00:00
SILowerControlFlow.cpp
AMDGPU: Remove register operand from si_mask_branch
2016-08-27 00:42:21 +00:00
SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
SIMachineFunctionInfo.h
[AMDGPU] Wave and register controls
2016-09-06 20:22:28 +00:00
SIMachineScheduler.cpp
AMDGPU/SI: Use a better method for determining the largest pressure sets
2016-08-26 21:16:37 +00:00
SIMachineScheduler.h
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SIRegisterInfo.cpp
AMDGPU: Remove code I think is dead
2016-09-13 19:15:25 +00:00
SIRegisterInfo.h
Remove unnecessary call to getAllocatableRegClass
2016-09-07 06:16:45 +00:00
SIRegisterInfo.td
AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type.
2016-09-09 19:31:51 +00:00
SISchedule.td
AMDGPU/SI: Implement a custom MachineSchedStrategy
2016-08-29 19:42:52 +00:00
SIShrinkInstructions.cpp
Revert "AMDGPU: Use SOPK compare instructions"
2016-09-14 18:04:42 +00:00
SITypeRewriter.cpp
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SIWholeQuadMode.cpp
AMDGPU: Do not clobber SCC in SIWholeQuadMode
2016-09-12 16:25:20 +00:00
SMInstructions.td
[AMDGPU] Scalar Memory instructions TD refactoring
2016-09-01 09:56:47 +00:00
SOPInstructions.td
Revert "AMDGPU: Use SOPK compare instructions"
2016-09-14 18:04:42 +00:00
VIInstrFormats.td
[AMDGPU] Refactor MUBUF/MTBUF instructions
2016-09-10 13:09:16 +00:00
VIInstructions.td
AMDGPU] Assembler: better support for immediate literals in assembler.
2016-09-09 14:44:04 +00:00