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When setting the frame pointer, the offset from SP is calculated based on the stack slot it gets allocated, but this slot is in turn based on the order of the CSR list so that list should match the order we actually save the registers in. Mostly it did, but in the edge-case of MachO AAPCS targets it was wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269459 91177308-0d34-0410-b5e6-96231b3b80d8
13 lines
271 B
LLVM
13 lines
271 B
LLVM
; RUN: llc -mtriple thumbv7m-apple-macho -disable-fp-elim -o - %s | FileCheck %s
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define void @func() {
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; CHECK-LABEL: func:
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; CHECK: push {r6, r7, lr}
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; CHECK: add r7, sp, #4
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call void @bar()
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call void asm sideeffect "", "~{r11}"()
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ret void
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}
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declare void @bar()
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