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llvm/lib/Target/Alpha
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Dan Gohman b5bec2b6f6 Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration 
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 14:13:56 +00:00
..
.cvsignore
Alpha.h
Alpha.td For PR1336: 2007-04-16 14:06:19 +00:00
AlphaAsmPrinter.cpp Removed tabs everywhere except autogenerated & external files. Add make 2007-04-16 18:10:23 +00:00
AlphaBranchSelector.cpp Drop 'const' 2007-05-03 01:11:54 +00:00
AlphaCodeEmitter.cpp Drop 'const' 2007-05-03 01:11:54 +00:00
AlphaInstrFormats.td Use this nifty Constraints thing and fix the inverted conditional moves 2007-04-17 04:07:59 +00:00
AlphaInstrInfo.cpp Handle blocks with 2 unconditional branches in AnalyzeBranch. 2007-06-13 17:59:52 +00:00
AlphaInstrInfo.h RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 2007-05-18 00:05:48 +00:00
AlphaInstrInfo.td Use this nifty Constraints thing and fix the inverted conditional moves 2007-04-17 04:07:59 +00:00
AlphaISelDAGToDAG.cpp Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration 2007-06-19 14:13:56 +00:00
AlphaISelLowering.cpp Removed tabs everywhere except autogenerated & external files. Add make 2007-04-16 18:10:23 +00:00
AlphaISelLowering.h switch TargetLowering::getConstraintType to take the entire constraint, 2007-03-25 02:14:49 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp Drop 'const' 2007-05-03 01:11:54 +00:00
AlphaRegisterInfo.cpp eliminateFrameIndex() change. 2007-05-01 09:13:03 +00:00
AlphaRegisterInfo.h eliminateFrameIndex() change. 2007-05-01 09:13:03 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaSubtarget.h FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available 2007-01-24 21:09:16 +00:00
AlphaTargetAsmInfo.cpp Simplify a bit 2006-12-07 23:55:55 +00:00
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp Added new method to add a "simple" code emitter. That is, to only add 2007-02-08 01:38:33 +00:00
AlphaTargetMachine.h Added new method to add a "simple" code emitter. That is, to only add 2007-02-08 01:38:33 +00:00
Makefile
README.txt Readme 2007-03-31 15:05:44 +00:00

README.txt 

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html