llvm/lib/CodeGen/SelectionDAG
Balaram Makam 60101204f1 AArch64: Implement missed conditional compare sequences.
Summary:
This is an extension to the existing implementation of r242436 which
restricts to only select inputs. This version fixes missed opportunities
in pr26084 by attempting to lower conditional compare sequences of
and/or trees with setcc leafs. This will additionaly handle the case
when a tree with select input is not a conjunction-disjunction tree
but some of the sub trees are conjunction-disjunction trees.

Reviewers: jmolloy, t.p.northover, mcrosier, MatzeB

Subscribers: mcrosier, llvm-commits, junbuml, haicheng, mssimpso, gberry

Differential Revision: http://reviews.llvm.org/D16291

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259387 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-01 19:13:07 +00:00
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