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5bfb1b8c4e
Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277322 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.5 KiB
LLVM
60 lines
1.5 KiB
LLVM
; RUN: llc -O3 < %s -aarch64-enable-atomic-cfg-tidy=0 -aarch64-enable-gep-opt=false -verify-machineinstrs | FileCheck %s
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target triple = "arm64-apple-ios"
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; rdar://12462006
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; CSE between "icmp reg reg" and "sub reg reg".
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; Both can be in the same basic block or in different basic blocks.
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define i8* @t1(i8* %base, i32* nocapture %offset, i32 %size) nounwind {
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entry:
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; CHECK-LABEL: t1:
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; CHECK: subs
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; CHECK-NOT: cmp
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; CHECK-NOT: sub
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; CHECK: b.ge
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; CHECK: sub
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; CHECK: sub
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; CHECK-NOT: sub
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; CHECK: ret
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%0 = load i32, i32* %offset, align 4
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%cmp = icmp slt i32 %0, %size
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%s = sub nsw i32 %0, %size
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br i1 %cmp, label %return, label %if.end
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if.end:
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%sub = sub nsw i32 %0, %size
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%s2 = sub nsw i32 %s, %size
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%s3 = sub nsw i32 %sub, %s2
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store i32 %s3, i32* %offset, align 4
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%add.ptr = getelementptr inbounds i8, i8* %base, i32 %sub
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br label %return
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return:
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%retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ]
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ret i8* %retval.0
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}
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; CSE between "icmp reg imm" and "sub reg imm".
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define i8* @t2(i8* %base, i32* nocapture %offset) nounwind {
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entry:
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; CHECK-LABEL: t2:
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; CHECK: subs
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; CHECK-NOT: cmp
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; CHECK-NOT: sub
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; CHECK: b.lt
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; CHECK-NOT: sub
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; CHECK: ret
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%0 = load i32, i32* %offset, align 4
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%cmp = icmp slt i32 %0, 1
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br i1 %cmp, label %return, label %if.end
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if.end:
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%sub = sub nsw i32 %0, 1
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store i32 %sub, i32* %offset, align 4
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%add.ptr = getelementptr inbounds i8, i8* %base, i32 %sub
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br label %return
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return:
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%retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ]
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ret i8* %retval.0
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}
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