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llvm/test/CodeGen/AArch64
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Daniel Sanders ec48fd1277 [globalisel][tablegen] Correct matching of intrinsic ID's. 
TreePatternNode considers them to be plain integers but MachineInstr considers
them to be a distinct kind of operand.

The tweak to AArch64InstrInfo.td to produce a simple test case is a NFC for
everything except GlobalISelEmitter (confirmed by diffing the tablegenerated
files). GlobalISelEmitter is currently unable to infer the type of operands in
the Dst pattern from the operands in the Src pattern.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307634 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 08:57:29 +00:00
..
GlobalISel
[globalisel][tablegen] Correct matching of intrinsic ID's.
2017-07-11 08:57:29 +00:00
128bit_load_store.ll
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a57-csel.ll
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aarch64_f16_be.ll
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aarch64_tree_tests.ll
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aarch64-2014-08-11-MachineCombinerCrash.ll
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aarch64-2014-12-02-combine-soften.ll
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aarch64-a57-fp-load-balancing.ll
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aarch64-address-type-promotion-assertion.ll
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aarch64-address-type-promotion.ll
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aarch64-addv.ll
Re-commit r302678, fixing PR33053.
2017-05-16 21:29:22 +00:00
aarch64-be-bv.ll
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aarch64-codegen-prepare-atp.ll
[CodeGenPrep] move aarch64-type-promotion to CGP
2017-04-03 19:20:07 +00:00
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
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aarch64-dynamic-stack-layout.ll
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aarch64-fix-cortex-a53-835769.ll
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aarch64-fold-lslfast.ll
[AArch64] Add new subtarget feature to fold LSL into address mode.
2017-03-31 18:16:53 +00:00
aarch64-gep-opt.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
aarch64-loop-gep-opt.ll
…
aarch64-minmaxv.ll
Re-commit r302678, fixing PR33053.
2017-05-16 21:29:22 +00:00
aarch64-named-reg-w18.ll
[AArch64] Allow global register asm("x18") or asm("w18") under -ffixed-x18
2017-04-07 20:41:58 +00:00
aarch64-named-reg-x18.ll
[AArch64] Allow global register asm("x18") or asm("w18") under -ffixed-x18
2017-04-07 20:41:58 +00:00
aarch64-neon-v1i1-setcc.ll
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aarch64-smax-constantfold.ll
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aarch64-smull.ll
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aarch64-stp-cluster.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
aarch64-tbz.ll
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aarch64-tryBitfieldInsertOpFromOr-crash.ll
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aarch64-vcvtfp2fxs-combine.ll
…
aarch64-wide-shuffle.ll
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aarch-multipart.ll
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adc.ll
…
addcarry-crash.ll
Fix addcarry-crash.ll
2017-06-01 14:24:31 +00:00
addsub_ext.ll
…
addsub-shifted.ll
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addsub.ll
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alloca.ll
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analyze-branch.ll
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analyzecmp.ll
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and-mask-removal.ll
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and-sink.ll
[CodeGenPrepare] Sink and duplicate more 'and' instructions.
2017-02-21 18:53:14 +00:00
andandshift.ll
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argument-blocks.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
arm64-2011-03-09-CPSRSpill.ll
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arm64-2011-03-17-AsmPrinterCrash.ll
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arm64-2011-03-21-Unaligned-Frame-Index.ll
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arm64-2011-04-21-CPSRBug.ll
…
arm64-2011-10-18-LdStOptBug.ll
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arm64-2012-01-11-ComparisonDAGCrash.ll
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arm64-2012-05-07-DAGCombineVectorExtract.ll
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arm64-2012-05-07-MemcpyAlignBug.ll
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arm64-2012-05-09-LOADgot-bug.ll
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arm64-2012-05-22-LdStOptBug.ll
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arm64-2012-06-06-FPToUI.ll
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arm64-2012-07-11-InstrEmitterBug.ll
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arm64-2013-01-13-ffast-fcmp.ll
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arm64-2013-01-23-frem-crash.ll
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arm64-2013-01-23-sext-crash.ll
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arm64-2013-02-12-shufv8i8.ll
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arm64-aapcs-be.ll
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arm64-aapcs.ll
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arm64-abi_align.ll
Revert "[DAG] Improve Aliasing of operations to static alloca"
2017-07-10 20:51:30 +00:00
arm64-abi-varargs.ll
Revert "[DAG] Improve Aliasing of operations to static alloca"
2017-07-10 20:51:30 +00:00
arm64-abi.ll
[DAG] Improve store merge candidate pruning.
2017-04-18 15:36:34 +00:00
arm64-addp.ll
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arm64-addr-mode-folding.ll
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arm64-addr-type-promotion.ll
[CodeGenPrep] move aarch64-type-promotion to CGP
2017-04-03 19:20:07 +00:00
arm64-addrmode.ll
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arm64-AdvSIMD-Scalar.ll
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arm64-alloc-no-stack-realign.ll
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arm64-alloca-frame-pointer-offset.ll
Revert "[DAG] Improve Aliasing of operations to static alloca"
2017-07-10 20:51:30 +00:00
arm64-andCmpBrToTBZ.ll
…
arm64-ands-bad-peephole.ll
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arm64-AnInfiniteLoopInDAGCombine.ll
…
arm64-anyregcc-crash.ll
…
arm64-anyregcc.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
arm64-arith-saturating.ll
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arm64-arith.ll
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arm64-arm64-dead-def-elimination-flag.ll
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arm64-atomic-128.ll
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arm64-atomic.ll
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arm64-basic-pic.ll
…
arm64-bcc.ll
…
arm64-big-endian-bitconverts.ll
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arm64-big-endian-eh.ll
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arm64-big-endian-varargs.ll
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arm64-big-endian-vector-callee.ll
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arm64-big-endian-vector-caller.ll
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arm64-big-imm-offsets.ll
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arm64-big-stack.ll
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arm64-bitfield-extract.ll
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arm64-blockaddress.ll
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arm64-build-vector.ll
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arm64-builtins-linux.ll
[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia
2017-04-04 19:51:53 +00:00
arm64-call-tailcalls.ll
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arm64-cast-opt.ll
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arm64-ccmp-heuristics.ll
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arm64-ccmp.ll
[AArch64] Update successor probabilities after ccmp-conversion
2017-06-27 15:00:22 +00:00
arm64-clrsb.ll
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arm64-coalesce-ext.ll
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arm64-coalescing-MOVi32imm.ll
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arm64-code-model-large-abs.ll
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arm64-codegen-prepare-extload.ll
[CodeGenPrep]Restructure promoting Ext to form ExtLoad
2017-03-17 19:05:21 +00:00
arm64-collect-loh-garbage-crash.ll
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arm64-collect-loh-str.ll
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arm64-collect-loh.ll
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arm64-complex-copy-noneon.ll
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arm64-complex-ret.ll
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arm64-const-addr.ll
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arm64-convert-v4f64.ll
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arm64-copy-tuple.ll
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arm64-crc32.ll
Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg
2017-03-12 14:02:32 +00:00
arm64-crypto.ll
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arm64-cse.ll
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arm64-csel.ll
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arm64-csldst-mmo.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-cvt.ll
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arm64-dagcombiner-convergence.ll
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arm64-dagcombiner-dead-indexed-load.ll
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arm64-dagcombiner-load-slicing.ll
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arm64-dead-def-frame-index.ll
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arm64-dead-register-def-bug.ll
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arm64-detect-vec-redux.ll
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arm64-dup.ll
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arm64-early-ifcvt.ll
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
2017-06-23 19:20:12 +00:00
arm64-elf-calls.ll
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arm64-elf-constpool.ll
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arm64-elf-globals.ll
[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia
2017-04-04 19:51:53 +00:00
arm64-EXT-undef-mask.ll
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arm64-ext.ll
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arm64-extend-int-to-fp.ll
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arm64-extend.ll
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arm64-extern-weak.ll
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arm64-extload-knownzero.ll
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arm64-extract_subvector.ll
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arm64-extract.ll
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arm64-fast-isel-addr-offset.ll
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arm64-fast-isel-alloca.ll
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arm64-fast-isel-br.ll
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arm64-fast-isel-call.ll
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arm64-fast-isel-conversion-fallback.ll
[AArch64] Add fallback in FastISel fp16 conversions
2017-06-09 22:40:50 +00:00
arm64-fast-isel-conversion.ll
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arm64-fast-isel-fcmp.ll
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arm64-fast-isel-gv.ll
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arm64-fast-isel-icmp.ll
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arm64-fast-isel-indirectbr.ll
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arm64-fast-isel-intrinsic.ll
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arm64-fast-isel-materialize.ll
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arm64-fast-isel-noconvert.ll
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arm64-fast-isel-rem.ll
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arm64-fast-isel-ret.ll
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arm64-fast-isel-store.ll
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arm64-fast-isel.ll
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arm64-fastcc-tailcall.ll
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arm64-fastisel-gep-promote-before-add.ll
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arm64-fcmp-opt.ll
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arm64-fcopysign.ll
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arm64-fixed-point-scalar-cvt-dagcombine.ll
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arm64-fma-combine-with-fpfusion.ll
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arm64-fma-combines.ll
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arm64-fmadd.ll
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arm64-fmax-safe.ll
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arm64-fmax.ll
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arm64-fminv.ll
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arm64-fml-combines.ll
[AArch64][MachineCombine] Fold FNMUL+FSUB -> FNMADD.
2017-05-11 20:07:24 +00:00
arm64-fmuladd.ll
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arm64-fold-address.ll
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arm64-fold-lsl.ll
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arm64-fp128-folding.ll
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arm64-fp128.ll
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arm64-fp-contract-zero.ll
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arm64-fp-imm.ll
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arm64-fp.ll
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arm64-frame-index.ll
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arm64-global-address.ll
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arm64-hello.ll
AArch64: use linker-private symbols for globals in MachO.
2017-05-15 21:51:38 +00:00
arm64-i16-subreg-extract.ll
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arm64-icmp-opt.ll
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arm64-illegal-float-ops.ll
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arm64-indexed-memory.ll
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arm64-indexed-vector-ldst-2.ll
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arm64-indexed-vector-ldst.ll
[AArch64] Avoid partial register writes on lane 0 of BUILD_VECTOR for i8/i16/f16
2017-04-13 23:32:47 +00:00
arm64-inline-asm-error-I.ll
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arm64-inline-asm-error-J.ll
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arm64-inline-asm-error-K.ll
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arm64-inline-asm-error-L.ll
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arm64-inline-asm-error-M.ll
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arm64-inline-asm-error-N.ll
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arm64-inline-asm-zero-reg-error.ll
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arm64-inline-asm.ll
[AArch64]: add 'a' inline asm operand modifier.
2017-05-25 19:07:57 +00:00
arm64-join-reserved.ll
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arm64-jumptable.ll
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arm64-large-frame.ll
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arm64-ld1.ll
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arm64-ld-from-st.ll
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arm64-ldp-aa.ll
…
arm64-ldp-cluster.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-ldp.ll
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arm64-ldur.ll
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arm64-ldxr-stxr.ll
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arm64-leaf.ll
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arm64-long-shift.ll
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arm64-memcpy-inline.ll
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arm64-memset-inline.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
arm64-memset-to-bzero.ll
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arm64-misaligned-memcpy-inline.ll
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arm64-misched-basic-A53.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-misched-basic-A57.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-misched-forwarding-A53.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-misched-memdep-bug.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-misched-multimmo.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
arm64-movi.ll
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arm64-mul.ll
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arm64-named-reg-alloc.ll
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arm64-named-reg-notareg.ll
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arm64-narrow-st-merge.ll
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arm64-neg.ll
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arm64-neon-2velem-high.ll
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arm64-neon-2velem.ll
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arm64-neon-3vdiff.ll
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arm64-neon-aba-abd.ll
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arm64-neon-across.ll
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arm64-neon-add-pairwise.ll
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arm64-neon-add-sub.ll
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arm64-neon-compare-instructions.ll
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arm64-neon-copy.ll
[DAGCombiner] Add another combine from build vector to shuffle
2017-06-21 07:38:41 +00:00
arm64-neon-copyPhysReg-tuple.ll
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arm64-neon-mul-div.ll
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arm64-neon-scalar-by-elem-mul.ll
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arm64-neon-select_cc.ll
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arm64-neon-simd-ldst-one.ll
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arm64-neon-simd-shift.ll
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arm64-neon-simd-vget.ll
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arm64-neon-v1i1-setcc.ll
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arm64-neon-v8.1a.ll
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arm64-neon-vector-list-spill.ll
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arm64-nvcast.ll
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arm64-opt-remarks-lazy-bfi.ll
[LazyMachineBFI] Add testcase
2017-02-24 01:22:55 +00:00
arm64-patchpoint-scratch-regs.ll
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arm64-patchpoint-webkit_jscc.ll
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arm64-patchpoint.ll
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arm64-pic-local-symbol.ll
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arm64-platform-reg.ll
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arm64-popcnt.ll
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arm64-prefetch.ll
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arm64-promote-const.ll
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arm64-redzone.ll
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arm64-reg-copy-noneon.ll
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arm64-register-offset-addressing.ll
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arm64-register-pairing.ll
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arm64-regress-f128csel-flags.ll
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arm64-regress-interphase-shift.ll
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arm64-regress-opt-cmp.mir
MIRTests: Remove unnecessary 2>&1 redirection
2017-02-22 18:47:41 +00:00
arm64-return-vector.ll
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arm64-returnaddr.ll
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arm64-rev.ll
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arm64-rounding.ll
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arm64-scaled_iv.ll
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arm64-scvt.ll
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arm64-setcc-int-to-fp-combine.ll
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arm64-shifted-sext.ll
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arm64-shrink-v1i64.ll
fix trivial typos in comment, NFC
2017-06-24 16:00:26 +00:00
arm64-shrink-wrapping.ll
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
2017-06-23 19:20:12 +00:00
arm64-simd-scalar-to-vector.ll
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arm64-simplest-elf.ll
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arm64-sincos.ll
[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno
2017-06-12 17:15:41 +00:00
arm64-sitofp-combine-chains.ll
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arm64-sli-sri-opt.ll
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arm64-smaxv.ll
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arm64-sminv.ll
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arm64-spill-lr.ll
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arm64-spill-remarks.ll
[ORE] Add diagnostics hotness threshold
2017-06-30 23:14:53 +00:00
arm64-spill.ll
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arm64-sqshl-uqshl-i64Contant.ll
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arm64-st1.ll
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arm64-stack-no-frame.ll
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arm64-stackmap-nops.ll
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arm64-stackmap.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
arm64-stackpointer.ll
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arm64-stacksave.ll
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arm64-stp-aa.ll
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arm64-stp.ll
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arm64-strict-align.ll
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arm64-stur.ll
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arm64-subsections.ll
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arm64-subvector-extend.ll
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arm64-summary-remarks.ll
OptDiag: Add test for r296053
2017-02-24 01:13:09 +00:00
arm64-swizzle-tbl-i16-layout.ll
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arm64-tbl.ll
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arm64-this-return.ll
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arm64-tls-darwin.ll
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arm64-tls-dynamic-together.ll
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arm64-tls-dynamics.ll
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
arm64-tls-execs.ll
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arm64-trap.ll
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arm64-triv-disjoint-mem-access.ll
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arm64-trn.ll
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arm64-trunc-store.ll
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arm64-umaxv.ll
…
arm64-uminv.ll
…
arm64-umov.ll
…
arm64-unaligned_ldst.ll
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arm64-uzp.ll
…
arm64-vaargs.ll
…
arm64-vabs.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
arm64-vadd.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
arm64-vaddlv.ll
…
arm64-vaddv.ll
…
arm64-variadic-aapcs.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
arm64-vbitwise.ll
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arm64-vclz.ll
…
arm64-vcmp.ll
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arm64-vcnt.ll
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arm64-vcombine.ll
…
arm64-vcvt_f32_su32.ll
…
arm64-vcvt_f.ll
…
arm64-vcvt_n.ll
…
arm64-vcvt_su32_f32.ll
…
arm64-vcvt.ll
…
arm64-vcvtxd_f32_f64.ll
…
arm64-vecCmpBr.ll
…
arm64-vecFold.ll
…
arm64-vector-ext.ll
…
arm64-vector-imm.ll
…
arm64-vector-insertion.ll
…
arm64-vector-ldst.ll
…
arm64-vext_reverse.ll
…
arm64-vext.ll
Revert "[DAG] Improve Aliasing of operations to static alloca"
2017-07-10 20:51:30 +00:00
arm64-vfloatintrinsics.ll
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arm64-vhadd.ll
…
arm64-vhsub.ll
…
arm64-virtual_base.ll
…
arm64-vmax.ll
…
arm64-vminmaxnm.ll
…
arm64-vmovn.ll
…
arm64-vmul.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
arm64-volatile.ll
…
arm64-vpopcnt.ll
…
arm64-vqadd.ll
…
arm64-vqsub.ll
…
arm64-vselect.ll
…
arm64-vsetcc_fp.ll
…
arm64-vshift.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
arm64-vshr.ll
…
arm64-vshuffle.ll
…
arm64-vsqrt.ll
…
arm64-vsra.ll
…
arm64-vsub.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
arm64-weak-reference.ll
…
arm64-xaluo.ll
…
arm64-zero-cycle-regmov.ll
…
arm64-zero-cycle-zeroing.ll
…
arm64-zeroreg.ll
…
arm64-zext.ll
…
arm64-zextload-unscaled.ll
[AARCH64] Enable AARCH64 lit tests on windows dev machines
2016-07-19 13:35:11 +00:00
arm64-zip.ll
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asm-large-immediate.ll
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asm-print-comments.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
assertion-rc-mismatch.ll
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atomic-ops-lse.ll
[AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics.
2017-06-21 15:18:39 +00:00
atomic-ops-not-barriers.ll
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atomic-ops.ll
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basic-pic.ll
…
bics.ll
…
bitcast-v2i8.ll
…
bitcast.ll
…
bitfield-extract.ll
…
bitfield-insert-0.ll
…
bitfield-insert.ll
…
bitfield.ll
…
bitreverse.ll
…
blockaddress.ll
…
bool-loads.ll
…
br-cond-not-merge.ll
…
br-to-eh-lpad.ll
…
br-undef-cond.ll
…
branch-folder-merge-mmos.ll
…
branch-relax-alignment.ll
…
branch-relax-asm.ll
…
branch-relax-bcc.ll
…
branch-relax-cbz.ll
Codegen: Make chains from trellis-shaped CFGs
2017-02-15 19:49:14 +00:00
breg.ll
…
bswap-known-bits.ll
…
callee-save.ll
…
ccmp-successor-probs.mir
[AArch64] Update successor probabilities after ccmp-conversion
2017-06-27 15:00:22 +00:00
cmp-const-max.ll
…
cmpwithshort.ll
…
cmpxchg-idioms.ll
…
cmpxchg-O0.ll
AArch64: Fix cmpxchg O0 expansion
2017-05-26 23:48:59 +00:00
code-model-large-abs.ll
…
combine-comparisons-by-cse.ll
CodeGen: BlockPlacement: Minor probability changes.
2017-04-10 22:28:18 +00:00
compare-branch.ll
…
compiler-ident.ll
…
complex-copy-noneon.ll
…
complex-fp-to-int.ll
…
complex-int-to-fp.ll
…
concat_vector-scalar-combine.ll
[AArch64] Avoid partial register writes on lane 0 of BUILD_VECTOR for i8/i16/f16
2017-04-13 23:32:47 +00:00
concat_vector-truncate-combine.ll
…
concat_vector-truncated-scalar-combine.ll
…
cond-br-tuning.ll
[AArch64] AArch64CondBrTuningPass generates wrong branch instructions
2017-06-28 15:09:11 +00:00
cond-sel-value-prop.ll
…
cond-sel.ll
…
cpus.ll
[AArch64] Vulcan is now ThunderXT99
2017-03-07 19:42:40 +00:00
csel-zero-float.ll
…
cxx-tlscc.ll
…
dag-combine-invaraints.ll
Revert "[DAG] Improve Aliasing of operations to static alloca"
2017-07-10 20:51:30 +00:00
dag-combine-mul-shl.ll
…
dag-combine-select.ll
…
dag-numsignbits.ll
[SelectionDAG] Support BUILD_VECTOR implicit truncation in SelectionDAG::ComputeNumSignBits (PR32273)
2017-03-15 16:22:24 +00:00
directcond.ll
…
div_minsize.ll
…
divrem.ll
…
dont-take-over-the-world.ll
…
dp1.ll
…
dp2.ll
…
dp-3source.ll
…
eliminate-trunc.ll
…
emutls_generic.ll
…
emutls.ll
…
eon.ll
…
extern-weak.ll
…
extract.ll
…
f16-convert.ll
…
f16-instructions.ll
…
fadd-combines.ll
[DAGCombine] Transform (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)).
2017-05-04 14:14:44 +00:00
fast-isel-address-extends.ll
…
fast-isel-addressing-modes.ll
…
fast-isel-assume.ll
…
fast-isel-atomic.ll
…
fast-isel-branch_weights.ll
…
fast-isel-branch-cond-mask.ll
…
fast-isel-branch-cond-split.ll
…
fast-isel-call-return.ll
…
fast-isel-cbz.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp-vec.ll
…
fast-isel-cmpxchg.ll
AArch64: Fix cmpxchg O0 expansion
2017-05-26 23:48:59 +00:00
fast-isel-folded-shift.ll
…
fast-isel-folding.ll
…
fast-isel-gep.ll
…
fast-isel-int-ext2.ll
…
fast-isel-int-ext3.ll
…
fast-isel-int-ext4.ll
…
fast-isel-int-ext5.ll
…
fast-isel-int-ext.ll
…
fast-isel-intrinsic.ll
…
fast-isel-logic-op.ll
…
fast-isel-memcpy.ll
…
fast-isel-mul.ll
…
fast-isel-runtime-libcall.ll
…
fast-isel-sdiv.ll
…
fast-isel-select.ll
…
fast-isel-shift.ll
…
fast-isel-sp-adjust.ll
AArch64: don't try to emit an add (shifted reg) for SP.
2017-06-12 20:49:53 +00:00
fast-isel-sqrt.ll
…
fast-isel-switch-phi.ll
…
fast-isel-tail-call.ll
[CodeGen] Pass SDAG an ORE, and replace FastISel stats with remarks.
2017-03-30 17:49:58 +00:00
fast-isel-tbz.ll
[CodeGenPrepare] Sink and duplicate more 'and' instructions.
2017-02-21 18:53:14 +00:00
fast-isel-trunc.ll
…
fast-isel-vector-arithmetic.ll
…
fast-isel-vret.ll
…
fastcc-reserved.ll
…
fastcc.ll
…
fcmp.ll
…
fcopysign.ll
…
fcsel-zero.ll
…
fcvt_combine.ll
…
fcvt-fixed.ll
…
fcvt-int.ll
…
fdiv_combine.ll
…
fdiv-combine.ll
…
fence-singlethread.ll
AArch64: add test for "fence singlethread"
2017-04-21 20:36:08 +00:00
flags-multiuse.ll
…
floatdp_1source.ll
…
floatdp_2source.ll
…
fold-constants.ll
…
fp16-v4-instructions.ll
…
fp16-v8-instructions.ll
…
fp16-v16-instructions.ll
…
fp16-vector-bitcast.ll
…
fp16-vector-load-store.ll
…
fp16-vector-nvcast.ll
…
fp16-vector-shuffle.ll
…
fp128-folding.ll
…
fp-cond-sel.ll
…
fp-dp3.ll
…
fpconv-vector-op-scalarize.ll
…
fpimm.ll
…
fptouint-i8-zext.ll
…
frameaddr.ll
…
free-zext.ll
…
func-argpassing.ll
…
func-calls.ll
…
funcptr_cast.ll
…
function-subtarget-features.ll
…
gep-nullptr.ll
…
ghc-cc.ll
…
global-alignment.ll
…
global-merge-1.ll
…
global-merge-2.ll
…
global-merge-3.ll
…
global-merge-4.ll
…
global-merge-group-by-use.ll
…
global-merge-ignore-single-use-minsize.ll
…
global-merge-ignore-single-use.ll
…
global-merge.ll
…
got-abuse.ll
…
half.ll
…
hints.ll
…
i1-contents.ll
…
i128-align.ll
…
i128-fast-isel-fallback.ll
…
ifcvt-select.ll
…
illegal-float-ops.ll
…
implicit-sret.ll
…
init-array.ll
…
inline-asm-constraints-badI.ll
…
inline-asm-constraints-badK2.ll
…
inline-asm-constraints-badK.ll
…
inline-asm-constraints-badL.ll
…
inline-asm-globaladdress.ll
…
inlineasm-ldr-pseudo.ll
…
inlineasm-X-allocation.ll
…
inlineasm-X-constraint.ll
…
intrinsics-memory-barrier.ll
…
jump-table.ll
…
large_shift.ll
…
large-consts.ll
…
ldp-stp-scaled-unscaled-pairs.ll
…
ldst-opt-aa.mir
[AArch64] Use alias analysis in the load/store optimization pass.
2017-03-17 14:19:55 +00:00
ldst-opt-zr-clobber.mir
…
ldst-opt.ll
Add Aarch64 ldst-opt test.
2017-06-21 20:50:07 +00:00
ldst-opt.mir
AArch64: remove all kill flags when extending register liveness.
2017-06-26 18:49:25 +00:00
ldst-paired-aliasing.ll
…
ldst-regoffset.ll
…
ldst-unscaledimm.ll
…
ldst-unsignedimm.ll
…
ldst-zero.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
legalize-bug-bogus-cpu.ll
…
lit.local.cfg
…
literal_pools_float.ll
…
live-interval-analysis.mir
AArch64/PEI: Do not add reserved regs to liveins
2017-05-27 03:38:02 +00:00
load-combine-big-endian.ll
[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine
2017-03-01 18:12:29 +00:00
load-combine.ll
[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine
2017-03-01 18:12:29 +00:00
local_vars.ll
…
logical_shifted_reg.ll
…
logical-imm.ll
…
loh.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
lower-range-metadata-func-call.ll
…
machine_cse_impdef_killflags.ll
…
machine_cse.ll
…
machine-combiner-madd.ll
[AArch64] Vulcan is now ThunderXT99
2017-03-07 19:42:40 +00:00
machine-combiner.ll
…
machine-copy-prop.ll
…
machine-copy-remove.ll
…
machine-copy-remove.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
machine-dead-copy.mir
…
machine-outliner.ll
[Outliner] Add outliner for AArch64
2017-03-17 22:26:55 +00:00
machine-scheduler.mir
…
machine-sink-kill-flags.ll
…
machine-sink-zr.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
macho-global-symbols.ll
AArch64: use linker-private symbols for globals in MachO.
2017-05-15 21:51:38 +00:00
madd-combiner.ll
…
madd-lohi.ll
…
mature-mc-support.ll
…
max-jump-table.ll
…
memcpy-f128.ll
…
merge-store-dependency.ll
…
merge-store.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
mergestores_noimplicitfloat.ll
Add test for store merge with noimplicitfloat
2017-06-19 15:18:20 +00:00
min-jump-table.ll
…
minmax.ll
…
misched-fusion-aes.ll
[AArch64] Enable FeatureFuseAES for the generic processor model.
2017-06-15 09:31:23 +00:00
misched-fusion-lit.ll
[AArch64] Add test case for fusion of literal generation
2017-02-21 22:16:09 +00:00
misched-fusion.ll
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
2017-06-23 19:20:12 +00:00
misched-stp.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
movimm-wzr.mir
MIRTests: Remove unnecessary 2>&1 redirection
2017-02-22 18:47:41 +00:00
movw-consts.ll
…
movw-shift-encoding.ll
…
mul_pow2.ll
…
mul-lohi.ll
…
neg-imm.ll
…
neon-bitcast.ll
…
neon-bitwise-instructions.ll
…
neon-compare-instructions.ll
…
neon-diagnostics.ll
…
neon-extract.ll
…
neon-fma-FMF.ll
[DAGCombine] Support FMF contract in fused multiple-and-sub too
2017-04-05 17:58:48 +00:00
neon-fma.ll
…
neon-fpround_f128.ll
…
neon-idiv.ll
…
neon-inline-asm-16-bit-fp.ll
…
neon-mla-mls.ll
…
neon-mov.ll
…
neon-or-combine.ll
…
neon-perm.ll
…
neon-scalar-by-elem-fma.ll
…
neon-scalar-copy.ll
…
neon-shift-left-long.ll
…
neon-truncStore-extLoad.ll
…
nest-register.ll
…
no-quad-ldp-stp.ll
…
nonlazybind.ll
AArch64: put nonlazybind special handling behind a flag for now.
2017-04-17 18:18:47 +00:00
nontemporal.ll
…
nzcv-save.ll
…
optimize-cond-branch.ll
Codegen: Make chains from trellis-shaped CFGs
2017-02-15 19:49:14 +00:00
optimize-imm.ll
[AArch64] Fix PRR33100.
2017-05-23 06:08:37 +00:00
or-combine.ll
…
paired-load.ll
…
PBQP-chain.ll
…
PBQP-coalesce-benefit.ll
…
PBQP-csr.ll
…
PBQP.ll
…
phi-dbg.ll
…
pic-eh-stubs.ll
…
pie.ll
…
postra-mi-sched.ll
…
pr27816.ll
Add test case for merging of chained stores of mismatched type.
2017-03-20 19:48:22 +00:00
pr33172.ll
[DAG] Avoid use of stale store.
2017-05-31 13:36:17 +00:00
preferred-alignment.ll
…
preferred-function-alignment.ll
[AArch64] Use 16 bytes as preferred function alignment on Cortex-A57.
2017-07-07 10:43:01 +00:00
prefixdata.ll
Ensure that prefix data is preserved with subsections-via-symbols
2017-03-15 04:18:16 +00:00
preserve_mostcc.ll
…
print-mrs-system-register.ll
…
ragreedy-csr.ll
…
rbit.ll
…
readcyclecounter.ll
…
recp-fastmath.ll
…
redundant-copy-elim-empty-mbb.ll
…
Redundantstore.ll
…
reg-scavenge-frame.mir
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
regcoal-physreg.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
regress-bitcast-formals.ll
…
regress-f128csel-flags.ll
…
regress-fp128-livein.ll
…
regress-tail-livereg.ll
…
regress-tblgen-chains.ll
…
regress-w29-reserved-with-fp.ll
…
rem_crash.ll
…
remat-float0.ll
…
remat.ll
[AArch64] Vulcan is now ThunderXT99
2017-03-07 19:42:40 +00:00
returnaddr.ll
…
rm_redundant_cmp.ll
…
rotate.ll
…
round-conv.ll
…
sched-past-vector-ldst.ll
…
scheduledag-constreg.mir
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
sdivpow2.ll
…
selectcc-to-shiftand.ll
…
selectiondag-order.ll
…
setcc-takes-i32.ll
…
setcc-type-mismatch.ll
…
shrink-wrap.ll
…
sibling-call.ll
…
simple-macho.ll
…
sincos-expansion.ll
[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno
2017-06-12 17:15:41 +00:00
sincospow-vector-expansion.ll
…
sitofp-fixed-legal.ll
…
special-reg.ll
…
spill-fold.ll
…
spill-undef.mir
[InlineSpiller] Don't spill fully undef values
2017-06-05 23:51:27 +00:00
sqrt-fastmath.ll
…
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-guard-remat-bitcast.ll
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
2017-06-23 19:20:12 +00:00
stack-protector-target.ll
[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia
2017-04-04 19:51:53 +00:00
stackmap-frame-setup.ll
Add extra operand to CALLSEQ_START to keep frame part set up previously
2017-05-09 13:35:13 +00:00
stackmap-liveness.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
store_merge_pair_offset.ll
…
subs-to-sub-opt.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
Revert "[DAG] Improve Aliasing of operations to static alloca"
2017-07-10 20:51:30 +00:00
swiftself-scavenger.ll
RegisterScavenging: Followup to r305625
2017-06-20 18:43:14 +00:00
swiftself.ll
…
tail-call.ll
…
tailcall_misched_graph.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
tailcall-ccmismatch.ll
…
tailcall-explicit-sret.ll
…
tailcall-fastisel.ll
…
tailcall-implicit-sret.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-string-rvo.ll
Add a similar test for tailcall optimization as in r270287 for aarch64.
2017-03-28 22:37:43 +00:00
tailmerging_in_mbp.ll
…
tbi.ll
…
tbz-tbnz.ll
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
2017-06-23 19:20:12 +00:00
thread-pointer.ll
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
2017-06-23 19:20:12 +00:00
trunc-v1i64.ll
…
tst-br.ll
…
vcvt-oversize.ll
…
vector_merge_dep_check.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
vector-fcopysign.ll
…
xbfiz.ll
…
xray-attribute-instrumentation.ll
[XRay] Reduce synthetic references emitted by XRay
2017-06-21 06:39:42 +00:00
xray-tail-call-sled.ll
[XRay] Reduce synthetic references emitted by XRay
2017-06-21 06:39:42 +00:00
zero-reg.ll
…