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e927841848
As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows This will hopefully help stop cases where windows developers break the aarch64 target Differential Revision: https://reviews.llvm.org/D22191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275973 91177308-0d34-0410-b5e6-96231b3b80d8
84 lines
3.3 KiB
LLVM
84 lines
3.3 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
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define <2 x float> @f1(<2 x float> %a, <2 x float> %b) nounwind readnone ssp {
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; CHECK: fmaxnm.2s v0, v0, v1
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; CHECK: ret
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%vmaxnm2.i = tail call <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind
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ret <2 x float> %vmaxnm2.i
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}
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define <4 x float> @f2(<4 x float> %a, <4 x float> %b) nounwind readnone ssp {
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; CHECK: fmaxnm.4s v0, v0, v1
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; CHECK: ret
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%vmaxnm2.i = tail call <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind
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ret <4 x float> %vmaxnm2.i
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}
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define <2 x double> @f3(<2 x double> %a, <2 x double> %b) nounwind readnone ssp {
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; CHECK: fmaxnm.2d v0, v0, v1
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; CHECK: ret
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%vmaxnm2.i = tail call <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind
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ret <2 x double> %vmaxnm2.i
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}
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define <2 x float> @f4(<2 x float> %a, <2 x float> %b) nounwind readnone ssp {
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; CHECK: fminnm.2s v0, v0, v1
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; CHECK: ret
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%vminnm2.i = tail call <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind
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ret <2 x float> %vminnm2.i
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}
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define <4 x float> @f5(<4 x float> %a, <4 x float> %b) nounwind readnone ssp {
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; CHECK: fminnm.4s v0, v0, v1
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; CHECK: ret
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%vminnm2.i = tail call <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind
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ret <4 x float> %vminnm2.i
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}
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define <2 x double> @f6(<2 x double> %a, <2 x double> %b) nounwind readnone ssp {
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; CHECK: fminnm.2d v0, v0, v1
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; CHECK: ret
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%vminnm2.i = tail call <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind
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ret <2 x double> %vminnm2.i
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}
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define float @f7(float %a, float %b) nounwind readnone ssp {
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; CHECK: fmaxnm s0, s0, s1
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; CHECK: ret
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%vmaxnm2.i = tail call float @llvm.aarch64.neon.fmaxnm.f32(float %a, float %b) nounwind
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ret float %vmaxnm2.i
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}
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define double @f8(double %a, double %b) nounwind readnone ssp {
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; CHECK: fminnm d0, d0, d1
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; CHECK: ret
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%vmaxnm2.i = tail call double @llvm.aarch64.neon.fminnm.f64(double %a, double %b) nounwind
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ret double %vmaxnm2.i
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}
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declare <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double>, <2 x double>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
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declare <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
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declare <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double>, <2 x double>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
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declare <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
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declare float @llvm.aarch64.neon.fmaxnm.f32(float, float) nounwind readnone
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declare double @llvm.aarch64.neon.fminnm.f64(double, double) nounwind readnone
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define double @test_fmaxnmv(<2 x double> %in) {
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; CHECK-LABEL: test_fmaxnmv:
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; CHECK: fmaxnmp.2d d0, v0
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%max = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in)
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ret double %max
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}
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define double @test_fminnmv(<2 x double> %in) {
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; CHECK-LABEL: test_fminnmv:
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; CHECK: fminnmp.2d d0, v0
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%min = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in)
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ret double %min
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}
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declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>)
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declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>)
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