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e927841848
As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows This will hopefully help stop cases where windows developers break the aarch64 target Differential Revision: https://reviews.llvm.org/D22191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275973 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
971 B
LLVM
23 lines
971 B
LLVM
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
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define <16 x i8> @foo(<16 x i8> %a) nounwind optsize readnone ssp {
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; CHECK: uaddlv.16b h0, v0
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; CHECK: rshrn.8b v0, v0, #4
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; CHECK: dup.16b v0, v0[0]
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; CHECK: ret
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; CHECK-FAST: uaddlv.16b
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; CHECK-FAST: rshrn.8b
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; CHECK-FAST: dup.16b
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%tmp = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) nounwind
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%tmp1 = trunc i32 %tmp to i16
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%tmp2 = insertelement <8 x i16> undef, i16 %tmp1, i32 0
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%tmp3 = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %tmp2, i32 4)
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%tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <16 x i32> zeroinitializer
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ret <16 x i8> %tmp4
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}
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declare <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16>, i32) nounwind readnone
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declare i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8>) nounwind readnone
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