Eric Christopher 7c5314a076 Make this test even more OS and register allocation neutral. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230404 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-25 00:12:11 +00:00
..
AArch64	AArch64: Relax assert about large shift sizes.	2015-02-24 18:52:04 +00:00
ARM	Added test case for PR22678 (check CONCAT_VECTORS DAG combiner pass doesn't introduce illegal types)	2015-02-24 21:46:23 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips	Beginning of alloca implementation for Mips fast-isel	2015-02-24 02:36:45 +00:00
MSP430
NVPTX
PowerPC	I incorrectly marked the VORC instruction as isCommutable when I added it.	2015-02-20 15:54:58 +00:00
R600	R600/SI: Remove isel mubuf legalization	2015-02-24 17:59:19 +00:00
SPARC	SelectionDAG: fold (fp_to_u/sint (s/uint_to_fp)) here too	2015-02-16 21:47:58 +00:00
SystemZ	[SystemZ] Support all TLS access models - CodeGen part	2015-02-18 09:13:27 +00:00
Thumb
Thumb2
X86	Make this test even more OS and register allocation neutral.	2015-02-25 00:12:11 +00:00
XCore	Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation	2015-02-20 02:15:36 +00:00