Sanjay Patel 8253e24b39 [DAGCombiner] add (sext i1 X), 1 --> zext (not i1 X) ... Besides better codegen, the motivation is to be able to canonicalize this pattern in IR (currently we don't) knowing that the backend is prepared for that. This may also allow removing code for special constant cases in DAGCombiner::foldSelectOfConstants() that was added in D30180. Differential Revision: https://reviews.llvm.org/D31944 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301457 91177308-0d34-0410-b5e6-96231b3b80d8		2017-04-26 20:26:46 +00:00
..
AArch64	Fix testcase: s/CHECKNEXT/CHECK-NEXT/	2017-04-22 23:43:44 +00:00
AMDGPU	AMDGPU: Fix ValueKind code object metadata for images	2017-04-25 20:38:26 +00:00
ARM	[DAGCombiner] add (sext i1 X), 1 --> zext (not i1 X)	2017-04-26 20:26:46 +00:00
AVR	[AVR] Support the LDWRdPtr instruction with the same Src+Dst register	2017-04-25 15:09:04 +00:00
BPF	[bpf] Fix memory offset check for loads and stores	2017-04-13 22:24:13 +00:00
Generic	[Hexagon] Unxfail passing tests	2017-04-13 16:05:35 +00:00
Hexagon	[Hexagon] Generate proper offset in opt-addr-mode	2017-04-19 15:15:51 +00:00
Inputs
Lanai
Mips	[mips] Fix test mips64fpldst.ll with machine verifier enabled	2017-04-26 11:40:12 +00:00
MIR
MSP430	[MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.	2017-04-26 00:33:59 +00:00
NVPTX
PowerPC	Don't emit CFI instructions at the end of a function	2017-04-24 18:45:59 +00:00
SPARC	Don't emit CFI instructions at the end of a function	2017-04-24 18:45:59 +00:00
SystemZ	[SystemZ] Update kill-flag in splitMove().	2017-04-24 12:40:28 +00:00
Thumb	[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs	2017-04-23 06:58:08 +00:00
Thumb2
WebAssembly	[WebAssembly] Fix WebAssemblyOptimizeReturned after r300367	2017-04-17 21:40:28 +00:00
WinEH
X86	[DAGCombiner] add (sext i1 X), 1 --> zext (not i1 X)	2017-04-26 20:26:46 +00:00
XCore