mirror of
https://github.com/RPCSX/llvm.git
synced 2025-01-06 12:04:52 +00:00
2a7f4178e4
Summary: D30400 has enabled tADC and tSBC instructions to be unglued, thereby allowing CPSR to remain live between Thumb1 scheduling units. Most Thumb1 instructions have an OptionalDef for CPSR; but the scheduler ignored the OptionalDefs, and could unwittingly insert a flag-setting instruction in between an ADDS and the corresponding ADC. Reviewers: javed.absar, atrick, MatzeB, t.p.northover, jmolloy, rengolin Reviewed By: javed.absar Subscribers: rogfer01, efriedma, aemerson, rengolin, llvm-commits, MatzeB Differential Revision: https://reviews.llvm.org/D31081 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301106 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
541 B
LLVM
19 lines
541 B
LLVM
; RUN: llc -mtriple=thumb-eabi %s -verify-machineinstrs -o - | FileCheck %s
|
|
; RUN: llc -mtriple=thumbv6-eabi %s -verify-machineinstrs -o - | FileCheck %s
|
|
|
|
define i1 @test(i64 %arg) {
|
|
entry:
|
|
%ispos = icmp sgt i64 %arg, -1
|
|
%neg = sub i64 0, %arg
|
|
%sel = select i1 %ispos, i64 %arg, i64 %neg
|
|
%cmp2 = icmp eq i64 %sel, %arg
|
|
ret i1 %cmp2
|
|
}
|
|
|
|
; The scheduler used to ignore OptionalDefs, and could unwittingly insert
|
|
; a flag-setting instruction in between an ADDS and the corresponding ADC.
|
|
|
|
; CHECK: adds
|
|
; CHECK-NOT: eors
|
|
; CHECK: adcs
|