llvm/test/CodeGen/Mips/eh-return64.ll
Daniel Sanders 0543dab791 [mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point
Summary:
Two exceptions to this:
  test/CodeGen/Mips/octeon.ll
  test/CodeGen/Mips/octeon_popcnt.ll
these test extensions to MIPS64

One test is altered for MIPS-IV:
  test/CodeGen/Mips/mips64countleading.ll
    Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests
    that dclo/dclz are not emitted.

Four tests fail and are not in this patch:
  test/CodeGen/Mips/abicalls.ll
  test/CodeGen/Mips/fcopysign-f32-f64.ll
  test/CodeGen/Mips/fcopysign.ll
  test/CodeGen/Mips/stack-alignment.ll

Depends on D3343

Reviewers: matheusalmeida, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206185 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-14 16:00:28 +00:00

91 lines
3.0 KiB
LLVM

; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
declare void @llvm.eh.return.i64(i64, i8*)
declare void @foo(...)
define void @f1(i64 %offset, i8* %handler) {
entry:
call void (...)* @foo()
call void @llvm.eh.return.i64(i64 %offset, i8* %handler)
unreachable
; CHECK: f1
; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
; check that $a0-$a3 are saved on stack.
; CHECK: sd $4, [[offset0:[0-9]+]]($sp)
; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
; CHECK: sd $6, [[offset2:[0-9]+]]($sp)
; CHECK: sd $7, [[offset3:[0-9]+]]($sp)
; check that .cfi_offset directives are emitted for $a0-$a3.
; CHECK: .cfi_offset 4,
; CHECK: .cfi_offset 5,
; CHECK: .cfi_offset 6,
; CHECK: .cfi_offset 7,
; check that stack adjustment and handler are put in $v1 and $v0.
; CHECK: move $[[R0:[a-z0-9]+]], $5
; CHECK: move $[[R1:[a-z0-9]+]], $4
; CHECK: move $3, $[[R1]]
; CHECK: move $2, $[[R0]]
; check that $a0-$a3 are restored from stack.
; CHECK: ld $4, [[offset0]]($sp)
; CHECK: ld $5, [[offset1]]($sp)
; CHECK: ld $6, [[offset2]]($sp)
; CHECK: ld $7, [[offset3]]($sp)
; check that stack is adjusted by $v1 and that code returns to address in $v0
; also check that $25 contains handler value
; CHECK: daddiu $sp, $sp, [[spoffset]]
; CHECK: move $25, $2
; CHECK: move $ra, $2
; CHECK: jr $ra
; CHECK: daddu $sp, $sp, $3
}
define void @f2(i64 %offset, i8* %handler) {
entry:
call void @llvm.eh.return.i64(i64 %offset, i8* %handler)
unreachable
; CHECK: f2
; CHECK: .cfi_startproc
; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
; CHECK: .cfi_def_cfa_offset [[spoffset]]
; check that $a0-$a3 are saved on stack.
; CHECK: sd $4, [[offset0:[0-9]+]]($sp)
; CHECK: sd $5, [[offset1:[0-9]+]]($sp)
; CHECK: sd $6, [[offset2:[0-9]+]]($sp)
; CHECK: sd $7, [[offset3:[0-9]+]]($sp)
; check that .cfi_offset directives are emitted for $a0-$a3.
; CHECK: .cfi_offset 4, -8
; CHECK: .cfi_offset 5, -16
; CHECK: .cfi_offset 6, -24
; CHECK: .cfi_offset 7, -32
; check that stack adjustment and handler are put in $v1 and $v0.
; CHECK: move $3, $4
; CHECK: move $2, $5
; check that $a0-$a3 are restored from stack.
; CHECK: ld $4, [[offset0]]($sp)
; CHECK: ld $5, [[offset1]]($sp)
; CHECK: ld $6, [[offset2]]($sp)
; CHECK: ld $7, [[offset3]]($sp)
; check that stack is adjusted by $v1 and that code returns to address in $v0
; also check that $25 contains handler value
; CHECK: daddiu $sp, $sp, [[spoffset]]
; CHECK: move $25, $2
; CHECK: move $ra, $2
; CHECK: jr $ra
; CHECK: daddu $sp, $sp, $3
; CHECK: .cfi_endproc
}