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92606b3cc6
llvm/test/CodeGen
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Nemanja Ivanovic 92606b3cc6 [PowerPC] Use rldicr instruction for AND with an immediate if possible 
Emit clrrdi (extended mnemonic for rldicr) for AND-ing with masks that
clear bits from the right hand size.

Committing on behalf of Hiroshi Inoue.

Differential Revision: https://reviews.llvm.org/D29388


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296143 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-24 18:03:16 +00:00
..
AArch64 [globalisel] Decouple src pattern operands from dst pattern operands. 2017-02-24 15:43:30 +00:00
AMDGPU [DAGCombiner] add missing folds for scalar select of {-1,0,1} 2017-02-24 17:17:33 +00:00
ARM [DAGCombiner] add missing folds for scalar select of {-1,0,1} 2017-02-24 17:17:33 +00:00
AVR [AVR] Disable integrated assembler for a few tests 2017-02-22 22:41:13 +00:00
BPF Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
Generic Implement intrinsic mangling for literal struct types. 2017-02-15 23:16:20 +00:00
Hexagon [DAGCombiner] add missing folds for scalar select of {-1,0,1} 2017-02-24 17:17:33 +00:00
Inputs
Lanai [lanai] Simplify small section check in LowerGlobalAddress and treat ldata sections specially. 2016-12-15 16:56:16 +00:00
Mips Recommit "[mips] Fix atomic compare and swap at O0." 2017-02-24 16:32:18 +00:00
MIR MIRTests: Remove unnecessary 2>&1 redirection 2017-02-22 18:47:41 +00:00
MSP430 Revert r269060 to pacify bots. 2017-02-24 01:22:19 +00:00
NVPTX [DAGCombiner] add missing folds for scalar select of {-1,0,1} 2017-02-24 17:17:33 +00:00
PowerPC [PowerPC] Use rldicr instruction for AND with an immediate if possible 2017-02-24 18:03:16 +00:00
SPARC Codegen: Make chains from trellis-shaped CFGs 2017-02-15 19:49:14 +00:00
SystemZ [TLI] Robustize SDAG LibFunc proto checking by merging it into TLI. 2017-02-03 19:11:19 +00:00
Thumb [ARM] Fix constant islands pass. 2017-02-22 09:06:21 +00:00
Thumb2 [ARM] Replace HasT2ExtractPack with HasDSP 2017-02-17 15:42:44 +00:00
WebAssembly [WebAssembly] Configure codegen to legalize f16 values. 2017-02-22 16:28:00 +00:00
WinEH Avoid infinite loops in branch folding 2016-12-12 23:05:38 +00:00
X86 [DAGCombiner] add missing folds for scalar select of {-1,0,1} 2017-02-24 17:17:33 +00:00
XCore Move some error handling down to MCStreamer. 2017-02-10 15:13:12 +00:00