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d2c33c4ecb
Summary: A lot of the pseudo instructions are required because LLVM assumes that all integers of the same size as the pointer size are legal. This means that it will not currently expand 16-bit instructions to their 8-bit variants because it thinks 16-bit types are legal for the operations. This also adds all of the CodeGen tests that required the pass to run. Reviewers: arsenm, kparzysz Subscribers: wdng, mgorny, modocache, llvm-commits Differential Revision: https://reviews.llvm.org/D26577 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287162 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
2.1 KiB
LLVM
66 lines
2.1 KiB
LLVM
; RUN: llc -mattr=mul < %s -march=avr | FileCheck %s
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declare float @dsin(float)
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declare float @dcos(float)
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declare float @dasin(float)
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; Test prologue and epilogue insertion
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define float @f3(float %days) {
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entry:
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; CHECK-LABEL: f3:
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; prologue code:
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; CHECK: push r28
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; CHECK: push r29
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; CHECK: in r28, 61
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; CHECK-NEXT: in r29, 62
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; CHECK-NEXT: sbiw r28, [[SIZE:[0-9]+]]
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; CHECK-NEXT: in r0, 63
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; CHECK-NEXT: cli
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; CHECK-NEXT: out 62, r29
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; CHECK-NEXT: out 63, r0
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; CHECK-NEXT: out 61, r28
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; epilogue code:
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; CHECK: adiw r28, [[SIZE]]
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; CHECK-NEXT: in r0, 63
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; CHECK-NEXT: cli
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; CHECK-NEXT: out 62, r29
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; CHECK-NEXT: out 63, r0
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; CHECK-NEXT: out 61, r28
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; CHECK: pop r29
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; CHECK: pop r28
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%mul = fmul float %days, 0x3FEF8A6C60000000
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%add = fadd float %mul, 0x40718776A0000000
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%mul1 = fmul float %days, 0x3FEF8A09A0000000
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%add2 = fadd float %mul1, 0x4076587740000000
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%mul3 = fmul float %days, 0x3E81B35CC0000000
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%sub = fsub float 0x3FFEA235C0000000, %mul3
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%call = call float @dsin(float %add2)
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%mul4 = fmul float %sub, %call
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%mul5 = fmul float %days, 0x3E27C04CA0000000
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%sub6 = fsub float 0x3F94790B80000000, %mul5
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%mul7 = fmul float %add2, 2.000000e+00
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%call8 = call float @dsin(float %mul7)
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%mul9 = fmul float %sub6, %call8
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%add10 = fadd float %mul4, %mul9
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%add11 = fadd float %add, %add10
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%mul12 = fmul float %days, 0x3E13C5B640000000
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%sub13 = fsub float 0x3F911C1180000000, %mul12
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%mul14 = fmul float %add, 2.000000e+00
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%call15 = call float @dsin(float %mul14)
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%mul16 = fmul float %call15, 0x3FF1F736C0000000
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%mul17 = fmul float %sub13, 2.000000e+00
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%mul19 = fmul float %mul17, %call
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%sub20 = fsub float %mul16, %mul19
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%mul21 = fmul float %sub13, 4.000000e+00
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%mul22 = fmul float %mul21, 0x3FF1F736C0000000
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%mul24 = fmul float %mul22, %call
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%call26 = call float @dcos(float %mul14)
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%mul27 = fmul float %mul24, %call26
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%add28 = fadd float %sub20, %mul27
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%call29 = call float @dsin(float %add11)
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%mul30 = fmul float %call29, 0x3FF0AB6960000000
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%call31 = call float @dasin(float %mul30)
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%add32 = fadd float %call31, %add28
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ret float %add32
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}
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