llvm/test/CodeGen/MIR/AArch64
Konstantin Zhuravlyov 8f85685860 Enhance synchscope representation
OpenCL 2.0 introduces the notion of memory scopes in atomic operations to
  global and local memory. These scopes restrict how synchronization is
  achieved, which can result in improved performance.

  This change extends existing notion of synchronization scopes in LLVM to
  support arbitrary scopes expressed as target-specific strings, in addition to
  the already defined scopes (single thread, system).

  The LLVM IR and MIR syntax for expressing synchronization scopes has changed
  to use *syncscope("<scope>")*, where <scope> can be "singlethread" (this
  replaces *singlethread* keyword), or a target-specific name. As before, if
  the scope is not specified, it defaults to CrossThread/System scope.

  Implementation details:
    - Mapping from synchronization scope name/string to synchronization scope id
      is stored in LLVM context;
    - CrossThread/System and SingleThread scopes are pre-defined to efficiently
      check for known scopes without comparing strings;
    - Synchronization scope names are stored in SYNC_SCOPE_NAMES_BLOCK in
      the bitcode.

Differential Revision: https://reviews.llvm.org/D21723



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307722 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 22:23:00 +00:00
..
atomic-memoperands.mir Enhance synchscope representation 2017-07-11 22:23:00 +00:00
cfi-def-cfa.mir MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
expected-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
generic-virtual-registers-error.mir CodeGen: Refactor MIR parsing 2017-06-06 00:44:35 +00:00
generic-virtual-registers-with-regbank-error.mir CodeGen: Refactor MIR parsing 2017-06-06 00:44:35 +00:00
intrinsics.mir CodeGen: add new "intrinsic" MachineOperand kind. 2016-07-29 20:32:59 +00:00
invalid-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
lit.local.cfg
multiple-lhs-operands.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
register-operand-bank.mir [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
spill-fold.mir [AArch64] Fold some filled/spilled subreg COPYs 2017-01-05 21:51:42 +00:00
stack-object-local-offset.mir [Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default. 2017-06-06 08:16:19 +00:00
target-flags.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00