Simon Pilgrim 970d6e800d [X86] Add knownbits vector BSWAP test ...

In preparation for demandedelts support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286579 91177308-0d34-0410-b5e6-96231b3b80d8

2016-11-11 11:33:21 +00:00

..

AArch64

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

2016-11-11 01:34:21 +00:00

AMDGPU

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

2016-11-11 01:34:21 +00:00

ARM

[ARM] Add plumbing for GlobalISel

2016-11-11 08:27:37 +00:00

AVR

[AVR] Add a selection of CodeGen tests

2016-11-09 23:46:52 +00:00

BPF

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Generic

Add -O0 support for @llvm.invariant.group.barrier by discarding it if it gets to ISel.

2016-11-07 16:47:20 +00:00

Hexagon

[Hexagon] Separate Hexagon subreg indices for different register classes

2016-11-09 16:19:08 +00:00

Inputs

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Lanai

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Mips

[mips] Renable small data section test.

2016-11-08 13:03:45 +00:00

MIR

AMDGPU: Preserve vcc undef flags when inverting branch

2016-11-07 19:09:27 +00:00

MSP430

Fix PR27500: on MSP430 the branch destination offset is measured in words, not bytes.

2016-11-08 17:19:59 +00:00

NVPTX

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PowerPC

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

2016-11-11 01:34:21 +00:00

SPARC

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

2016-11-11 01:34:21 +00:00

SystemZ

ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()

2016-11-11 01:34:21 +00:00

Thumb

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Thumb2

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WebAssembly

[WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.

2016-11-08 19:40:38 +00:00

WinEH

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X86

[X86] Add knownbits vector BSWAP test

2016-11-11 11:33:21 +00:00

XCore

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