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c6ee33f19c
Summary: If the scheduler clusters the loads, then the offsets will be sorted, but it is possible for the scheduler to scheduler loads together without out explicitly clustering them, which would give us non-sorted offsets. Also, we will want to do this if we move the load/store optimizer before the scheduler. Reviewers: arsenm Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D23776 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279870 91177308-0d34-0410-b5e6-96231b3b80d8
162 lines
6.5 KiB
LLVM
162 lines
6.5 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck --check-prefix=SI --check-prefix=BOTH %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs< %s | FileCheck --check-prefix=CI --check-prefix=BOTH %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck --check-prefix=CI --check-prefix=BOTH %s
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; BOTH-LABEL: {{^}}local_i32_load
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; BOTH: ds_read_b32 [[REG:v[0-9]+]], v{{[0-9]+}} offset:28
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; BOTH: buffer_store_dword [[REG]],
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define void @local_i32_load(i32 addrspace(1)* %out, i32 addrspace(3)* %in) nounwind {
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%gep = getelementptr i32, i32 addrspace(3)* %in, i32 7
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%val = load i32, i32 addrspace(3)* %gep, align 4
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; BOTH-LABEL: {{^}}local_i32_load_0_offset
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; BOTH: ds_read_b32 [[REG:v[0-9]+]], v{{[0-9]+}}
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; BOTH: buffer_store_dword [[REG]],
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define void @local_i32_load_0_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) nounwind {
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%val = load i32, i32 addrspace(3)* %in, align 4
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; BOTH-LABEL: {{^}}local_i8_load_i16_max_offset:
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; BOTH-NOT: ADD
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; BOTH: ds_read_u8 [[REG:v[0-9]+]], {{v[0-9]+}} offset:65535
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; BOTH: buffer_store_byte [[REG]],
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define void @local_i8_load_i16_max_offset(i8 addrspace(1)* %out, i8 addrspace(3)* %in) nounwind {
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%gep = getelementptr i8, i8 addrspace(3)* %in, i32 65535
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%val = load i8, i8 addrspace(3)* %gep, align 4
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store i8 %val, i8 addrspace(1)* %out, align 4
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ret void
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}
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; BOTH-LABEL: {{^}}local_i8_load_over_i16_max_offset:
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; The LDS offset will be 65536 bytes, which is larger than the size of LDS on
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; SI, which is why it is being OR'd with the base pointer.
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; SI: s_or_b32 [[ADDR:s[0-9]+]], s{{[0-9]+}}, 0x10000
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; CI: s_add_i32 [[ADDR:s[0-9]+]], s{{[0-9]+}}, 0x10000
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; BOTH: v_mov_b32_e32 [[VREGADDR:v[0-9]+]], [[ADDR]]
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; BOTH: ds_read_u8 [[REG:v[0-9]+]], [[VREGADDR]]
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; BOTH: buffer_store_byte [[REG]],
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define void @local_i8_load_over_i16_max_offset(i8 addrspace(1)* %out, i8 addrspace(3)* %in) nounwind {
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%gep = getelementptr i8, i8 addrspace(3)* %in, i32 65536
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%val = load i8, i8 addrspace(3)* %gep, align 4
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store i8 %val, i8 addrspace(1)* %out, align 4
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ret void
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}
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; BOTH-LABEL: {{^}}local_i64_load:
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; BOTH-NOT: ADD
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; BOTH: ds_read_b64 [[REG:v[[0-9]+:[0-9]+]]], v{{[0-9]+}} offset:56
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; BOTH: buffer_store_dwordx2 [[REG]],
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define void @local_i64_load(i64 addrspace(1)* %out, i64 addrspace(3)* %in) nounwind {
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%gep = getelementptr i64, i64 addrspace(3)* %in, i32 7
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%val = load i64, i64 addrspace(3)* %gep, align 8
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store i64 %val, i64 addrspace(1)* %out, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_i64_load_0_offset
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; BOTH: ds_read_b64 [[REG:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}}
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; BOTH: buffer_store_dwordx2 [[REG]],
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define void @local_i64_load_0_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %in) nounwind {
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%val = load i64, i64 addrspace(3)* %in, align 8
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store i64 %val, i64 addrspace(1)* %out, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_f64_load:
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; BOTH-NOT: ADD
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; BOTH: ds_read_b64 [[REG:v[[0-9]+:[0-9]+]]], v{{[0-9]+}} offset:56
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; BOTH: buffer_store_dwordx2 [[REG]],
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define void @local_f64_load(double addrspace(1)* %out, double addrspace(3)* %in) nounwind {
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%gep = getelementptr double, double addrspace(3)* %in, i32 7
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%val = load double, double addrspace(3)* %gep, align 8
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store double %val, double addrspace(1)* %out, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_f64_load_0_offset
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; BOTH: ds_read_b64 [[REG:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}}
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; BOTH: buffer_store_dwordx2 [[REG]],
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define void @local_f64_load_0_offset(double addrspace(1)* %out, double addrspace(3)* %in) nounwind {
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%val = load double, double addrspace(3)* %in, align 8
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store double %val, double addrspace(1)* %out, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_i64_store:
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; BOTH-NOT: ADD
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; BOTH: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:56
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define void @local_i64_store(i64 addrspace(3)* %out) nounwind {
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%gep = getelementptr i64, i64 addrspace(3)* %out, i32 7
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store i64 5678, i64 addrspace(3)* %gep, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_i64_store_0_offset:
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; BOTH-NOT: ADD
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; BOTH: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}
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define void @local_i64_store_0_offset(i64 addrspace(3)* %out) nounwind {
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store i64 1234, i64 addrspace(3)* %out, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_f64_store:
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; BOTH-NOT: ADD
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; BOTH: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:56
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define void @local_f64_store(double addrspace(3)* %out) nounwind {
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%gep = getelementptr double, double addrspace(3)* %out, i32 7
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store double 16.0, double addrspace(3)* %gep, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_f64_store_0_offset
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; BOTH: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}
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define void @local_f64_store_0_offset(double addrspace(3)* %out) nounwind {
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store double 20.0, double addrspace(3)* %out, align 8
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ret void
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}
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; BOTH-LABEL: {{^}}local_v2i64_store:
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; BOTH-NOT: ADD
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; BOTH: ds_write2_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset0:14 offset1:15
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; BOTH: s_endpgm
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define void @local_v2i64_store(<2 x i64> addrspace(3)* %out) nounwind {
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%gep = getelementptr <2 x i64>, <2 x i64> addrspace(3)* %out, i32 7
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store <2 x i64> <i64 5678, i64 5678>, <2 x i64> addrspace(3)* %gep, align 16
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ret void
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}
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; BOTH-LABEL: {{^}}local_v2i64_store_0_offset:
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; BOTH-NOT: ADD
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; BOTH: ds_write2_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset1:1
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; BOTH: s_endpgm
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define void @local_v2i64_store_0_offset(<2 x i64> addrspace(3)* %out) nounwind {
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store <2 x i64> <i64 1234, i64 1234>, <2 x i64> addrspace(3)* %out, align 16
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ret void
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}
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; BOTH-LABEL: {{^}}local_v4i64_store:
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; BOTH-NOT: ADD
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; BOTH-DAG: ds_write2_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset0:30 offset1:31
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; BOTH-DAG: ds_write2_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset0:28 offset1:29
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; BOTH: s_endpgm
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define void @local_v4i64_store(<4 x i64> addrspace(3)* %out) nounwind {
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%gep = getelementptr <4 x i64>, <4 x i64> addrspace(3)* %out, i32 7
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store <4 x i64> <i64 5678, i64 5678, i64 5678, i64 5678>, <4 x i64> addrspace(3)* %gep, align 16
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ret void
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}
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; BOTH-LABEL: {{^}}local_v4i64_store_0_offset:
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; BOTH-NOT: ADD
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; BOTH-DAG: ds_write2_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset0:2 offset1:3
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; BOTH-DAG: ds_write2_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset1:1
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; BOTH: s_endpgm
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define void @local_v4i64_store_0_offset(<4 x i64> addrspace(3)* %out) nounwind {
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store <4 x i64> <i64 1234, i64 1234, i64 1234, i64 1234>, <4 x i64> addrspace(3)* %out, align 16
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ret void
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}
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