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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275619 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
2.7 KiB
LLVM
59 lines
2.7 KiB
LLVM
; RUN: llc -march=r600 -mcpu=cayman < %s
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define amdgpu_ps void @main(<4 x float> inreg %arg, <4 x float> inreg %arg1) {
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main_body:
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%tmp = extractelement <4 x float> %arg, i32 0
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%tmp2 = extractelement <4 x float> %arg, i32 1
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%tmp3 = extractelement <4 x float> %arg, i32 2
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%tmp4 = extractelement <4 x float> %arg, i32 3
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%tmp5 = insertelement <4 x float> undef, float %tmp, i32 0
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%tmp6 = insertelement <4 x float> %tmp5, float %tmp2, i32 1
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%tmp7 = insertelement <4 x float> %tmp6, float %tmp3, i32 2
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%tmp8 = insertelement <4 x float> %tmp7, float %tmp4, i32 3
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%tmp9 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %tmp8)
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%tmp10 = extractelement <4 x float> %tmp9, i32 0
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%tmp11 = extractelement <4 x float> %tmp9, i32 1
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%tmp12 = extractelement <4 x float> %tmp9, i32 2
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%tmp13 = extractelement <4 x float> %tmp9, i32 3
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%tmp14 = call float @fabs(float %tmp12)
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%tmp15 = fdiv float 1.000000e+00, %tmp14
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%tmp16 = fmul float %tmp10, %tmp15
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%tmp17 = fadd float %tmp16, 1.500000e+00
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%tmp18 = fmul float %tmp11, %tmp15
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%tmp19 = fadd float %tmp18, 1.500000e+00
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%tmp20 = insertelement <4 x float> undef, float %tmp19, i32 0
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%tmp21 = insertelement <4 x float> %tmp20, float %tmp17, i32 1
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%tmp22 = insertelement <4 x float> %tmp21, float %tmp13, i32 2
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%tmp23 = insertelement <4 x float> %tmp22, float %tmp4, i32 3
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%tmp24 = extractelement <4 x float> %tmp23, i32 0
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%tmp25 = extractelement <4 x float> %tmp23, i32 1
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%tmp26 = extractelement <4 x float> %tmp23, i32 2
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%tmp27 = extractelement <4 x float> %tmp23, i32 3
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%tmp28 = insertelement <4 x float> undef, float %tmp24, i32 0
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%tmp29 = insertelement <4 x float> %tmp28, float %tmp25, i32 1
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%tmp30 = insertelement <4 x float> %tmp29, float %tmp26, i32 2
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%tmp31 = insertelement <4 x float> %tmp30, float %tmp27, i32 3
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%tmp32 = shufflevector <4 x float> %tmp31, <4 x float> %tmp31, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%tmp33 = call <4 x float> @llvm.r600.texc(<4 x float> %tmp32, i32 0, i32 0, i32 0, i32 16, i32 0, i32 1, i32 1, i32 1, i32 1)
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%tmp34 = extractelement <4 x float> %tmp33, i32 0
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%tmp35 = insertelement <4 x float> undef, float %tmp34, i32 0
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%tmp36 = insertelement <4 x float> %tmp35, float %tmp34, i32 1
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%tmp37 = insertelement <4 x float> %tmp36, float %tmp34, i32 2
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%tmp38 = insertelement <4 x float> %tmp37, float 1.000000e+00, i32 3
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call void @llvm.r600.store.swizzle(<4 x float> %tmp38, i32 0, i32 0)
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ret void
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}
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; Function Attrs: readnone
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declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #0
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; Function Attrs: readnone
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declare float @fabs(float) #0
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declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
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; Function Attrs: readnone
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declare <4 x float> @llvm.r600.texc(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0
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attributes #0 = { nounwind readnone }
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