llvm/mips1 at 9b7716192728fbdd8ae2ba9a13dcd65d7fe6509f - llvm

RPCSX/llvm

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History

Daniel Sanders 31546cd352 [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them

Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-V that was available in MIPS32R2

Most of these instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now. It happens
because many of the MIPS V instructions have not been implemented.

Depends on D3694

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3695

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208546 91177308-0d34-0410-b5e6-96231b3b80d8

2014-05-12 12:52:44 +00:00

invalid-mips2-wrong-error.s

[mips] Implement l[wd]c3, and s[wd]c3.

2014-05-08 13:02:11 +00:00

invalid-mips2.s

[mips] Implement l[wd]c3, and s[wd]c3.

2014-05-08 13:02:11 +00:00

invalid-mips3-wrong-error.s

[mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu=mips[12] does not accept them

2014-05-09 13:02:27 +00:00

invalid-mips3.s

[mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu=mips[12] does not accept them