llvm/test/MC/Mips/mips64extins.s
Strahinja Petrovic 8ee8b3b28c [Mips] Fix for decoding DINS instruction - disassembler
This patch fixes decoding of size and position for DINSM
and DINSU instructions.

Differential Revision: https://reviews.llvm.org/D31072


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298593 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-23 13:19:04 +00:00

10 lines
595 B
ArmAsm

# RUN: llvm-mc -arch=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
# RUN: | llvm-objdump -disassemble - | FileCheck %s
dext $2, $4, 5, 10 # CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
dextu $2, $4, 34, 6 # CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6
dextm $2, $4, 5, 34 # CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34
dins $4, $5, 8, 10 # CHECK: dins ${{[0-9]+}}, ${{[0-9]+}}, 8, 10
dinsm $4, $5, 30, 6 # CHECK: dinsm ${{[0-9]+}}, ${{[0-9]+}}, 30, 6
dinsu $4, $5, 40, 13 # CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13