Matt Arsenault 8f1b18be38 AMDGPU: Don't fold subregister extracts into tied operands ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278676 91177308-0d34-0410-b5e6-96231b3b80d8		2016-08-15 16:18:36 +00:00
..
AArch64	[AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired loads/stores.	2016-08-12 20:39:51 +00:00
AMDGPU	AMDGPU: Don't fold subregister extracts into tied operands	2016-08-15 16:18:36 +00:00
ARM	Revert "[SimplifyCFG] Rewrite SinkThenElseCodeToEnd"	2016-08-15 15:42:31 +00:00
BPF
Generic
Hexagon	[LSR] Don't try and create post-inc expressions on non-rotated loops	2016-08-15 07:53:03 +00:00
Inputs
Lanai
Mips
MIR
MSP430
NVPTX	[NVPTX] Use untyped (.b) integer registers in PTX.	2016-08-12 22:02:19 +00:00
PowerPC	Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."	2016-08-14 02:10:18 +00:00
SPARC	Revert "[Sparc] Leon errata fix passes."	2016-08-12 14:48:09 +00:00
SystemZ
Thumb
Thumb2	Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."	2016-08-14 02:10:18 +00:00
WebAssembly	[WebAssembly] Re-enable disabled debug value test	2016-08-12 23:14:18 +00:00
WinEH
X86	[LSR] Don't try and create post-inc expressions on non-rotated loops	2016-08-15 07:53:03 +00:00
XCore