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0470a16690
This patch is the first in a series of patches to provide code gen for doing compares in GPRs when the compare result is required in a GPR. It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64 extensions. This first patch handles equality comparison on i32 operands with the result sign or zero extended. Differential Revision: https://reviews.llvm.org/D31847 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302810 91177308-0d34-0410-b5e6-96231b3b80d8
139 lines
4.1 KiB
LLVM
139 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; ModuleID = 'ComparisonTestCases/testComparesieqss.c'
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@glob = common local_unnamed_addr global i16 0, align 2
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_ieqss(i16 signext %a, i16 signext %b) {
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; CHECK-LABEL: test_ieqss:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, %b
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%conv2 = zext i1 %cmp to i32
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ret i32 %conv2
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_ieqss_sext(i16 signext %a, i16 signext %b) {
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; CHECK-LABEL: test_ieqss_sext:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: rldicr r3, r3, 58, 0
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; CHECK-NEXT: sradi r3, r3, 63
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, %b
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%sub = sext i1 %cmp to i32
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ret i32 %sub
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_ieqss_z(i16 signext %a) {
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; CHECK-LABEL: test_ieqss_z:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, 0
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%conv1 = zext i1 %cmp to i32
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ret i32 %conv1
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @test_ieqss_sext_z(i16 signext %a) {
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; CHECK-LABEL: test_ieqss_sext_z:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: rldicr r3, r3, 58, 0
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; CHECK-NEXT: sradi r3, r3, 63
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, 0
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%sub = sext i1 %cmp to i32
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ret i32 %sub
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}
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; Function Attrs: norecurse nounwind
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define void @test_ieqss_store(i16 signext %a, i16 signext %b) {
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; CHECK-LABEL: test_ieqss_store:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: sth r3, 0(r12)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, %b
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%conv3 = zext i1 %cmp to i16
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store i16 %conv3, i16* @glob, align 2
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @test_ieqss_sext_store(i16 signext %a, i16 signext %b) {
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; CHECK-LABEL: test_ieqss_sext_store:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: ld r4, .LC0@toc@l(r5)
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; CHECK-NEXT: rldicr r3, r3, 58, 0
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; CHECK-NEXT: sradi r3, r3, 63
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; CHECK-NEXT: sth r3, 0(r4)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, %b
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%conv3 = sext i1 %cmp to i16
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store i16 %conv3, i16* @glob, align 2
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @test_ieqss_z_store(i16 signext %a) {
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; CHECK-LABEL: test_ieqss_z_store:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
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; CHECK-NEXT: srwi r3, r3, 5
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; CHECK-NEXT: sth r3, 0(r4)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, 0
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%conv2 = zext i1 %cmp to i16
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store i16 %conv2, i16* @glob, align 2
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ret void
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}
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; Function Attrs: norecurse nounwind
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define void @test_ieqss_sext_z_store(i16 signext %a) {
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; CHECK-LABEL: test_ieqss_sext_z_store:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
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; CHECK-NEXT: cntlzw r3, r3
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; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
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; CHECK-NEXT: rldicr r3, r3, 58, 0
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; CHECK-NEXT: sradi r3, r3, 63
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; CHECK-NEXT: sth r3, 0(r4)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp eq i16 %a, 0
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%conv2 = sext i1 %cmp to i16
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store i16 %conv2, i16* @glob, align 2
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ret void
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}
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