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02cd01c121
Summary: The goal is for each operand type to have its own parse function and at the same time share common code for tracking state as different instruction types share operand types (e.g. glc/glc_flat, etc). Introduce parseAMDGPUOperand which can parse any optional operand. DPP and Clamp/OMod have custom handling for now. Sam also suggested to have class hierarchy for operand types instead of table. This can be done in separate change. Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps, parseMubufOptionalOps, parseDPPOptionalOps. Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class. Rename AsmMatcher/InstPrinter methods accordingly. Print immediate type when printing parsed immediate operand. Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3). Update tests. Reviewers: tstellarAMD, SamWot, artem.tamazov Subscribers: qcolombet, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19584 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268015 91177308-0d34-0410-b5e6-96231b3b80d8
24 lines
664 B
ArmAsm
24 lines
664 B
ArmAsm
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=SI %s 2>&1 | FileCheck %s
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// offset too big
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// CHECK: error: invalid operand for instruction
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ds_add_u32 v2, v4 offset:1000000000
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// offset0 twice
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// CHECK: error: invalid operand for instruction
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ds_write2_b32 v2, v4, v6 offset0:4 offset0:8
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// offset1 twice
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// CHECK: error: invalid operand for instruction
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ds_write2_b32 v2, v4, v6 offset1:4 offset1:8
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// offset0 too big
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// CHECK: invalid operand for instruction
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ds_write2_b32 v2, v4, v6 offset0:1000000000
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// offset1 too big
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// CHECK: invalid operand for instruction
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ds_write2_b32 v2, v4, v6 offset1:1000000000
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