Simon Dardis 8e2c689fe9 [mips] Fix sync instruction definition ... The 'sync' instruction for MIPS was defined in MIPS-II as taking no operands. MIPS32 extended the define of 'sync' as taking an optional unsigned 5 bit immediate. This patch correct the definition of sync so that it is accepted with an operand of 0 or no operand for MIPS-II to MIPS-V, and a 5 bit unsigned immediate for MIPS32 and later revisions. Additionally a clear error is given when the MIPS32 version of sync is used when targeting pre MIPS32. This partially resolves PR/30714. Thanks to Daniel Sanders for reporting this issue! Reveiwers: vkalintiris Differential Revision: https://reviews.llvm.org/D25672 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284483 91177308-0d34-0410-b5e6-96231b3b80d8		2016-10-18 14:42:13 +00:00
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invalid-mips3-wrong-error.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
invalid-mips3.s	[mips] Macro expansion for ld, sd for O32	2016-10-18 14:28:00 +00:00
invalid-mips4-wrong-error.s	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
invalid-mips4.s	[mips] Macro expansion for ld, sd for O32	2016-10-18 14:28:00 +00:00
invalid-mips5-wrong-error.s	[mips] Improve the error messages given by MipsAsmParser.	2014-09-16 15:00:52 +00:00
invalid-mips5.s	[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6	2014-06-12 15:00:17 +00:00
invalid-mips32.s	[mips] Fix sync instruction definition	2016-10-18 14:42:13 +00:00
invalid-mips32r2-xfail.s	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
invalid-mips32r2.s	[mips] Marked the DI/EI instruction aliases as MIPS32r2	2014-10-16 15:23:52 +00:00
valid.s	[mips] Fix sync instruction definition	2016-10-18 14:42:13 +00:00