llvm/test/CodeGen/X86/widen_cast-1.ll
Nadav Rotem 8fb06b3e8f Enable element promotion type legalization by deafault.
Changed tests which assumed that vectors are legalized by widening them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142152 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 20:31:33 +00:00

45 lines
1.5 KiB
LLVM

; RUN: llc -march=x86 -mattr=+sse42 < %s | FileCheck %s
; CHECK: paddd
; CHECK: pextrd
; CHECK: movd
; bitcast a v4i16 to v2i32
define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
entry:
%dst.addr = alloca <2 x i32>* ; <<2 x i32>**> [#uses=2]
%src.addr = alloca <4 x i16>* ; <<4 x i16>**> [#uses=2]
%i = alloca i32, align 4 ; <i32*> [#uses=6]
store <2 x i32>* %dst, <2 x i32>** %dst.addr
store <4 x i16>* %src, <4 x i16>** %src.addr
store i32 0, i32* %i
br label %forcond
forcond: ; preds = %forinc, %entry
%tmp = load i32* %i ; <i32> [#uses=1]
%cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1]
br i1 %cmp, label %forbody, label %afterfor
forbody: ; preds = %forcond
%tmp1 = load i32* %i ; <i32> [#uses=1]
%tmp2 = load <2 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1]
%arrayidx = getelementptr <2 x i32>* %tmp2, i32 %tmp1 ; <<2 x i32>*> [#uses=1]
%tmp3 = load i32* %i ; <i32> [#uses=1]
%tmp4 = load <4 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
%arrayidx5 = getelementptr <4 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
%tmp6 = load <4 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1]
%add = add <4 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1]
%conv = bitcast <4 x i16> %add to <2 x i32> ; <<2 x i32>> [#uses=1]
store <2 x i32> %conv, <2 x i32>* %arrayidx
br label %forinc
forinc: ; preds = %forbody
%tmp7 = load i32* %i ; <i32> [#uses=1]
%inc = add i32 %tmp7, 1 ; <i32> [#uses=1]
store i32 %inc, i32* %i
br label %forcond
afterfor: ; preds = %forcond
ret void
}