llvm/test/CodeGen/ARM/pack.ll
Saleem Abdulrasool 27b1252c13 ARM: fixup more tests to specify the target more explicitly
This changes the tests that were targeting ARM EABI to explicitly specify the
environment rather than relying on the default.  This breaks with the new
Windows on ARM support when running the tests on Windows where the default
environment is no longer EABI.

Take the opportunity to avoid a pointless redirect (helps when trying to debug
with providing a command line invocation which can be copy and pasted) and
removing a few greps in favour of FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 16:01:44 +00:00

112 lines
2.5 KiB
LLVM

; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o - | FileCheck %s
; CHECK: test1
; CHECK: pkhbt r0, r0, r1, lsl #16
define i32 @test1(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, 65535
%tmp4 = shl i32 %Y, 16
%tmp5 = or i32 %tmp4, %tmp1
ret i32 %tmp5
}
; CHECK: test2
; CHECK: pkhbt r0, r0, r1, lsl #12
define i32 @test2(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, 65535
%tmp3 = shl i32 %Y, 12
%tmp4 = and i32 %tmp3, -65536
%tmp57 = or i32 %tmp4, %tmp1
ret i32 %tmp57
}
; CHECK: test3
; CHECK: pkhbt r0, r0, r1, lsl #18
define i32 @test3(i32 %X, i32 %Y) {
%tmp19 = and i32 %X, 65535
%tmp37 = shl i32 %Y, 18
%tmp5 = or i32 %tmp37, %tmp19
ret i32 %tmp5
}
; CHECK: test4
; CHECK: pkhbt r0, r0, r1
define i32 @test4(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, 65535
%tmp3 = and i32 %Y, -65536
%tmp46 = or i32 %tmp3, %tmp1
ret i32 %tmp46
}
; CHECK: test5
; CHECK: pkhtb r0, r0, r1, asr #16
define i32 @test5(i32 %X, i32 %Y) {
%tmp17 = and i32 %X, -65536
%tmp2 = bitcast i32 %Y to i32
%tmp4 = lshr i32 %tmp2, 16
%tmp5 = or i32 %tmp4, %tmp17
ret i32 %tmp5
}
; CHECK: test5a
; CHECK: pkhtb r0, r0, r1, asr #16
define i32 @test5a(i32 %X, i32 %Y) {
%tmp110 = and i32 %X, -65536
%tmp37 = lshr i32 %Y, 16
%tmp39 = bitcast i32 %tmp37 to i32
%tmp5 = or i32 %tmp39, %tmp110
ret i32 %tmp5
}
; CHECK: test6
; CHECK: pkhtb r0, r0, r1, asr #12
define i32 @test6(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, -65536
%tmp37 = lshr i32 %Y, 12
%tmp38 = bitcast i32 %tmp37 to i32
%tmp4 = and i32 %tmp38, 65535
%tmp59 = or i32 %tmp4, %tmp1
ret i32 %tmp59
}
; CHECK: test7
; CHECK: pkhtb r0, r0, r1, asr #18
define i32 @test7(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, -65536
%tmp3 = ashr i32 %Y, 18
%tmp4 = and i32 %tmp3, 65535
%tmp57 = or i32 %tmp4, %tmp1
ret i32 %tmp57
}
; Arithmetic and logic right shift does not have the same semantics if shifting
; by more than 16 in this context.
; CHECK: test8
; CHECK-NOT: pkhtb r0, r0, r1, asr #22
define i32 @test8(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, -65536
%tmp3 = lshr i32 %Y, 22
%tmp57 = or i32 %tmp3, %tmp1
ret i32 %tmp57
}
; CHECK-LABEL: test9:
; CHECK: pkhtb r0, r0, r1, asr #16
define i32 @test9(i32 %src1, i32 %src2) {
entry:
%tmp = and i32 %src1, -65536
%tmp2 = lshr i32 %src2, 16
%tmp3 = or i32 %tmp, %tmp2
ret i32 %tmp3
}
; CHECK-LABEL: test10:
; CHECK: pkhtb r0, r0, r1, asr #17
define i32 @test10(i32 %src1, i32 %src2) {
entry:
%tmp = and i32 %src1, -65536
%tmp2 = ashr i32 %src2, 17
%tmp3 = or i32 %tmp, %tmp2
ret i32 %tmp3
}