..
GlobalISel
[ARM] GlobalISel: Legalize G_FCMP for s32
2017-07-06 09:09:33 +00:00
Windows
Remove the default ARMSubtarget from the ARM TargetMachine.
2017-07-01 03:41:53 +00:00
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2007-03-21-JoinIntervalsCrash.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
Codegen: Make chains from trellis-shaped CFGs
2017-02-15 19:49:14 +00:00
2007-05-23-BadPreIndexedStore.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
[ARM] Avoid using ARM instructions in Thumb mode
2017-01-31 14:35:01 +00:00
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll
2009-08-21-PostRAKill3.ll
2009-08-21-PostRAKill.ll
2009-08-26-ScalarToVector.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2009-08-27-ScalarToVector.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll
2009-08-31-TwoRegShuffle.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll
2009-10-02-NEONSubregsBug.ll
2009-10-16-Scope.ll
2009-10-27-double-align.ll
2009-10-30.ll
2009-11-01-NeonMoves.ll
2009-11-02-NegativeLane.ll
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll
2010-03-04-eabi-fp-spill.ll
2010-03-04-stm-undef-addr.ll
2010-03-18-ldm-rtrn.ll
2010-04-09-NeonSelect.ll
2010-04-13-v2f64SplitArg.ll
2010-04-14-SplitVector.ll
2010-04-15-ScavengerDebugValue.ll
2010-05-14-IllegalType.ll
2010-05-17-FastAllocCrash.ll
2010-05-18-LocalAllocCrash.ll
2010-05-18-PostIndexBug.ll
2010-05-19-Shuffles.ll
2010-05-20-NEONSpillCrash.ll
2010-05-21-BuildVector.ll
2010-06-11-vmovdrr-bitcast.ll
2010-06-21-LdStMultipleBug.ll
2010-06-21-nondarwin-tc.ll
2010-06-25-Thumb2ITInvalidIterator.ll
Renumber testcase metadata nodes after r290153.
2016-12-22 00:45:21 +00:00
2010-06-29-PartialRedefFastAlloc.ll
2010-06-29-SubregImpDefs.ll
2010-07-26-GlobalMerge.ll
2010-08-04-EHCrash.ll
2010-08-04-StackVariable.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
2010-09-21-OptCmpBug.ll
2010-10-25-ifcvt-ldm.ll
2010-11-15-SpillEarlyClobber.ll
2010-11-29-PrologueBug.ll
2010-12-07-PEIBug.ll
2010-12-08-tpsoft.ll
2010-12-15-elf-lcomm.ll
2010-12-17-LocalStackSlotCrash.ll
2011-01-19-MergedGlobalDbg.ll
Renumber testcase metadata nodes after r290153.
2016-12-22 00:45:21 +00:00
2011-02-04-AntidepMultidef.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
2011-02-07-AntidepClobber.ll
2011-03-10-DAGCombineCrash.ll
2011-03-15-LdStMultipleBug.ll
2011-03-23-PeepholeBug.ll
Codegen: Tail-duplicate during placement.
2016-10-11 20:36:43 +00:00
2011-04-07-schediv.ll
2011-04-11-MachineLICMBug.ll
2011-04-12-AlignBug.ll
2011-04-12-FastRegAlloc.ll
2011-04-15-AndVFlagPeepholeBug.ll
2011-04-15-RegisterCmpPeephole.ll
2011-04-26-SchedTweak.ll
2011-04-27-IfCvtBug.ll
2011-05-04-MultipleLandingPadSuccs.ll
[Verifier] Add verification for TBAA metadata
2016-12-11 20:07:15 +00:00
2011-06-09-TailCallByVal.ll
2011-06-16-TailCallByVal.ll
2011-06-29-MergeGlobalsAlign.ll
Revert "Use private linkage for MergedGlobals variables" on Darwin.
2016-11-11 17:50:09 +00:00
2011-07-10-GlobalMergeBug.ll
2011-08-02-MergedGlobalDbg.ll
Renumber testcase metadata nodes after r290153.
2016-12-22 00:45:21 +00:00
2011-08-12-vmovqqqq-pseudo.ll
2011-08-25-ldmia_ret.ll
2011-08-29-ldr_pre_imm.ll
2011-08-29-SchedCycle.ll
2011-09-09-OddVectorDivision.ll
2011-09-19-cpsr.ll
2011-09-28-CMovCombineBug.ll
2011-10-26-ExpandUnalignedLoadCrash.ll
2011-10-26-memset-inline.ll
2011-10-26-memset-with-neon.ll
2011-11-07-PromoteVectorLoadStore.ll
2011-11-09-BitcastVectorDouble.ll
2011-11-09-IllegalVectorFPIntConvert.ll
2011-11-14-EarlyClobber.ll
2011-11-28-DAGCombineBug.ll
2011-11-29-128bitArithmetics.ll
2011-11-30-MergeAlignment.ll
2011-12-14-machine-sink.ll
2011-12-19-sjlj-clobber.ll
2012-01-23-PostRA-LICM.ll
2012-01-24-RegSequenceLiveRange.ll
2012-01-26-CoalescerBug.ll
2012-01-26-CopyPropKills.ll
2012-02-01-CoalescerBug.ll
2012-03-05-FPSCR-bug.ll
2012-03-13-DAGCombineBug.ll
2012-03-26-FoldImmBug.ll
2012-04-02-TwoAddrInstrCrash.ll
2012-04-10-DAGCombine.ll
2012-04-24-SplitEHCriticalEdge.ll
2012-05-04-vmov.ll
2012-05-10-PreferVMOVtoVDUP32.ll
2012-05-29-TailDupBug.ll
2012-06-12-SchedMemLatency.ll
ScheduleDAG: Match enum names when printing sdep kinds
2016-09-23 18:28:31 +00:00
2012-08-04-DtripleSpillReload.ll
2012-08-08-legalize-unaligned.ll
2012-08-09-neon-extload.ll
2012-08-13-bfi.ll
2012-08-23-legalize-vmull.ll
2012-08-27-CopyPhysRegCrash.ll
2012-08-30-select.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
2012-09-18-ARMv4ISelBug.ll
2012-09-25-InlineAsmScalarToVectorConv2.ll
2012-09-25-InlineAsmScalarToVectorConv.ll
2012-10-04-AAPCS-byval-align8.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
2012-10-04-FixedFrame-vs-byval.ll
2012-10-04-LDRB_POST_IMM-Crash.ll
2012-10-18-PR14099-ByvalFrameAddress.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
2012-11-14-subs_carry.ll
2013-01-21-PR14992.ll
2013-02-27-expand-vfma.ll
2013-04-05-Small-ByVal-Structs-PR15293.ll
2013-04-16-AAPCS-C4-vs-VFP.ll
2013-04-16-AAPCS-C5-vs-VFP.ll
2013-04-18-load-overlap-PR14824.ll
2013-04-21-AAPCS-VA-C.1.cp.ll
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
2013-05-05-IfConvertBug.ll
2013-05-07-ByteLoadSameAddress.ll
2013-05-13-AAPCS-byval-padding2.ll
2013-05-13-AAPCS-byval-padding.ll
2013-05-13-DAGCombiner-undef-mask.ll
2013-05-31-char-shift-crash.ll
2013-06-03-ByVal-2Kbytes.ll
2013-07-29-vector-or-combine.ll
2013-10-11-select-stalls.ll
2013-11-08-inline-asm-neon-array.ll
2014-01-09-pseudo_expand_implicit_reg.ll
2014-02-05-vfp-regs-after-stack.ll
2014-02-21-byval-reg-split-alignment.ll
2014-05-14-DwarfEHCrash.ll
2014-07-18-earlyclobber-str-post.ll
2014-08-04-muls-it.ll
2015-01-21-thumbv4t-ldstr-opt.ll
2016-05-01-RegScavengerAssert.ll
2016-08-24-ARM-LDST-dbginfo-bug.ll
a15-mla.ll
a15-partial-update.ll
a15-SD-dep.ll
a15.ll
aapcs-hfa-code.ll
aapcs-hfa.ll
acle-intrinsics-v5.ll
[ARM] ACLE Chapter 9 intrinsics
2017-05-04 07:31:28 +00:00
acle-intrinsics.ll
[ARM] ACLE Chapter 9 intrinsics
2017-05-04 07:31:28 +00:00
addrmode.ll
addrspacecast.ll
adv-copy-opt.ll
aeabi-read-tp.ll
ARM: support -mlong-calls with AEABI TLS on ELF
2017-01-29 16:46:22 +00:00
aggregate-padding.ll
alias_store.ll
Fix PR31896.
2017-02-21 20:17:34 +00:00
aliases.ll
align-sp-adjustment.ll
Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"
2017-05-16 17:59:07 +00:00
align.ll
alloc-no-stack-realign.ll
ARM: handle post-indexed NEON ops where the offset isn't the access width.
2017-04-20 19:54:02 +00:00
alloca-align.ll
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
alloca.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
and-cmpz.ll
[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
2016-12-15 09:38:59 +00:00
apcs-vfp.ll
arg-copy-elide.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
arguments-nosplit-i64.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
arguments.ll
arm32-round-conv.ll
arm32-rounding.ll
arm-abi-attr.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
arm-and-tst-peephole.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
arm-asm.ll
arm-eabi.ll
arm-frame-lowering-no-terminator.ll
arm-frameaddr.ll
arm-modifier.ll
arm-negative-stride.ll
arm-position-independence-jump-table.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
arm-position-independence.ll
[ARM] Make RWPI use movw/movt when available
2017-02-07 13:07:12 +00:00
arm-returnaddr.ll
arm-shrink-wrapping-linux.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
arm-shrink-wrapping.ll
Fix test broken by r304020
2017-05-26 22:11:18 +00:00
arm-ttype-target2.ll
ARMLoadStoreDBG.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
armv4.ll
atomic-64bit.ll
atomic-cmp.ll
atomic-cmpxchg.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
atomic-load-store.ll
atomic-op.ll
CodeGen: Allow small copyable blocks to "break" the CFG.
2017-01-31 23:48:32 +00:00
atomic-ops-v8.ll
CodeGen: Allow small copyable blocks to "break" the CFG.
2017-01-31 23:48:32 +00:00
atomicrmw_minmax.ll
available_externally.ll
avoid-cpsr-rmw.ll
bfc.ll
bfi.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bfx.ll
bic.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bicZext.ll
big-endian-eh-unwind.ll
big-endian-neon-bitconv.ll
big-endian-neon-extend.ll
big-endian-neon-trunc-store.ll
big-endian-ret-f64.ll
big-endian-vector-callee.ll
[ARM] Split 128-bit vectors in BUILD_VECTOR lowering
2016-12-14 20:44:38 +00:00
big-endian-vector-caller.ll
bit-reverse-to-rbit.ll
bits.ll
bool-ext-inc.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
bswap16.ll
bswap-inline-asm.ll
build-attributes-encoding.s
build-attributes-fn-attr0.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr1.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr2.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr3.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr4.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
build-attributes-fn-attr5.ll
Reapply r284571 (with the new tests fixed).
2016-10-19 13:43:02 +00:00
build-attributes-fn-attr6.ll
This is a 1 character fix for an ARM build attribute test (r284571): the
2016-11-01 15:59:37 +00:00
build-attributes-optimization-minsize.ll
build-attributes-optimization-mixed.ll
build-attributes-optimization-optnone.ll
build-attributes-optimization-optsize.ll
build-attributes-optimization.ll
build-attributes.ll
ARM: add arm1176j-f processor
2017-05-02 19:06:13 +00:00
bx_fold.ll
byval_load_align.ll
byval-align.ll
cache-intrinsic.ll
call_nolink.ll
call-noret-minsize.ll
call-noret.ll
call-tc.ll
[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
2016-12-15 09:38:59 +00:00
call.ll
carry.ll
cdp2.ll
cdp.ll
cfi-alignment.ll
clang-section.ll
Add support for #pragma clang section
2017-06-05 10:09:13 +00:00
clz.ll
cmn.ll
cmp1-peephole-thumb.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
cmp2-peephole-thumb.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
cmpxchg-idioms.ll
cmpxchg-O0-be.ll
ARM: fix big-endian 64-bit cmpxchg.
2017-06-30 19:51:02 +00:00
cmpxchg-O0.ll
ARM: Fix cmpxchg O0 expansion
2017-05-31 01:21:35 +00:00
cmpxchg-weak.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
coalesce-dbgvalue.ll
Renumber testcase metadata nodes after r290153.
2016-12-22 00:45:21 +00:00
coalesce-subregs.ll
code-placement.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
combine-movc-sub.ll
combine-vmovdrr.ll
commute-movcc.ll
compare-call.ll
constant-island-crash.ll
[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables
2016-11-01 13:37:41 +00:00
constant-islands.ll
constantfp.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
constantpool-align.ll
[SDAG] Use ABI type alignment for constant pools when optimizing for size
2016-10-17 12:54:07 +00:00
constantpool-promote-dbg.ll
[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation
2017-05-23 19:38:37 +00:00
constantpool-promote-ldrh.ll
[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation
2017-05-23 19:38:37 +00:00
constantpool-promote.ll
[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation
2017-05-23 19:38:37 +00:00
constants.ll
copy-cpsr.ll
copy-paired-reg.ll
cortex-a57-misched-alu.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-basic.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cortex-a57-misched-ldm-wrback.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-ldm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-stm-wrback.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-stm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vfma.ll
[ARM] Add scheduling classes for VFNM[AS]
2017-06-13 13:04:32 +00:00
cortex-a57-misched-vldm-wrback.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vldm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vstm-wrback.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vstm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortexr52-misched-basic.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
crash-greedy-v6.ll
crash-greedy.ll
crash-O0.ll
crash-shufflevector.ll
crash.ll
crc32.ll
cse-call.ll
cse-flags.ll
cse-ldrlit.ll
cse-libcalls.ll
ctor_order.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
ctors_dtors.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
cttz_vector.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cttz.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cxx-tlscc.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
dag-combine-ldst.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
dagcombine-anyexttozeroext.ll
dagcombine-concatvector.ll
darwin-eabi.ll
darwin-tls-preserved.ll
ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.
2017-04-19 18:07:54 +00:00
darwin-tls.ll
data-in-code-annotations.ll
dbg-range-extension.mir
MIParser/MIRPrinter: Compute block successors if not explicitely specified
2017-05-05 21:09:30 +00:00
dbg.ll
DbgValueOtherTargets.test
debug-frame-large-stack.ll
debug-frame-no-debug.ll
debug-frame-vararg.ll
debug-frame.ll
debug-info-arg.ll
debug-info-blocks.ll
Align definition of DW_OP_plus with DWARF spec [3/3]
2017-06-14 13:14:38 +00:00
debug-info-branch-folding.ll
[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
2016-12-15 09:38:59 +00:00
debug-info-d16-reg.ll
debug-info-no-frame.ll
debug-info-qreg.ll
debug-info-s16-reg.ll
PR32288: More efficient encoding for DWARF expr subregister access.
2017-03-16 17:14:56 +00:00
debug-info-sreg2.ll
PR32288: More efficient encoding for DWARF expr subregister access.
2017-03-16 17:14:56 +00:00
debug-segmented-stacks.ll
debugtrap.ll
default-float-abi.ll
default-reloc.ll
deprecated-asm.s
Summary: Currently there is no way to disable deprecated warning from asm like this
2016-12-05 23:55:13 +00:00
deps-fix.ll
disable-fp-elim.ll
disable-tail-calls.ll
div.ll
[ARM] Add support for armv7ve triple in llvm (PR31358).
2017-02-09 23:29:14 +00:00
divmod-eabi.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
divmod-hwdiv.ll
[ARM] Check for correct HW div when lowering divmod
2017-04-18 08:32:27 +00:00
divmod.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
domain-conv-vmovs.ll
dwarf-eh.ll
dwarf-unwind.ll
dyn-stackalloc.ll
early-cfi-sections.ll
Emit .cfi_sections before the first .cfi_startproc
2017-01-02 18:05:27 +00:00
eh-dispcont.ll
[ARM] Fix registers clobbered by SjLj EH on soft-float targets
2016-10-11 10:06:59 +00:00
eh-resume-darwin.ll
ehabi-filters.ll
ehabi-handlerdata-nounwind.ll
ehabi-handlerdata.ll
ehabi-no-landingpad.ll
ehabi-unwind.ll
ehabi.ll
elf-lcomm-align.ll
emit-big-cst.ll
emutls1.ll
emutls_generic.ll
emutls.ll
execute-only-big-stack-frame.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
execute-only-section.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
execute-only.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
extload-knownzero.ll
extloadi1.ll
fabs-neon.ll
fabs-to-bfc.ll
fabss.ll
fadds.ll
fast-isel-align.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-br-phi.ll
fast-isel-call-multi-reg-return.ll
fast-isel-call.ll
fast-isel-cmp-imm.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fast-isel-conversion.ll
fast-isel-crash2.ll
fast-isel-crash.ll
fast-isel-deadcode.ll
fast-isel-ext.ll
fast-isel-fold.ll
fast-isel-frameaddr.ll
fast-isel-GEP-coalesce.ll
fast-isel-icmp.ll
fast-isel-indirectbr.ll
fast-isel-inline-asm.ll
fast-isel-intrinsic.ll
fast-isel-ldr-str-arm.ll
fast-isel-ldr-str-thumb-neg-index.ll
fast-isel-ldrh-strh-arm.ll
fast-isel-load-store-verify.ll
fast-isel-mvn.ll
fast-isel-pic.ll
fast-isel-pie.ll
fast-isel-pred.ll
fast-isel-redefinition.ll
fast-isel-remat-same-constant.ll
fast-isel-ret.ll
fast-isel-select.ll
fast-isel-shift-materialize.ll
fast-isel-shifter.ll
fast-isel-static.ll
fast-isel-update-valuemap-for-extract.ll
fast-isel-vaddd.ll
fast-isel-vararg.ll
fast-isel.ll
fast-tail-call.ll
fastcc-vfp.ll
fastisel-gep-promote-before-add.ll
fastisel-thumb-litpool.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
fcopysign.ll
fdivs.ll
fence-singlethread.ll
ARM: lower "fence singlethread" to a pure compiler barrier.
2017-04-20 21:56:52 +00:00
fixunsdfdi.ll
flag-crash.ll
floorf.ll
fmacs.ll
fmdrr-fmrrd.ll
fmscs.ll
fmuls.ll
fnattr-trap.ll
fnegs.ll
fnmacs.ll
fnmscs.ll
fnmul.ll
fnmuls.ll
fold-const.ll
fold-stack-adjust.ll
Codegen: Make chains from trellis-shaped CFGs
2017-02-15 19:49:14 +00:00
formal.ll
fp16-args.ll
fp16-promote.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
fp16-v3.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
fp16.ll
fp_convert.ll
fp-arg-shuffle.ll
fp-fast.ll
fp-only-sp.ll
ARM: make sure FastISel bails on f64 operations for Cortex-M4.
2017-02-23 22:35:00 +00:00
fp.ll
fparith.ll
fpcmp_ueq.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fpcmp-f64-neon-opt.ll
fpcmp-opt.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
fpcmp.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fpconsts.ll
fpconv.ll
fpmem.ll
fpoffset_overflow.mir
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
fpow.ll
fpowi.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
fpscr-intrinsics.ll
[ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each other""
2017-03-07 11:17:53 +00:00
fptoint.ll
frame-register.ll
fsubs.ll
func-argpassing-endian.ll
fusedMAC.ll
gep-optimization.ll
ghc-tcreturn-lowered.ll
global-merge-1.ll
Revert "Use private linkage for MergedGlobals variables" on Darwin.
2016-11-11 17:50:09 +00:00
global-merge-addrspace.ll
global-merge-external.ll
[GlobalMerge] Don't merge globals that may be preempted
2017-06-02 10:24:14 +00:00
global-merge.ll
globals.ll
gpr-paired-spill-thumbinst.ll
gpr-paired-spill.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
gv-stubs-crash.ll
half.ll
hardfloat_neon.ll
hello.ll
hfa-in-contiguous-registers.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
hints.ll
iabs.ll
ifconv-kills.ll
ifconv-regmask.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ifcvt8.ll
ifcvt9.ll
ifcvt10.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
ifcvt11.ll
ifcvt12.ll
ifcvt-branch-weight-bug.ll
Fix buildbot failure after rL303327: [BPI] Reduce the probability of unreachable edge to minimal value greater than 0.
2017-05-18 07:20:52 +00:00
ifcvt-branch-weight.ll
ifcvt-callback.ll
ifcvt-dead-def.ll
ifcvt-iter-indbr.ll
ifcvt-regmask-noreturn.ll
illegal-bitfield-loadstore.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
illegal-vector-bitcast.ll
imm-peephole-arm.mir
Move .mir tests to appropriate directories
2016-12-09 19:08:15 +00:00
imm-peephole-thumb.mir
Move .mir tests to appropriate directories
2016-12-09 19:08:15 +00:00
imm.ll
immcost.ll
indirect-hidden.ll
indirect-reg-input.ll
indirectbr-2.ll
indirectbr-3.ll
indirectbr.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
inline-diagnostics.ll
inlineasm2.ll
inlineasm3.ll
inlineasm4.ll
inlineasm-64bit.ll
inlineasm-global.ll
inlineasm-imm-arm.ll
inlineasm-imm-thumb2.ll
inlineasm-imm-thumb.ll
inlineasm-ldr-pseudo.ll
inlineasm-switch-mode-oneway-from-arm.ll
inlineasm-switch-mode-oneway-from-thumb.ll
inlineasm-switch-mode.ll
inlineasm-X-allocation.ll
inlineasm-X-constraint.ll
inlineasm.ll
insn-sched1.ll
int-to-fp.ll
integer_insertelement.ll
interrupt-attr.ll
interval-update-remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
interwork.ll
intrinsics-coprocessor.ll
[ARM] Avoid using ARM instructions in Thumb mode
2017-01-31 14:35:01 +00:00
intrinsics-crypto.ll
intrinsics-memory-barrier.ll
intrinsics-overflow.ll
intrinsics-v8.ll
invalid-target.ll
invalidated-save-point.ll
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
2017-06-06 08:16:19 +00:00
invoke-donothing-assert.ll
isel-v8i32-crash.ll
ispositive.ll
jump-table-islands-split.ll
jump-table-islands.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
jump-table-tbh.ll
[ARM] Add tGPRwithpc register class and use it for TBB/THH
2017-06-29 08:45:31 +00:00
jumptable-label.ll
krait-cpu-div-attribute.ll
large-stack.ll
ldaex-stlex.ll
ldc2l.ll
ldm-base-writeback.ll
ldm-stm-base-materialization.ll
ldm-stm-i256.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd-memoper.ll
ldrd.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
ldst-f32-2-i32.ll
ldstrex-m.ll
ldstrex.ll
legalize-unaligned-load.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
lit.local.cfg
litpool-licm.ll
load_i1_select.ll
load_store_multiple.ll
[ARM] Fix invalid VLDM/VSTM access when targeting Big Endian with NEON
2016-10-10 16:01:54 +00:00
load-address-masked.ll
load-arm.ll
ARM: add extra test for addrmode folding.
2017-05-03 16:54:30 +00:00
load-combine-big-endian.ll
[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine
2017-03-01 18:12:29 +00:00
load-combine.ll
[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine
2017-03-01 18:12:29 +00:00
load-global.ll
load-store-flags.ll
load.ll
local-call.ll
log2_not_readnone.ll
long_shift.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
long-setcc.ll
[NFC] Use stdin for some tests instead of positional argument.
2017-06-29 14:51:54 +00:00
long.ll
longMAC.ll
[ARM] Fix mixup between Lo and Hi in SMLALBB formation.
2017-03-25 00:13:24 +00:00
lowerMUL-newload.ll
[SelectionDAG] [ARM CodeGen] Fix chain information of LowerMUL
2017-04-06 20:22:51 +00:00
lsr-code-insertion.ll
lsr-icmp-imm.ll
lsr-scale-addr-mode.ll
[ARM] Assign cost of scaling for Cortex-R52
2016-10-18 09:08:54 +00:00
lsr-unfolded-offset.ll
machine-copyprop.mir
MachineCopyPropagation: Respect implicit operands of COPY
2017-02-04 02:27:20 +00:00
machine-cse-cmp.ll
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
2017-01-11 19:55:19 +00:00
machine-licm.ll
macho-extern-hidden.ll
macho-frame-offset.ll
MachO-subtypes.ll
mature-mc-support.ll
[LLC] Add an inline assembly diagnostics handler.
2017-02-03 11:14:39 +00:00
mem.ll
memcpy-inline.ll
[ARM] Fix lowering of misaligned memcpy/memset
2017-05-26 13:59:12 +00:00
memcpy-ldm-stm.ll
memcpy-no-inline.ll
memfunc.ll
memset-inline.ll
[ARM] Fix lowering of misaligned memcpy/memset
2017-05-26 13:59:12 +00:00
MergeConsecutiveStores.ll
metadata-default.ll
metadata-short-enums.ll
metadata-short-wchar.ll
minmax.ll
minsize-call-cse.ll
minsize-imms.ll
minsize-litpools.ll
misched-copy-arm.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
misched-fp-basic.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
misched-fusion-aes.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
misched-int-basic-thumb2.mir
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
misched-int-basic.mir
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
mls.ll
movcc-double.ll
movt-movw-global.ll
movt.ll
[ARM] Enable Cortex-M23 and Cortex-M33 support.
2017-02-01 11:55:03 +00:00
msr-it-block.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
mul_const.ll
mul.ll
mulhi.ll
mult-alt-generic-arm.ll
mvn.ll
named-reg-alloc.ll
named-reg-notareg.ll
negate-i1.ll
[DAG] optimize negation of bool
2016-10-19 16:58:59 +00:00
negative-offset.ll
neon_arith1.ll
neon_cmp.ll
neon_div.ll
ARM: fix vectorized division on WoA
2017-01-27 03:41:53 +00:00
neon_fpconv.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll
neon_shift.ll
neon_spill.ll
neon_vabs.ll
Do full codegen for various tests. NFC
2017-02-27 01:15:57 +00:00
neon_vshl_minint.ll
neon-fma.ll
neon-spfp.ll
neon-v8.1a.ll
nest-register.ll
no_redundant_trunc_for_cmp.ll
no-cfi.ll
Emit .cfi_sections before the first .cfi_startproc
2017-01-02 18:05:27 +00:00
no-cmov2bfi.ll
[ARM] Fix computeKnownBits for ARMISD::CMOV
2017-03-23 16:47:47 +00:00
no-fpu.ll
no-tail-call.ll
none-macho-v4t.ll
none-macho.ll
noopt-dmb-v7.ll
nop_concat_vectors.ll
noreturn.ll
null-streamer.ll
opt-shuff-tstore.ll
optimize-dmbs-v7.ll
optselect-regclass.ll
out-of-registers.ll
pack.ll
peephole-bitcast.ll
phi.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
pic.ll
pie.ll
plt-relative-reloc.ll
popcnt.ll
pr3502.ll
pr13249.ll
pr18364-movw.ll
pr25317.ll
pr25838.ll
pr26669.ll
pr32545.ll
[SDAG] Fix visitAND optimization to deal with vector extract case again.
2017-04-06 19:05:41 +00:00
PR15053.ll
preferred-align.ll
prefetch.ll
prera-ldst-aliasing.mir
[ARM] Use alias analysis in ARMPreAllocLoadStoreOpt.
2017-03-17 00:34:26 +00:00
prera-ldst-insertpt.mir
[ARM] Fix insert point for store rescheduling.
2017-03-02 21:39:39 +00:00
print-memb-operand.ll
private.ll
rbit.ll
[SelectionDAG] Add support for BITREVERSE constant folding
2017-01-16 13:39:00 +00:00
readcyclecounter.ll
reg_sequence.ll
regpair_hint_phys.ll
rem_crash.ll
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_sret_vector.ll
ret_void.ll
returned-ext.ll
returned-trunc-tail-calls.ll
rev.ll
The automatic CHECK: to CHECK-LABEL: conversion, back in 2013,
2017-02-25 15:17:16 +00:00
ror.ll
[DAGCombiner] visitRotate patch to optimize pair of ROTR/ROTL instructions into one with combined shift operand.
2017-07-05 17:55:42 +00:00
rotate.ll
saxpy10-a9.ll
sbfx.ll
sched-it-debug-nodes.mir
Move test to correct directory
2016-12-17 02:16:26 +00:00
section-name.ll
section.ll
segmented-stacks-dynamic.ll
segmented-stacks.ll
select_const.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
select_xform.ll
[DAGCombiner] fold binops with constant into select-of-constants
2017-03-01 22:51:31 +00:00
select-imm.ll
select-undef.ll
select.ll
setcc-logic.ll
[DAGCombiner] add and use TLI hook to convert and-of-seteq / or-of-setne to bitwise logic+setcc (PR32401)
2017-04-05 14:09:39 +00:00
setcc-type-mismatch.ll
setjmp_longjmp.ll
shift-combine.ll
Make the canonicalisation on shifts benifit to more case.
2016-12-23 02:56:07 +00:00
shift-i64.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
shifter_operand.ll
shuffle.ll
sincos.ll
[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno
2017-06-12 17:15:41 +00:00
single-issue-r52.mir
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
sjlj-prepare-critical-edge.ll
sjljeh-swifterror.ll
SjLjEHPrepare: Fix the pass for swifterror arguments
2017-03-07 20:29:02 +00:00
sjljehprepare-lower-empty-struct.ll
smml.ll
In Thumb1, materialize a move between low registers as a movs, if CPSR isn't live.
2017-03-07 09:38:16 +00:00
smul.ll
[ARM] Move SMULW[B|T] isel to DAG Combine
2017-03-14 09:13:22 +00:00
softfp-fabs-fneg.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
space-directive.ll
special-reg-acore.ll
special-reg-mcore.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
special-reg-v8m-base.ll
special-reg-v8m-main.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
special-reg.ll
spill-q.ll
ssat-lower.ll
ssat-upper.ll
ssat-v4t.ll
ssat.ll
ssp-data-layout.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-alignment.ll
stack-frame.ll
stack-protector-bmovpcb_call.ll
stackpointer.ll
static-addr-hoisting.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
stc2.ll
stm.ll
str_post.ll
str_pre-2.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
str_pre.ll
str_trunc.ll
struct_byval_arm_t1_t2.ll
struct_byval.ll
struct-byval-frame-index.ll
sub-cmp-peephole.ll
sub.ll
subreg-remat.ll
subtarget-features-long-calls.ll
subtarget-no-movt.ll
swift-atomics.ll
swift-ios.ll
swift-return.ll
More swift calling convention tests
2016-10-28 17:21:05 +00:00
swift-vldm.ll
swifterror.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
swiftself.ll
[ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'
2017-02-08 22:30:47 +00:00
switch-minsize.ll
sxt_rot.ll
t2-imm.ll
t2-shrink-ldrpost.ll
t2abs-killflags.ll
tail-call-builtin.ll
tail-call-float.ll
[ARM] Relax restriction on variadic functions for tailcall optimization
2016-11-17 10:56:58 +00:00
tail-call-weak.ll
tail-call.ll
[ARM] Relax restriction on variadic functions for tailcall optimization
2016-11-17 10:56:58 +00:00
tail-dup-kill-flags.ll
tail-dup.ll
tail-merge-branch-weight.ll
tail-opts.ll
[BranchFolding] Tail common all identical unreachable blocks
2017-02-14 21:02:24 +00:00
taildup-branch-weight.ll
test-sharedidx.ll
this-return.ll
thread_pointer.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
thumb1_return_sequence.ll
thumb1-div.ll
[ARM] Add a div regression test for Cortex-M23
2017-02-20 12:05:07 +00:00
thumb1-ldst-opt.ll
thumb1-varalloc.ll
thumb2-it-block.ll
[NFC] Use stdin for some tests instead of positional argument.
2017-06-29 14:51:54 +00:00
thumb2-size-opt.ll
ARM: check alignment before transforming ldr -> ldm (or similar).
2016-09-19 09:11:09 +00:00
thumb2-size-reduction-internal-flags.ll
thumb_indirect_calls.ll
thumb-alignment.ll
thumb-big-stack.ll
thumb-litpool.ll
thumb-stub.ll
tls1.ll
tls2.ll
tls3.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
tls-models.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
twoaddrinstr.ll
uint64tof64.ll
umulo-32.ll
unaligned_load_store_vector.ll
unaligned_load_store_vfp.ll
unaligned_load_store.ll
undef-sext.ll
undefined.ll
unord.ll
unsafe-fsub.ll
unschedule-first-call.ll
[SelectionDAG] Check CALLSEQ_BEGIN nodes in DelayForLiveRegs
2017-04-11 08:43:32 +00:00
unwind-init.ll
urem-opt-size.ll
[ARM] Code size optimisation to lower udiv+urem to udiv+mls instead of a
2016-10-03 10:12:32 +00:00
usat-lower.ll
usat-upper.ll
usat-v4t.ll
uxt_rot.ll
uxtb.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
v1-constant-fold.ll
v6-jumptable-clobber.mir
MIR: remove explicit "noVRegs" property.
2017-05-30 21:28:57 +00:00
v6m-smul-with-overflow.ll
Fix signed multiplication with overflow fallback.
2017-04-26 13:41:43 +00:00
v6m-umul-with-overflow.ll
DAG: correctly legalize UMULO.
2017-06-20 15:01:38 +00:00
v7k-abi-align.ll
v7k-libcalls.ll
v7k-sincos.ll
v8m-tail-call.ll
[ARM] Change TCReturn to tBL if tailcall optimization fails.
2017-02-03 11:15:53 +00:00
v8m.base-jumptable_alignment.ll
[CodeGen] fix alignment of JUMPTABLE_INSTS on v8M.base
2017-02-13 14:07:45 +00:00
va_arg.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
vaba.ll
vabd.ll
vabs.ll
[ARM][NEON] Add support for ISD::ABS lowering
2017-05-08 10:37:34 +00:00
vadd.ll
vararg_no_start.ll
varargs-spill-stack-align-nacl.ll
vargs_align.ll
vargs.ll
vbits.ll
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits
2017-04-19 21:23:09 +00:00
vbsl-constant.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vcmp-crash.ll
[ARM] Fix crash caused by r294945
2017-02-13 17:18:00 +00:00
vcnt.ll
vcombine.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
vcvt_combine.ll
vcvt-cost.ll
vcvt-v8.ll
vcvt.ll
vdiv_combine.ll
vdup.ll
DAG: Avoid OOB when legalizing vector indexing
2017-01-10 22:02:30 +00:00
vector-DAGCombine.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vector-extend-narrow.ll
vector-load.ll
ARM: handle post-indexed NEON ops where the offset isn't the access width.
2017-04-20 19:54:02 +00:00
vector-promotion.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
vector-spilling.ll
vector-store.ll
ARM: handle post-indexed NEON ops where the offset isn't the access width.
2017-04-20 19:54:02 +00:00
vext.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vfcmp.ll
vfloatintrinsics.ll
vfp-libcalls.ll
vfp-reg-stride.ll
vfp-regs-dwarf.ll
vfp.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp-64.ll
Improve ARM lowering for "icmp <2 x i64> eq".
2016-10-18 21:03:40 +00:00
vicmp.ll
vld1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld2.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld3.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld4.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld-vst-upgrade.ll
vlddup.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vldlane.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vldm-liveness.ll
[ARM] Check correct instructions for load/store rescheduling.
2017-03-01 22:56:20 +00:00
vldm-liveness.mir
[ARM] Check correct instructions for load/store rescheduling.
2017-03-01 22:56:20 +00:00
vldm-sched-a9.ll
vminmax.ll
vminmaxnm-safe.ll
vminmaxnm.ll
vmla.ll
vmls.ll
vmov.ll
vmul.ll
[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.
2016-12-16 18:44:08 +00:00
vneg.ll
vpadal.ll
vpadd.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll
vsel.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
vselect_imax.ll
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vst2.ll
vst3.ll
vst4.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vstlane.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vsub.ll
vtbl.ll
[ARM] Use TableGen patterns to select vtbl. NFC.
2017-04-19 20:39:39 +00:00
vtrn.ll
[ARM] More aggressive matching for vpadd and vpaddl.
2017-01-11 19:33:38 +00:00
vuzp.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vzip.ll
[ARM] Implement isExtractSubvectorCheap.
2016-12-20 20:05:07 +00:00
warn-stack.ll
weak2.ll
weak.ll
wide-compares.ll
widen-vmovs.ll
wrong-t2stmia-size-opt.ll
xray-armv6-attribute-instrumentation.ll
[XRay] Reduce synthetic references emitted by XRay
2017-06-21 06:39:42 +00:00
xray-armv7-attribute-instrumentation.ll
[XRay] Reduce synthetic references emitted by XRay
2017-06-21 06:39:42 +00:00
xray-tail-call-sled.ll
[xray] Add XRay support for Mach-O in CodeGen
2016-11-23 02:07:04 +00:00
zero-cycle-zero.ll
zextload_demandedbits.ll
