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ec6175c524
llvm/lib/Target/AMDGPU
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Matt Arsenault ec6175c524 AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 
This should not be treated as a different version of
private_segment_buffer. These are distinct things with
different uses and register classes, and requires the
function argument info to have more context about the
function's type and environment.

Also add missing test coverage for the intrinsic, and
emit an error for HSA. This also encovers that the intrinsic
is broken unless there happen to be stack objects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306264 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-26 03:01:31 +00:00
..
AsmParser [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
Disassembler [AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures 2017-06-21 16:00:54 +00:00
InstPrinter [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
MCTargetDesc Remove a processFixupValue hack. 2017-06-24 05:12:29 +00:00
TargetInfo
Utils [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src 2017-06-21 14:41:34 +00:00
AMDGPU.h AMDGPU: Register AMDGPUAlwaysInline 2017-06-02 18:02:42 +00:00
AMDGPU.td [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
AMDGPUAliasAnalysis.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUAliasAnalysis.h AMDGPU/R600: Fix amdgpu alias analysis pass. 2017-03-31 19:26:23 +00:00
AMDGPUAlwaysInlinePass.cpp [AMDGPU] Testing commit access only, no real change 2017-06-15 23:02:55 +00:00
AMDGPUAnnotateKernelFeatures.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
AMDGPUAnnotateUniformValues.cpp DivergencyAnalysis patch for review 2017-06-15 19:33:10 +00:00
AMDGPUAsmPrinter.cpp Move Object format code to lib/BinaryFormat. 2017-06-07 03:48:56 +00:00
AMDGPUAsmPrinter.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUCallingConv.td AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUCallLowering.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUCallLowering.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUCodeGenPrepare.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUFrameLowering.cpp [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
AMDGPUFrameLowering.h [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
AMDGPUGenRegisterBankInfo.def
AMDGPUInstrInfo.cpp [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
AMDGPUInstrInfo.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUInstrInfo.td [AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc 2017-06-21 22:05:06 +00:00
AMDGPUInstructions.td [AMDGPU][MC] Added check for truncation of SOPK imm operand 2017-04-26 15:34:19 +00:00
AMDGPUInstructionSelector.cpp AMDGPU: Start adding offset fields to flat instructions 2017-06-12 15:55:58 +00:00
AMDGPUInstructionSelector.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUIntrinsicInfo.cpp Rename AttributeSet to AttributeList 2017-03-21 16:57:19 +00:00
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td AMDGPU: Remove legacy bfe intrinsics 2017-04-03 18:08:08 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Start selecting flat instruction offsets 2017-06-12 16:53:51 +00:00
AMDGPUISelLowering.cpp [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
AMDGPUISelLowering.h [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
AMDGPULegalizerInfo.cpp AMDGPU/GlobalISel: Mark 32-bit G_AND as legal 2017-06-23 15:17:17 +00:00
AMDGPULegalizerInfo.h
AMDGPULowerIntrinsics.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
AMDGPUMachineCFGStructurizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUMachineFunction.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUMachineFunction.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUMCInstLower.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUMCInstLower.h
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPUPromoteAlloca.cpp [AMDGPU] Fix for issue in alloca to vector promotion pass 2017-06-09 14:16:22 +00:00
AMDGPUPTNote.h [AMDGPU] Restructure code object metadata creation 2017-03-22 22:32:22 +00:00
AMDGPURegAsmNames.inc.cpp AMDGPU: Work around build special casing .inc files 2017-06-08 19:25:21 +00:00
AMDGPURegisterBankInfo.cpp [RegisterBankInfo] Uniquely allocate instruction mapping. 2017-05-05 22:48:22 +00:00
AMDGPURegisterBankInfo.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPURegisterBanks.td
AMDGPURegisterInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPURegisterInfo.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
AMDGPUSubtarget.h [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
AMDGPUTargetMachine.cpp [AMDGPU] Add infer address spaces pass before SROA 2017-06-19 23:17:36 +00:00
AMDGPUTargetMachine.h TargetMachine: Indicate whether machine verifier passes. 2017-05-31 18:41:23 +00:00
AMDGPUTargetObjectFile.cpp Move Object format code to lib/BinaryFormat. 2017-06-07 03:48:56 +00:00
AMDGPUTargetObjectFile.h [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUTargetTransformInfo.cpp AMDGPU: Allow vectorization of packed types 2017-06-20 20:38:06 +00:00
AMDGPUTargetTransformInfo.h AMDGPU: Allow vectorization of packed types 2017-06-20 20:38:06 +00:00
AMDGPUUnifyDivergentExitNodes.cpp AMDGPU: Unify divergent function exits. 2017-03-24 19:52:05 +00:00
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp Remove unused functions. Remove static qualifier from functions in header files. NFC. 2017-04-11 14:55:32 +00:00
AMDKernelCodeT.h
BUFInstructions.td [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt AMDGPU: Work around build special casing .inc files 2017-06-08 19:25:21 +00:00
DSInstructions.td [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
EvergreenInstructions.td AMDGPU: Fix unnecessary ands when packing f16 vectors 2017-03-15 19:04:26 +00:00
FLATInstructions.td AMDGPU: Start adding global_* instructions 2017-06-20 19:54:14 +00:00
GCNHazardRecognizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
GCNHazardRecognizer.h AMDGPU: Fix broken condition in hazard recognizer 2017-03-17 21:36:28 +00:00
GCNIterativeScheduler.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNIterativeScheduler.h [AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler 2017-03-21 13:15:46 +00:00
GCNMinRegStrategy.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNRegPressure.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNRegPressure.h [AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker 2017-05-22 13:09:40 +00:00
GCNSchedStrategy.cpp [AMDGPU] Use GCNRPTracker dumper methods in scheduler 2017-05-16 16:31:45 +00:00
GCNSchedStrategy.h [AMDGPU] Cache live-ins and register pressure in scheduler 2017-05-16 16:11:26 +00:00
LLVMBuild.txt
MIMGInstructions.td AMDGPU: Remove legacy image intrinsics 2017-04-04 16:34:35 +00:00
Processors.td AMDGPU : Fix ISA Version Definitions. 2017-06-10 03:53:19 +00:00
R600ClauseMergePass.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600ControlFlowFinalizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600ExpandSpecialInstrs.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600FrameLowering.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600FrameLowering.h [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
R600InstrFormats.td
R600InstrInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600InstrInfo.h Cyle -> Cycle; NFCI 2017-03-15 15:37:42 +00:00
R600Instructions.td [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
R600Intrinsics.td AMDGPU: Make intrinsics speculatable 2017-05-02 16:57:44 +00:00
R600ISelLowering.cpp AMDGPU: Cleanup CreateLiveInRegister 2017-06-19 21:52:45 +00:00
R600ISelLowering.h [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI. 2017-05-24 15:59:09 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600Packetizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600RegisterInfo.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
R600RegisterInfo.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
R600RegisterInfo.td [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045) 2017-05-23 21:27:15 +00:00
R600Schedule.td
R700Instructions.td
SIAnnotateControlFlow.cpp Remove now useless trailing nullptr in StructType::get 2017-05-11 08:46:02 +00:00
SIDebuggerInsertNops.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIDefines.h [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp AMDGPU: Do operand folding in program order 2017-06-20 18:56:32 +00:00
SIFrameLowering.cpp AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
SIFrameLowering.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
SIInsertSkips.cpp AMDGPU: Rename SI_RETURN 2017-03-21 22:18:10 +00:00
SIInsertWaitcnts.cpp [AMDGPU] Fix uninit'ed var (RevisitLoop) 2017-06-05 19:29:01 +00:00
SIInsertWaits.cpp AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
SIInstrFormats.td [AMDGPU][MC] Fixed bugs in export instruction 2017-05-19 13:36:09 +00:00
SIInstrInfo.cpp [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
SIInstrInfo.h [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
SIInstrInfo.td [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
SIInstructions.td Re-submit AMDGPUMachineCFGStructurizer. 2017-05-15 20:18:37 +00:00
SIIntrinsics.td AMDGPU: Remove legacy export intrinsic 2017-04-04 16:34:39 +00:00
SIISelLowering.cpp AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
SIISelLowering.h [AMDGPU] Combine add and adde, sub and sube 2017-06-21 22:30:01 +00:00
SILoadStoreOptimizer.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
SILowerControlFlow.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SILowerI1Copies.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIMachineFunctionInfo.cpp AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
SIMachineFunctionInfo.h AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
SIMachineScheduler.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIMachineScheduler.h [AMDGPU] Update SI scheduler colorHighLatenciesGroups 2017-03-28 07:19:48 +00:00
SIOptimizeExecMasking.cpp
SIPeepholeSDWA.cpp [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
SIRegisterInfo.cpp AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
SIRegisterInfo.h AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
SIRegisterInfo.td AMDGPU: Fix not including v2i16/v2f16 in register class 2017-03-21 16:42:50 +00:00
SISchedule.td
SIShrinkInstructions.cpp [AMDGPU] Fix illegal shrink of V_SUBB_U32 and V_ADDC_U32 2017-06-20 20:33:44 +00:00
SITypeRewriter.cpp
SIWholeQuadMode.cpp
SMInstructions.td AMDGPUAnnotateUniformValue should always treat volatile loads as divergent 2017-06-02 15:25:52 +00:00
SOPInstructions.td Resubmit r303859 with test fixed. 2017-05-26 20:38:26 +00:00
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
VOP2Instructions.td [AMDGPU] SDWA: remove support for VOP2 instructions that have only 64-bit encoding 2017-06-22 12:42:14 +00:00
VOP3Instructions.td [AMDGPU] Add intrinsics for alignbit and alignbyte instructions 2017-06-09 19:03:00 +00:00
VOP3PInstructions.td AMDGPU: Support v2i16/v2f16 packed operations 2017-02-27 22:15:25 +00:00
VOPCInstructions.td [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
VOPInstructions.td [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00