llvm/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir
Alex Lorenz dab6ae0096 MIR Serialization: Serialize instruction's register ties.
This commit serializes the machine instruction's register operand ties.
The ties are printed out only when the instructon has register ties that are
different from the ties that are specified in the instruction's description.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-19 19:05:34 +00:00

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# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
define i64 @test(i64 %x) #0 {
entry:
%asm = tail call i64 asm sideeffect "$foo", "=r,0"(i64 %x) nounwind
ret i64 %asm
}
attributes #0 = { nounwind }
...
---
name: test
hasInlineAsm: true
tracksRegLiveness: true
liveins:
- { reg: '%rdi' }
body: |
bb.0.entry:
liveins: %rdi
; CHECK: [[@LINE+1]]:70: expected 'tied-def' after '('
INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(3)
%rax = COPY killed %rdi
RETQ killed %rax
...