mirror of
https://github.com/RPCSX/xed.git
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235 lines
7.2 KiB
Plaintext
Executable File
235 lines
7.2 KiB
Plaintext
Executable File
#BEGIN_LEGAL
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#
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#Copyright (c) 2016 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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# any of the things in {} can trigger the action for these
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# the letters in square brackets are bound to the bits after the arrow.
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# The [] brackets are like an OR-triggering function.
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# For encoding, we spell out the order of the legacy prefixes and rex
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# prefixes. On decode, the sequential semantics were used to zero out
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# the effects of rex prefixes but that doesn't work for encode. So we
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# have to make a different table for encoding.
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SEQUENCE ISA_ENCODE
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ISA_BINDINGS
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ISA_EMIT
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# These bind the operand deciders that control the encoding
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SEQUENCE ISA_BINDINGS
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FIXUP_EOSZ_ENC_BIND()
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FIXUP_EASZ_ENC_BIND()
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ASZ_NONTERM_BIND()
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INSTRUCTIONS_BIND()
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OSZ_NONTERM_ENC_BIND() # OSZ must be after the instructions so that DF64 is bound (and before any prefixes obviously)
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PREFIX_ENC_BIND()
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REX_PREFIX_ENC_BIND()
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# These emit the bits and bytes that make up the encoding
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SEQUENCE ISA_EMIT
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PREFIX_ENC_EMIT()
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REX_PREFIX_ENC_EMIT()
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INSTRUCTIONS_EMIT() # THIS TAKES CARE OF MODRM/SIB/DISP/IMM
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FIXUP_EOSZ_ENC()::
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mode16 EOSZ=0 -> EOSZ=1
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mode32 EOSZ=0 -> EOSZ=2
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mode64 EOSZ=0 -> EOSZ=2
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otherwise -> nothing
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FIXUP_EASZ_ENC()::
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mode16 EASZ=0 -> EASZ=1
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mode32 EASZ=0 -> EASZ=2
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mode64 EASZ=0 -> EASZ=3
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otherwise -> nothing
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FIXUP_SMODE_ENC()::
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mode64 SMODE=0 -> SMODE=2
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mode64 SMODE=1 -> error
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otherwise -> nothing
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# FIXME: make ICLASS a possible field?
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# Remove the segment override if any supplied, from an LEA
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REMOVE_SEGMENT()::
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AGEN=0 -> nothing
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AGEN=1 -> REMOVE_SEGMENT_AGEN1()
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REMOVE_SEGMENT_AGEN1()::
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SEG0=@ -> nothing
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SEG0=SEGe() -> error
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# need to emit a segment override if the segment is not the default segment for the operation.
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# These are only meant for use with the things that do not use MODRM (like xlat, A0-A3 MOVs, and the string ops).
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# (MODRM encoding handles this stuff much better).
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OVERRIDE_SEG0()::
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SEG0=@ -> SEG_OVD=0
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SEG0=XED_REG_DS -> SEG_OVD=0
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SEG0=XED_REG_CS -> SEG_OVD=1
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SEG0=XED_REG_ES -> SEG_OVD=3
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SEG0=XED_REG_FS -> SEG_OVD=4
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SEG0=XED_REG_GS -> SEG_OVD=5
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SEG0=XED_REG_SS -> SEG_OVD=6
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OVERRIDE_SEG1()::
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SEG1=@ -> SEG_OVD=0
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SEG1=XED_REG_DS -> SEG_OVD=0
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SEG1=XED_REG_CS -> SEG_OVD=1
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SEG1=XED_REG_ES -> SEG_OVD=3
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SEG1=XED_REG_FS -> SEG_OVD=4
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SEG1=XED_REG_GS -> SEG_OVD=5
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SEG1=XED_REG_SS -> SEG_OVD=6
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REX_PREFIX_ENC()::
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mode64 NOREX=0 NEEDREX=1 REXW[w] REXB[b] REXX[x] REXR[r] -> 0b0100 wrxb
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mode64 NOREX=0 REX=1 REXW[w] REXB[b] REXX[x] REXR[r] -> 0b0100 wrxb
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mode64 NOREX=0 REXW[w]=1 REXB[b] REXX[x] REXR[r] -> 0b0100 wrxb
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mode64 NOREX=0 REXW[w] REXB[b]=1 REXX[x] REXR[r] -> 0b0100 wrxb
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mode64 NOREX=0 REXW[w] REXB[b] REXX[x]=1 REXR[r] -> 0b0100 wrxb
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mode64 NOREX=0 REXW[w] REXB[b] REXX[x] REXR[r]=1 -> 0b0100 wrxb
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mode64 NOREX=1 NEEDREX=1 -> error
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mode64 NOREX=1 REX=1 -> error
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mode64 NOREX=1 REXW=1 -> error
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mode64 NOREX=1 REXB=1 -> error
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mode64 NOREX=1 REXX=1 -> error
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mode64 NOREX=1 REXR=1 -> error
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mode64 NEEDREX=0 REX=0 REXW=0 REXB=0 REXX=0 REXR=0 -> nothing
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# If any REX bit shows up in 32 or 16b mode, we have an error. ensure everything is zero
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mode32 REX=0 REXW=0 REXB=0 REXX=0 REXR=0 -> nothing
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mode16 REX=0 REXW=0 REXB=0 REXX=0 REXR=0 -> nothing
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# or die...1
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otherwise -> error
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# This checks that we didn't try to use a byte register that requires
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# we do not have a rex with something else that requires we have a REX
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# prefix.
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# FIXME: need to allow repeated prefixes
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# FIXME: optionally allow for prefix order to be specified (from decode)
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PREFIX_ENC()::
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# create an "OR" of REFINING=2 and REP=2
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REP=2 -> 0xf2 no_return
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REP=3 -> 0xf3 no_return
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#
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66_prefix -> 0x66 no_return
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67_prefix -> 0x67 no_return
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lock_prefix -> 0xf0 no_return
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fs_prefix -> 0x64 no_return
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gs_prefix -> 0x65 no_return
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####################################################
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mode64 HINT=3 -> 0x2e no_return
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mode64 HINT=4 -> 0x3e no_return
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#####################################################
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not64 cs_prefix -> 0x2e no_return
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not64 HINT=3 -> 0x2e no_return
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not64 ds_prefix -> 0x3e no_return
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not64 HINT=4 -> 0x3e no_return
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not64 es_prefix -> 0x26 no_return
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not64 ss_prefix -> 0x36 no_return
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otherwise -> nothing
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##########################################################################
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#
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#
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# This is the encode version. It just sets DF64 for later use by the
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# OSZ_NONTERM_ENC() nonterminal.
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#
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DF64()::
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mode16 -> nothing
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mode32 -> nothing
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mode64 -> DF64=1 ### EOSZ=3 -- removed EOSZ=3 because it broke encoding pop 16b dx in 64b mode.
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#
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# If an instruction pattern sets W to zero or 1, we make sure it also
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# sets SKIP_OSZ=1 so that we do not do any overwrite of that value for
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# the EOSZ computation.
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#
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OSZ_NONTERM_ENC()::
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mode16 EOSZ=1 -> nothing
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mode16 EOSZ=2 DF32=1 -> nothing
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# We don't use SKIP_OSZ=1 with the MOV_CR instructions but this is
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# here for completeness.
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mode16 EOSZ=2 DF32=0 SKIP_OSZ=1 -> nothing
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mode16 EOSZ=2 DF32=0 SKIP_OSZ=0 -> 66_prefix
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mode32 EOSZ=1 SKIP_OSZ=1 -> nothing
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mode32 EOSZ=1 SKIP_OSZ=0 -> 66_prefix
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mode32 EOSZ=2 -> nothing
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mode64 EOSZ=1 SKIP_OSZ=1 -> nothing
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mode64 EOSZ=1 SKIP_OSZ=0 -> 66_prefix
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mode64 EOSZ=2 DF64=1 -> error
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mode64 EOSZ=2 DF64=0 -> nothing
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mode64 EOSZ=3 DF64=1 -> nothing
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mode64 EOSZ=3 DF64=0 SKIP_OSZ=1 -> nothing
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mode64 EOSZ=3 DF64=0 SKIP_OSZ=0 -> REXW=1
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# The REFINING66() decode version is required for when we have a 66
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# prefix that should not change the EOSZ. The REFINING66() decode
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# nonterminal restores that EOSZ.
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#
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# This one, the REFINING66() encode version is required for
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# compatibility, but it doesn't do anything. The EOSZ is an input to
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# the endoder.
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#
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# Turn off the REP prefix in case we are switching forms.
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REFINING66()::
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otherwise -> nothing # norep works too
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IGNORE66()::
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otherwise -> nothing
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# Same for IMMUNE66() used for sttni/cmpxchg8B/cmpxchg16b. We do not want to emit a 66 prefix in 32b mode
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IMMUNE66()::
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mode16 -> EOSZ=2 DF32=1
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otherwise -> nothing
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IMMUNE66_LOOP64()::
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otherwise -> nothing
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IMMUNE_REXW()::
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otherwise -> nothing
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CR_WIDTH()::
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mode16 -> DF32=1 EOSZ=2
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mode32 -> nothing
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mode64 -> DF64=1 EOSZ=3
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FORCE64()::
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otherwise -> DF64=1 EOSZ=3
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# the prefix encoder does all the required work.
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BRANCH_HINT()::
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otherwise -> nothing
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# end of xed-prefixes-encode.txt
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##########################################################################
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