Mark Charney eb5f9f7c70 INVVPID, INVEPT: allow 16b mode decoding. ... Change-Id: Ifa83e21f6fba43afe9eca693872839442e9ef960 (cherry picked from commit f28b75e5036c771148323f4f3675551f6aefcff6)		2017-07-06 14:57:04 -04:00
..
4fmaps-512	initial commit	2016-12-16 16:09:38 -05:00
4vnniw-512	initial commit	2016-12-16 16:09:38 -05:00
amdxop	amdxop: fix ignore of W0 for a bunch of instr.	2017-06-02 11:26:45 -04:00
avx	VCVT{,T}{SD,SS}2SI: AVX instr made LIG.	2017-05-01 12:16:04 -04:00
avx512-future	added underscores to AVX512_IFMA and AVX512_VBMI for uniformity	2017-01-17 13:12:00 -05:00
avx512-skx	KMOVQ aliases to KMOVD in 32b mode. VEX.W is ignored.	2017-06-29 22:16:27 -04:00
avx512cd	initial commit	2016-12-16 16:09:38 -05:00
avx512f	improve EVEX & VEX handling of mask register specifier bits	2017-07-06 09:06:26 -04:00
avx512ifma	added underscores to AVX512_IFMA and AVX512_VBMI for uniformity	2017-01-17 13:12:00 -05:00
avx512vbmi	added underscores to AVX512_IFMA and AVX512_VBMI for uniformity	2017-01-17 13:12:00 -05:00
avxhsw	xbegin ignores 66. undoing recent commit	2017-06-30 12:21:46 -04:00
bdw	separate AMD cpuid info. add PREFETCHW to silvermont/bdw	2017-05-01 12:16:04 -04:00
cet	cet-isa.xed.txt: put right header on autogen file	2017-05-11 06:46:33 -04:00
future	re-enable KNC builds	2017-05-01 12:16:04 -04:00
glm	initial commit	2016-12-16 16:09:38 -05:00
ild/include	remove leading/trailing underscores C-prepoc header guards	2016-12-23 10:33:32 -05:00
ivbavx	initial commit	2016-12-16 16:09:38 -05:00
ivbint	FSGSBASE: remove no-66 prefix requirement.	2017-06-29 22:16:52 -04:00
knc	xed_mbuild.py / source relocation	2017-05-01 12:16:04 -04:00
knl	PREFETCHWT1 is its own category rather than being in AVX512	2017-02-04 12:31:30 -05:00
knm	add VMFUNC to KNM	2017-06-02 11:26:45 -04:00
memory	initial commit	2016-12-16 16:09:38 -05:00
mpx	MPX: BNDMOV not allowd in 16b addressing	2017-02-02 21:07:48 -05:00
pku	pku: no_refining_prefixes	2017-02-02 21:07:38 -05:00
pt	re-enable KNC builds	2017-05-01 12:16:04 -04:00
sgx	initial commit	2016-12-16 16:09:38 -05:00
sha	initial commit	2016-12-16 16:09:38 -05:00
skl	initial commit	2016-12-16 16:09:38 -05:00
skx	initial commit	2016-12-16 16:09:38 -05:00
vpopcntdq-512	initial commit	2016-12-16 16:09:38 -05:00
xsavec	initial commit	2016-12-16 16:09:38 -05:00
xsaveopt	initial commit	2016-12-16 16:09:38 -05:00
xsaves	initial commit	2016-12-16 16:09:38 -05:00
cpuid-amd.xed.txt	separate AMD cpuid info. add PREFETCHW to silvermont/bdw	2017-05-01 12:16:04 -04:00
cpuid.xed.txt	re-enable KNC builds	2017-05-01 12:16:04 -04:00
files-amd.cfg	separate AMD cpuid info. add PREFETCHW to silvermont/bdw	2017-05-01 12:16:04 -04:00
files-xmm.cfg	initial commit	2016-12-16 16:09:38 -05:00
files-xregs.cfg	initial commit	2016-12-16 16:09:38 -05:00
files.cfg	re-enable KNC builds	2017-05-01 12:16:04 -04:00
foo.diff	add NONTEMPORAL attribute to relevant instructions	2017-05-01 12:16:04 -04:00
knc-kregs.txt	initial commit	2016-12-16 16:09:38 -05:00
oc2-extras.txt	oc2-extras: rip nt is y not v	2017-06-29 22:17:36 -04:00
xed-addr-width-enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-addressing-modes-new.txt	Have RIP-rel addressing work with 67 prefix	2017-06-29 22:17:25 -04:00
xed-amd-3dnow.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-amd-base.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-amd-chips.txt	move AMD chips to separate file.	2017-02-04 12:19:16 -05:00
xed-amd-clzero.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-amd-prefetch.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-amd-sse4a.txt	add NONTEMPORAL attribute to relevant instructions	2017-05-01 12:16:04 -04:00
xed-amd-svm.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-chips.txt	split CMOV and FCMOV in to their own isa sets	2017-06-29 22:16:22 -04:00
xed-convert.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-eASZ.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-eOSZ.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-error-enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-exceptions.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-fields.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-flag-action-enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-flag-enum.txt	spelling fixes	2016-12-24 07:47:12 -05:00
xed-gpr8-dec-reg-table.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-gpr8-enc-reg-table.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-ild-scanners.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-immediates.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-isa.txt	INVVPID, INVEPT: allow 16b mode decoding.	2017-07-06 14:57:04 -04:00
xed-machine-modes-enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-modrm-encode.txt	Have RIP-rel addressing work with 67 prefix	2017-06-29 22:17:25 -04:00
xed-nops.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-operand-action-enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-operand-element-type-enum-base.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-operand-types.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-operand-visibility-enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-operand-width.txt	xed-operand-width.txt: add common types as oc2 codes	2017-05-01 12:16:04 -04:00
xed-pointer-width.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-prefixes-encode.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-prefixes.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-reg-role.enum.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-reg-tables-xmm.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-reg-tables.txt	Have RIP-rel addressing work with 67 prefix	2017-06-29 22:17:25 -04:00
xed-regs-enc.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-regs-xmm.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-regs.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-spine.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-state-bits.txt	initial commit	2016-12-16 16:09:38 -05:00
xed-syntax-enum.txt	initial commit	2016-12-16 16:09:38 -05:00