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Kernel/aarch64: Allow manually driving RP1 GPIOs from software
This currently uses the output (enable) override fields in the control registers. There's also a dedicated Registered IO (RIO) interface mentioned in the datasheet, which might be a better fit.
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@@ -99,6 +99,30 @@ void RP1GPIO::set_pin_enabled(u32 pin_number, bool enabled)
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m_pads_bank_registers[bank_number]->pad_control[relative_pin_number] = pad_control;
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}
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void RP1GPIO::set_output_enable_override(u32 pin_number, OutputEnableOverride output_enable_override)
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{
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auto [bank_number, relative_pin_number] = MUST(pin_number_to_bank_and_relative_pin_number(pin_number));
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auto control = m_io_bank_registers[bank_number]->gpio[relative_pin_number].control;
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control &= ~IOBankRegisters::CONTROL_OUTPUT_ENABLE_OVERRIDE_MASK;
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control |= static_cast<u32>(output_enable_override) << IOBankRegisters::CONTROL_OUTPUT_ENABLE_OVERRIDE_OFFSET;
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m_io_bank_registers[bank_number]->gpio[relative_pin_number].control = control;
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}
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void RP1GPIO::set_output_override(u32 pin_number, OutputOverride output_override)
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{
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auto [bank_number, relative_pin_number] = MUST(pin_number_to_bank_and_relative_pin_number(pin_number));
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auto control = m_io_bank_registers[bank_number]->gpio[relative_pin_number].control;
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control &= ~IOBankRegisters::CONTROL_OUTPUT_OVERRIDE_MASK;
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control |= static_cast<u32>(output_override) << IOBankRegisters::CONTROL_OUTPUT_OVERRIDE_OFFSET;
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m_io_bank_registers[bank_number]->gpio[relative_pin_number].control = control;
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}
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RP1GPIO::RP1GPIO(RP1& rp1, Array<Memory::TypedMapping<IOBankRegisters volatile>, 3> io_bank_registers, Array<Memory::TypedMapping<PadsBankRegisters volatile>, 3> pads_bank_registers)
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: m_rp1(rp1)
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, m_io_bank_registers(move(io_bank_registers))
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@@ -24,6 +24,26 @@ public:
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void set_pin_function(u32 pin_number, u8 function);
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void set_pin_enabled(u32 pin_number, bool);
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// FIXME: Instead of output (enable) overrides we should probably use the Registered IO interface to manually drive GPIOs.
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enum class OutputEnableOverride {
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UsePeripheralSignal = 0x0,
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UseInvertedPeripheralSignal = 0x1,
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ForceDisable = 0x2,
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ForceEnable = 0x3,
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};
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void set_output_enable_override(u32 pin_number, OutputEnableOverride);
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enum class OutputOverride {
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UsePeripheralSignal = 0x0,
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UseInvertedPeripheralSignal = 0x1,
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ForceLow = 0x2,
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ForceHigh = 0x3,
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};
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void set_output_override(u32 pin_number, OutputOverride);
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struct IOBankRegisters;
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struct PadsBankRegisters;
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@@ -39,6 +59,12 @@ struct RP1GPIO::IOBankRegisters {
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static constexpr size_t CONTROL_FUNCTION_SELECT_OFFSET = 0;
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static constexpr size_t CONTROL_FUNCTION_SELECT_MASK = 0x1f << 0;
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static constexpr size_t CONTROL_OUTPUT_ENABLE_OVERRIDE_OFFSET = 14;
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static constexpr size_t CONTROL_OUTPUT_ENABLE_OVERRIDE_MASK = 0x3 << 14;
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static constexpr size_t CONTROL_OUTPUT_OVERRIDE_OFFSET = 12;
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static constexpr size_t CONTROL_OUTPUT_OVERRIDE_MASK = 0x3 << 12;
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struct {
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u32 status;
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u32 control;
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