Update to bsnes v061 release.

Please keep in mind that bsnes v060 remains the current stable release. v061 has been released as a work-in-progress build. As such, it is only available at Google Code.
I am releasing this WIP to allow the public to test out and comment on the new XML mapping system, as well as the integration of mightymo's cheat code database into the cheat editor. I would greatly appreciate feedback on these two on the forums.
There are some important issues with this release. The biggest is the move to C++0x. This requires GCC 4.4.0 or newer to compile, thus it is not currently possible to build this on OS X using Xcode. Nor would it be possible on certain BSDs or older distros. If you have an older compiler, please stick with v060, or use a binary release where available.
Another issue is that TDM/GCC 4.4.1 for Windows crashes with an internal compiler error when attempting to generate a profile for the DSP-1 module. This is a bug in the compiler, and not in the code itself. The workaround is to simply omit profile-guided optimization for this one object.
Lastly, there's also a known bug in the memory mapping. If you load an SA-1 game, SuperFX games will not load properly afterward unless you restart the emulator. I'm looking into the cause now, but it didn't seem serious enough to hold up a WIP release.
So, yes. If you want a good gaming experience that's been fully tested and stable, please stick with v060. If you want to see some bleeding edge features, I'd appreciate feedback on v061. Thanks for reading this.
Changelog:
    - added mightymo's cheat code database, access via "Find Cheat Codes" button on cheat editor window
    - added an option to temporarily disable all cheat codes quickly
    - debugger now properly uses S-SMP IPLROM when needed for disassembling and tracing
    - indexed indirect read opcodes in the S-CPU were testing for IRQs one cycle too early [someone42]
    - fix an off-by-one array iteration in S-PPU OAM rendering [PiCiJi]
    - added some implicit linked libraries to linker flags for Fedora [belegdol]
    - moved from C++98 to C++0x, resulting in substantial code cleanups and simplifications
    - C++0x: implemented foreach() concept for linear container iteration
    - C++0x: implemented concept system using SFINAE and type traits
    - C++0x: utilized auto keyword to increase source readability
    - C++0x: moved to strongly-typed enumerators
    - C++0x: rewrote va_list-based code to use type-safe variadic templates
    - C++0x: replaced noncopyable class with deleted default copy functions
    - C++0x: replaced custom static_assert template class with built-in version
    - C++0x: utilized rvalue references to implement move semantics into string, array, vector and serialization classes
    - C++0x: utilized std::initializer_list for { ... } initialization support to lstring, array and vector classes

bsnes/Makefile

@@ -1,42 +1,95 @@
-include nall/Makefile
-snes := snes
-gameboy := gameboy
-profile := compatibility
-ui := ui
+include lib/nall/Makefile
 
-# debugger
-options :=
+ui := ui_qt
+qtlibs := $(strip QtCore QtGui $(if $(findstring osx,$(platform)),QtOpenGL))
+include lib/nall/qt/Makefile
 
-# compiler
-c       := $(compiler) -std=gnu99
-cpp     := $(subst cc,++,$(compiler)) -std=gnu++0x
-flags   := -O3 -fomit-frame-pointer -I.
-link    :=
-objects := libco
+################
+### compiler ###
+################
 
-# profile-guided instrumentation
+c     := $(compiler) --std=gnu99
+cpp   := $(subst cc,++,$(compiler)) -std=gnu++0x
+flags := -O3 -fomit-frame-pointer -Ilib
+link  :=
+
+# profile-guided instrumentation:
 # flags += -fprofile-generate
 # link += -lgcov
 
-# profile-guided optimization
+# profile-guided optimization:
 # flags += -fprofile-use
 
-flags := $(flags) $(foreach o,$(call strupper,$(options)),-D$o)
+################
+### platform ###
+################
 
-# platform
 ifeq ($(platform),x)
   link += -s -ldl -lX11 -lXext
+
+  ruby := video.glx video.xv video.qtraster video.sdl
+  ruby += audio.alsa audio.openal audio.oss audio.pulseaudio audio.pulseaudiosimple audio.ao
+  ruby += input.sdl input.x
+
+  link += $(if $(findstring audio.openal,$(ruby)),-lopenal)
 else ifeq ($(platform),osx)
+  ruby := video.qtopengl video.qtraster
+  ruby += audio.openal
+  ruby += input.carbon
+
+  link += $(if $(findstring audio.openal,$(ruby)),-framework OpenAL)
 else ifeq ($(platform),win)
-  link += -mwindows
-# link += -mconsole
-  link += -mthreads -s -luuid -lkernel32 -luser32 -lgdi32 -lcomctl32 -lcomdlg32 -lshell32 -lole32
+  link += -mwindows -mthreads
+# link += -mconsole -mthreads
+  link += -s -luuid -lkernel32 -luser32 -lgdi32 -lshell32
+  # statically link Qt for Windows build
   link += -enable-stdcall-fixup -Wl,-enable-auto-import -Wl,-enable-runtime-pseudo-reloc
+
+  ruby := video.direct3d video.wgl video.directdraw video.gdi video.qtraster
+  ruby += audio.directsound
+  ruby += input.rawinput input.directinput
+
+  link += $(if $(findstring audio.openal,$(ruby)),-lopenal32)
 else
   unknown_platform: help;
 endif
 
-# implicit rules
+############
+### ruby ###
+############
+
+rubyflags := $(if $(finstring .sdl,$(ruby)),`sdl-config --cflags`)
+rubyflags += $(if $(findstring .qt,$(ruby)),$(qtinc))
+
+link += $(if $(findstring .sdl,$(ruby)),`sdl-config --libs`)
+link += $(if $(findstring video.direct3d,$(ruby)),-ld3d9)
+link += $(if $(findstring video.directdraw,$(ruby)),-lddraw)
+link += $(if $(findstring video.glx,$(ruby)),-lGL)
+link += $(if $(findstring video.wgl,$(ruby)),-lopengl32)
+link += $(if $(findstring video.xv,$(ruby)),-lXv)
+link += $(if $(findstring audio.alsa,$(ruby)),-lasound)
+link += $(if $(findstring audio.ao,$(ruby)),-lao)
+link += $(if $(findstring audio.directsound,$(ruby)),-ldsound)
+link += $(if $(findstring audio.pulseaudio,$(ruby)),-lpulse)
+link += $(if $(findstring audio.pulseaudiosimple,$(ruby)),-lpulse-simple)
+link += $(if $(findstring input.directinput,$(ruby)),-ldinput8 -ldxguid)
+link += $(if $(findstring input.rawinput,$(ruby)),-ldinput8 -ldxguid)
+
+###############
+### objects ###
+###############
+
+objects := libco ruby
+objects += system cartridge cheat
+objects += memory smemory cpu cpucore scpu smp smpcore ssmp dsp sdsp ppu bppu
+objects += supergameboy superfx sa1
+objects += bsx srtc sdd1 spc7110 cx4 dsp1 dsp2 dsp3 dsp4 obc1 st0010 st0011 st0018
+objects += msu1
+
+######################
+### implicit rules ###
+######################
+
 compile = \
   $(strip \
     $(if $(filter %.c,$<), \
@@ -51,17 +104,110 @@ compile = \
 
 all: build;
 
-obj/libco.o: libco/libco.c libco/*
-
 include $(ui)/Makefile
+objects := $(patsubst %,obj/%.o,$(objects))
+rubydef := $(foreach c,$(subst .,_,$(call strupper,$(ruby))),-D$c)
 
-# targets
-clean:
+#################
+### libraries ###
+#################
+
+obj/ruby.o: lib/ruby/ruby.cpp $(call rwildcard,lib/ruby/*)
+	$(call compile,$(rubydef) $(rubyflags))
+obj/libco.o: lib/libco/libco.c lib/libco/*
+
+#################
+### utilities ###
+#################
+
+obj/cartridge.o: cartridge/cartridge.cpp cartridge/*
+obj/cheat.o    : cheat/cheat.cpp cheat/*
+
+##############
+### memory ###
+##############
+
+obj/memory.o : memory/memory.cpp memory/*
+obj/smemory.o: memory/smemory/smemory.cpp $(call rwildcard,memory/smemory/)
+
+###########
+### cpu ###
+###########
+
+obj/cpu.o    : cpu/cpu.cpp cpu/*
+obj/cpucore.o: cpu/core/core.cpp $(call rwildcard,cpu/core/)
+obj/scpu.o   : cpu/scpu/scpu.cpp $(call rwildcard,cpu/scpu/)
+
+###########
+### smp ###
+###########
+
+obj/smp.o    : smp/smp.cpp smp/*
+obj/smpcore.o: smp/core/core.cpp $(call rwildcard,smp/core/)
+obj/ssmp.o   : smp/ssmp/ssmp.cpp $(call rwildcard,smp/ssmp/)
+
+###########
+### dsp ###
+###########
+
+obj/dsp.o : dsp/dsp.cpp dsp/*
+obj/adsp.o: dsp/adsp/adsp.cpp dsp/adsp/*
+obj/sdsp.o: dsp/sdsp/sdsp.cpp dsp/sdsp/*
+
+###########
+### ppu ###
+###########
+
+obj/ppu.o : ppu/ppu.cpp ppu/*
+obj/bppu.o: ppu/bppu/bppu.cpp $(call rwildcard,ppu/bppu/)
+
+##############
+### system ###
+##############
+
+obj/system.o: system/system.cpp $(call rwildcard,system/)
+
+#####################
+### special chips ###
+#####################
+
+obj/supergameboy.o: chip/supergameboy/supergameboy.cpp $(call rwildcard,chip/supergameboy/)
+obj/superfx.o     : chip/superfx/superfx.cpp $(call rwildcard,chip/superfx/)
+obj/sa1.o         : chip/sa1/sa1.cpp $(call rwildcard,chip/sa1/)
+obj/bsx.o         : chip/bsx/bsx.cpp chip/bsx/*
+obj/srtc.o        : chip/srtc/srtc.cpp chip/srtc/*
+obj/sdd1.o        : chip/sdd1/sdd1.cpp chip/sdd1/*
+obj/spc7110.o     : chip/spc7110/spc7110.cpp chip/spc7110/*
+obj/cx4.o         : chip/cx4/cx4.cpp chip/cx4/*
+obj/dsp1.o        : chip/dsp1/dsp1.cpp chip/dsp1/*
+obj/dsp2.o        : chip/dsp2/dsp2.cpp chip/dsp2/*
+obj/dsp3.o        : chip/dsp3/dsp3.cpp chip/dsp3/*
+obj/dsp4.o        : chip/dsp4/dsp4.cpp chip/dsp4/*
+obj/obc1.o        : chip/obc1/obc1.cpp chip/obc1/*
+obj/st0010.o      : chip/st0010/st0010.cpp chip/st0010/*
+obj/st0011.o      : chip/st0011/st0011.cpp chip/st0011/*
+obj/st0018.o      : chip/st0018/st0018.cpp chip/st0018/*
+obj/msu1.o        : chip/msu1/msu1.cpp chip/msu1/*
+
+###############
+### targets ###
+###############
+
+build: ui_build $(objects)
+ifeq ($(platform),osx)
+	test -d ../bsnes.app || mkdir -p ../bsnes.app/Contents/MacOS
+	$(strip $(cpp) -o ../bsnes.app/Contents/MacOS/bsnes $(objects) $(link))
+else
+	$(strip $(cpp) -o ../bsnes $(objects) $(link))
+endif
+
+install:
+	install -D -m 755 ../bsnes $(DESTDIR)$(prefix)/bin/bsnes
+	install -D -m 644 data/bsnes.png $(DESTDIR)$(prefix)/share/pixmaps/bsnes.png
+	install -D -m 644 data/bsnes.desktop $(DESTDIR)$(prefix)/share/applications/bsnes.desktop
+
+clean: ui_clean
 	-@$(call delete,obj/*.o)
-	-@$(call delete,obj/*.a)
-	-@$(call delete,obj/*.so)
-	-@$(call delete,obj/*.dylib)
-	-@$(call delete,obj/*.dll)
 	-@$(call delete,*.res)
 	-@$(call delete,*.pgd)
 	-@$(call delete,*.pgc)
@@ -69,7 +215,17 @@ clean:
 	-@$(call delete,*.pdb)
 	-@$(call delete,*.manifest)
 
-archive-all:
-	tar -cjf bsnes.tar.bz2 data gameboy libco nall obj out phoenix ruby snes ui ui-gameboy ui-libsnes Makefile cc.bat clean.bat sync.sh
-
-help:;
+help:
+	@echo "Usage: $(MAKE) platform=(os) compiler=(cc) [options]"
+	@echo ""
+	@echo "Supported platforms:"
+	@echo "  x   - Linux / BSD (x86, x86-64)"
+	@echo "  win - Windows (x86, x86-64)"
+	@echo ""
+	@echo "Supported compilers:"
+	@echo "  gcc              - GCC compiler"
+	@echo "  mingw32-gcc      - MinGW compiler"
+	@echo "  i586-mingw32-gcc - MinGW cross compiler"
+	@echo ""
+	@echo "Example: $(MAKE) platform=x compiler=gcc"
+	@echo ""

bsnes/base.hpp

@@ -0,0 +1,47 @@
+static const char bsnesVersion[] = "061";
+static const char bsnesTitle[] = "bsnes";
+static const unsigned bsnesSerializerVersion = 5;
+
+//S-DSP can be encapsulated into a state machine using #define magic
+//this avoids ~2.048m co_switch() calls per second (~5% speedup)
+#define DSP_STATE_MACHINE
+
+//game genie + pro action replay code support (~2% speed hit)
+#define CHEAT_SYSTEM
+
+//enable debugging extensions (~15% speed hit)
+//#define DEBUGGER
+
+#include <libco/libco.h>
+
+#include <nall/algorithm.hpp>
+#include <nall/any.hpp>
+#include <nall/array.hpp>
+#include <nall/bit.hpp>
+#include <nall/detect.hpp>
+#include <nall/dl.hpp>
+#include <nall/endian.hpp>
+#include <nall/file.hpp>
+#include <nall/foreach.hpp>
+#include <nall/function.hpp>
+#include <nall/moduloarray.hpp>
+#include <nall/platform.hpp>
+#include <nall/priorityqueue.hpp>
+#include <nall/property.hpp>
+#include <nall/serializer.hpp>
+#include <nall/stdint.hpp>
+#include <nall/string.hpp>
+#include <nall/utility.hpp>
+#include <nall/vector.hpp>
+using namespace nall;
+
+typedef int8_t   int8;
+typedef int16_t  int16;
+typedef int32_t  int32;
+typedef int64_t  int64;
+typedef uint8_t  uint8;
+typedef uint16_t uint16;
+typedef uint32_t uint32;
+typedef uint64_t uint64;
+
+#include "interface.hpp"

bsnes/cartridge/cartridge.cpp

@@ -0,0 +1,139 @@
+#include <../base.hpp>
+#include <nall/crc32.hpp>
+#include <nall/sha256.hpp>
+
+#define CARTRIDGE_CPP
+namespace SNES {
+
+#include "xml.cpp"
+#include "serialization.cpp"
+
+namespace memory {
+  MappedRAM cartrom, cartram, cartrtc;
+  MappedRAM bsxflash, bsxram, bsxpram;
+  MappedRAM stArom, stAram;
+  MappedRAM stBrom, stBram;
+  MappedRAM gbrom, gbram, gbrtc;
+};
+
+Cartridge cartridge;
+
+void Cartridge::load(Mode cartridge_mode, const lstring &xml_list) {
+  spc7110_data_rom_offset = 0x100000;
+  supergameboy_version = SuperGameBoyVersion::Version1;
+  supergameboy_ram_size = 0;
+  supergameboy_rtc_size = 0;
+
+  has_bsx_slot   = false;
+  has_superfx    = false;
+  has_sa1        = false;
+  has_srtc       = false;
+  has_sdd1       = false;
+  has_spc7110    = false;
+  has_spc7110rtc = false;
+  has_cx4        = false;
+  has_dsp1       = false;
+  has_dsp2       = false;
+  has_dsp3       = false;
+  has_dsp4       = false;
+  has_obc1       = false;
+  has_st0010     = false;
+  has_st0011     = false;
+  has_st0018     = false;
+  has_msu1       = false;
+
+  mode = cartridge_mode;
+  parse_xml(xml_list);
+
+  if(ram_size > 0) {
+    memory::cartram.map(allocate<uint8_t>(ram_size, 0xff), ram_size);
+  }
+
+  if(has_srtc || has_spc7110rtc) {
+    memory::cartrtc.map(allocate<uint8_t>(20, 0xff), 20);
+  }
+
+  if(mode == Mode::Bsx) {
+    memory::bsxram.map (allocate<uint8_t>( 32 * 1024, 0xff),  32 * 1024);
+    memory::bsxpram.map(allocate<uint8_t>(512 * 1024, 0xff), 512 * 1024);
+  }
+
+  if(mode == Mode::SufamiTurbo) {
+    if(memory::stArom.data()) memory::stAram.map(allocate<uint8_t>(128 * 1024, 0xff), 128 * 1024);
+    if(memory::stBrom.data()) memory::stBram.map(allocate<uint8_t>(128 * 1024, 0xff), 128 * 1024);
+  }
+
+  if(mode == Mode::SuperGameBoy) {
+    if(memory::gbrom.data()) {
+      if(supergameboy_ram_size) memory::gbram.map(allocate<uint8_t>(supergameboy_ram_size, 0xff), supergameboy_ram_size);
+      if(supergameboy_rtc_size) memory::gbrtc.map(allocate<uint8_t>(supergameboy_rtc_size, 0x00), supergameboy_rtc_size);
+    }
+  }
+
+  memory::cartrom.write_protect(true);
+  memory::cartram.write_protect(false);
+  memory::cartrtc.write_protect(false);
+  memory::bsxflash.write_protect(true);
+  memory::bsxram.write_protect(false);
+  memory::bsxpram.write_protect(false);
+  memory::stArom.write_protect(true);
+  memory::stAram.write_protect(false);
+  memory::stBrom.write_protect(true);
+  memory::stBram.write_protect(false);
+  memory::gbrom.write_protect(true);
+  memory::gbram.write_protect(false);
+  memory::gbrtc.write_protect(false);
+
+  unsigned checksum = ~0;                                           foreach(n, memory::cartrom ) checksum = crc32_adjust(checksum, n);
+  if(memory::bsxflash.size() != 0 && memory::bsxflash.size() != ~0) foreach(n, memory::bsxflash) checksum = crc32_adjust(checksum, n);
+  if(memory::stArom.size()   != 0 && memory::stArom.size()   != ~0) foreach(n, memory::stArom  ) checksum = crc32_adjust(checksum, n);
+  if(memory::stBrom.size()   != 0 && memory::stBrom.size()   != ~0) foreach(n, memory::stBrom  ) checksum = crc32_adjust(checksum, n);
+  if(memory::gbrom.size()    != 0 && memory::gbrom.size()    != ~0) foreach(n, memory::gbrom   ) checksum = crc32_adjust(checksum, n);
+  crc32 = ~checksum;
+
+  sha256_ctx sha;
+  uint8_t shahash[32];
+  sha256_init(&sha);
+  sha256_chunk(&sha, memory::cartrom.data(), memory::cartrom.size());
+  sha256_final(&sha);
+  sha256_hash(&sha, shahash);
+
+  string hash;
+  foreach(n, shahash) hash << strhex<2>(n);
+  sha256 = hash;
+
+  bus.load_cart();
+  system.serialize_init();
+  loaded = true;
+}
+
+void Cartridge::unload() {
+  memory::cartrom.reset();
+  memory::cartram.reset();
+  memory::cartrtc.reset();
+  memory::bsxflash.reset();
+  memory::bsxram.reset();
+  memory::bsxpram.reset();
+  memory::stArom.reset();
+  memory::stAram.reset();
+  memory::stBrom.reset();
+  memory::stBram.reset();
+  memory::gbrom.reset();
+  memory::gbram.reset();
+  memory::gbrtc.reset();
+
+  if(loaded == false) return;
+  bus.unload_cart();
+  loaded = false;
+}
+
+Cartridge::Cartridge() {
+  loaded = false;
+  unload();
+}
+
+Cartridge::~Cartridge() {
+  unload();
+}
+
+}

bsnes/cartridge/cartridge.hpp

@@ -0,0 +1,111 @@
+class Cartridge : property<Cartridge> {
+public:
+  enum class Mode : unsigned {
+    Normal,
+    BsxSlotted,
+    Bsx,
+    SufamiTurbo,
+    SuperGameBoy,
+  };
+
+  enum class Region : unsigned {
+    NTSC,
+    PAL,
+  };
+
+  enum class SuperGameBoyVersion : unsigned {
+    Version1,
+    Version2,
+  };
+
+  readonly<bool> loaded;
+  readonly<unsigned> crc32;
+  readonly<string> sha256;
+
+  readonly<Mode> mode;
+  readonly<Region> region;
+  readonly<unsigned> ram_size;
+  readonly<unsigned> spc7110_data_rom_offset;
+  readonly<SuperGameBoyVersion> supergameboy_version;
+  readonly<unsigned> supergameboy_ram_size;
+  readonly<unsigned> supergameboy_rtc_size;
+
+  readonly<bool> has_bsx_slot;
+  readonly<bool> has_superfx;
+  readonly<bool> has_sa1;
+  readonly<bool> has_srtc;
+  readonly<bool> has_sdd1;
+  readonly<bool> has_spc7110;
+  readonly<bool> has_spc7110rtc;
+  readonly<bool> has_cx4;
+  readonly<bool> has_dsp1;
+  readonly<bool> has_dsp2;
+  readonly<bool> has_dsp3;
+  readonly<bool> has_dsp4;
+  readonly<bool> has_obc1;
+  readonly<bool> has_st0010;
+  readonly<bool> has_st0011;
+  readonly<bool> has_st0018;
+  readonly<bool> has_msu1;
+
+  struct Mapping {
+    Memory *memory;
+    MMIO *mmio;
+    Bus::MapMode mode;
+    unsigned banklo;
+    unsigned bankhi;
+    unsigned addrlo;
+    unsigned addrhi;
+    unsigned offset;
+    unsigned size;
+
+    Mapping();
+    Mapping(Memory&);
+    Mapping(MMIO&);
+  };
+  array<Mapping> mapping;
+
+  void load(Mode, const lstring&);
+  void unload();
+
+  void serialize(serializer&);
+  Cartridge();
+  ~Cartridge();
+
+private:
+  void parse_xml(const lstring&);
+  void parse_xml_cartridge(const char*);
+  void parse_xml_bsx(const char*);
+  void parse_xml_sufami_turbo(const char*, bool);
+  void parse_xml_gameboy(const char*);
+
+  void xml_parse_rom(xml_element*);
+  void xml_parse_ram(xml_element*);
+  void xml_parse_superfx(xml_element*);
+  void xml_parse_sa1(xml_element*);
+  void xml_parse_bsx(xml_element*);
+  void xml_parse_sufamiturbo(xml_element*);
+  void xml_parse_supergameboy(xml_element*);
+  void xml_parse_srtc(xml_element*);
+  void xml_parse_sdd1(xml_element*);
+  void xml_parse_spc7110(xml_element*);
+  void xml_parse_cx4(xml_element*);
+  void xml_parse_necdsp(xml_element*);
+  void xml_parse_obc1(xml_element*);
+  void xml_parse_setadsp(xml_element*);
+  void xml_parse_setarisc(xml_element*);
+  void xml_parse_msu1(xml_element*);
+
+  void xml_parse_address(Mapping&, const string&);
+  void xml_parse_mode(Mapping&, const string&);
+};
+
+namespace memory {
+  extern MappedRAM cartrom, cartram, cartrtc;
+  extern MappedRAM bsxflash, bsxram, bsxpram;
+  extern MappedRAM stArom, stAram;
+  extern MappedRAM stBrom, stBram;
+  extern MappedRAM gbrom, gbram, gbrtc;
+};
+
+extern Cartridge cartridge;

bsnes/cartridge/serialization.cpp

@@ -0,0 +1,37 @@
+#ifdef CARTRIDGE_CPP
+
+void Cartridge::serialize(serializer &s) {
+  if(memory::cartram.size() != 0 && memory::cartram.size() != ~0) {
+    s.array(memory::cartram.data(), memory::cartram.size());
+  }
+
+  if(memory::cartrtc.size() != 0 && memory::cartrtc.size() != ~0) {
+    s.array(memory::cartrtc.data(), memory::cartrtc.size());
+  }
+
+  if(memory::bsxram.size() != 0 && memory::bsxram.size() != ~0) {
+    s.array(memory::bsxram.data(), memory::bsxram.size());
+  }
+
+  if(memory::bsxpram.size() != 0 && memory::bsxpram.size() != ~0) {
+    s.array(memory::bsxpram.data(), memory::bsxpram.size());
+  }
+
+  if(memory::stAram.size() != 0 && memory::stAram.size() != ~0) {
+    s.array(memory::stAram.data(), memory::stAram.size());
+  }
+
+  if(memory::stBram.size() != 0 && memory::stBram.size() != ~0) {
+    s.array(memory::stBram.data(), memory::stBram.size());
+  }
+
+  if(memory::gbram.size() != 0 && memory::gbram.size() != ~0) {
+    s.array(memory::gbram.data(), memory::gbram.size());
+  }
+
+  if(memory::gbrtc.size() != 0 && memory::gbrtc.size() != ~0) {
+    s.array(memory::gbrtc.data(), memory::gbrtc.size());
+  }
+}
+
+#endif

bsnes/cartridge/xml.cpp

@@ -0,0 +1,655 @@
+#ifdef CARTRIDGE_CPP
+
+void Cartridge::parse_xml(const lstring &list) {
+  parse_xml_cartridge(list[0]);
+
+  if(mode == Mode::BsxSlotted) {
+    parse_xml_bsx(list[1]);
+  } else if(mode == Mode::Bsx) {
+    parse_xml_bsx(list[1]);
+  } else if(mode == Mode::SufamiTurbo) {
+    parse_xml_sufami_turbo(list[1], 0);
+    parse_xml_sufami_turbo(list[2], 1);
+  } else if(mode == Mode::SuperGameBoy) {
+    parse_xml_gameboy(list[1]);
+  }
+}
+
+void Cartridge::parse_xml_cartridge(const char *data) {
+  xml_element *document = xml_parse(data);
+  if(document == 0) return;
+
+  foreach(head, document->element) {
+    if(head->name == "cartridge") {
+      foreach(attr, head->attribute) {
+        if(attr->name == "region") {
+          if(attr->content == "NTSC") region = Region::NTSC;
+          if(attr->content == "PAL") region = Region::PAL;
+        }
+      }
+
+      foreach(node, head->element) {
+        if(node->name == "rom") xml_parse_rom(node);
+        if(node->name == "ram") xml_parse_ram(node);
+        if(node->name == "superfx") xml_parse_superfx(node);
+        if(node->name == "sa1") xml_parse_sa1(node);
+        if(node->name == "bsx") xml_parse_bsx(node);
+        if(node->name == "sufamiturbo") xml_parse_sufamiturbo(node);
+        if(node->name == "supergameboy") xml_parse_supergameboy(node);
+        if(node->name == "srtc") xml_parse_srtc(node);
+        if(node->name == "sdd1") xml_parse_sdd1(node);
+        if(node->name == "spc7110") xml_parse_spc7110(node);
+        if(node->name == "cx4") xml_parse_cx4(node);
+        if(node->name == "necdsp") xml_parse_necdsp(node);
+        if(node->name == "obc1") xml_parse_obc1(node);
+        if(node->name == "setadsp") xml_parse_setadsp(node);
+        if(node->name == "setarisc") xml_parse_setarisc(node);
+        if(node->name == "msu1") xml_parse_msu1(node);
+      }
+    }
+  }
+}
+
+void Cartridge::parse_xml_bsx(const char *data) {
+}
+
+void Cartridge::parse_xml_sufami_turbo(const char *data, bool slot) {
+}
+
+void Cartridge::parse_xml_gameboy(const char *data) {
+  xml_element *document = xml_parse(data);
+  if(document == 0) return;
+
+  foreach(head, document->element) {
+    if(head->name == "cartridge") {
+      foreach(attr, head->attribute) {
+        if(attr->name == "rtc") {
+          supergameboy_rtc_size = (attr->content == "true") ? 4 : 0;
+        }
+      }
+
+      foreach(leaf, head->element) {
+        if(leaf->name == "ram") {
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "size") {
+              supergameboy_ram_size = strhex(attr->content);
+            }
+          }
+        }
+      }
+    }
+  }
+
+  delete document;
+}
+
+void Cartridge::xml_parse_rom(xml_element *root) {
+  foreach(leaf, root->element) {
+    if(leaf->name == "map") {
+      Mapping m(memory::cartrom);
+      foreach(attr, leaf->attribute) {
+        if(attr->name == "address") xml_parse_address(m, attr->content);
+        if(attr->name == "mode") xml_parse_mode(m, attr->content);
+        if(attr->name == "offset") m.offset = strhex(attr->content);
+        if(attr->name == "size") m.size = strhex(attr->content);
+      }
+      mapping.add(m);
+    }
+  }
+}
+
+void Cartridge::xml_parse_ram(xml_element *root) {
+  foreach(attr, root->attribute) {
+    if(attr->name == "size") ram_size = strhex(attr->content);
+  }
+
+  foreach(leaf, root->element) {
+    if(leaf->name == "map") {
+      Mapping m(memory::cartram);
+      foreach(attr, leaf->attribute) {
+        if(attr->name == "address") xml_parse_address(m, attr->content);
+        if(attr->name == "mode") xml_parse_mode(m, attr->content);
+        if(attr->name == "offset") m.offset = strhex(attr->content);
+        if(attr->name == "size") m.size = strhex(attr->content);
+      }
+      mapping.add(m);
+    }
+  }
+}
+
+void Cartridge::xml_parse_superfx(xml_element *root) {
+  has_superfx = true;
+
+  foreach(node, root->element) {
+    if(node->name == "rom") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(memory::fxrom);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "ram") {
+      foreach(attr, node->attribute) {
+        if(attr->name == "size") ram_size = strhex(attr->content);
+      }
+
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(memory::fxram);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(superfx);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_sa1(xml_element *root) {
+  has_sa1 = true;
+
+  foreach(node, root->element) {
+    if(node->name == "rom") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(memory::vsprom);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "iram") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(memory::cpuiram);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "bwram") {
+      foreach(attr, node->attribute) {
+        if(attr->name == "size") ram_size = strhex(attr->content);
+      }
+
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(memory::cc1bwram);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(sa1);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_bsx(xml_element *root) {
+  foreach(node, root->element) {
+    if(node->name == "slot") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(memory::bsxflash);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(bsxcart);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_sufamiturbo(xml_element *root) {
+  foreach(node, root->element) {
+    if(node->name == "slot") {
+      bool slotid = 0;
+      foreach(attr, node->attribute) {
+        if(attr->name == "id") {
+          if(attr->content == "A") slotid = 0;
+          if(attr->content == "B") slotid = 1;
+        }
+      }
+
+      foreach(slot, node->element) {
+        if(slot->name == "rom") {
+          foreach(leaf, slot->element) {
+            if(leaf->name == "map") {
+              Mapping m(slotid == 0 ? memory::stArom : memory::stBrom);
+              foreach(attr, leaf->attribute) {
+                if(attr->name == "address") xml_parse_address(m, attr->content);
+                if(attr->name == "mode") xml_parse_mode(m, attr->content);
+                if(attr->name == "offset") m.offset = strhex(attr->content);
+                if(attr->name == "size") m.size = strhex(attr->content);
+              }
+              if(m.memory->size() > 0) mapping.add(m);
+            }
+          }
+        } else if(slot->name == "ram") {
+          foreach(leaf, slot->element) {
+            if(leaf->name == "map") {
+              Mapping m(slotid == 0 ? memory::stAram : memory::stBram);
+              foreach(attr, leaf->attribute) {
+                if(attr->name == "address") xml_parse_address(m, attr->content);
+                if(attr->name == "mode") xml_parse_mode(m, attr->content);
+                if(attr->name == "offset") m.offset = strhex(attr->content);
+                if(attr->name == "size") m.size = strhex(attr->content);
+              }
+              if(m.memory->size() > 0) mapping.add(m);
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_supergameboy(xml_element *root) {
+  foreach(attr, root->attribute) {
+    if(attr->name == "revision") {
+      if(attr->content == "1") supergameboy_version = SuperGameBoyVersion::Version1;
+      if(attr->content == "2") supergameboy_version = SuperGameBoyVersion::Version2;
+    }
+  }
+
+  foreach(node, root->element) {
+    if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m((Memory&)supergameboy);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_srtc(xml_element *root) {
+  has_srtc = true;
+
+  foreach(node, root->element) {
+    if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(srtc);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_sdd1(xml_element *root) {
+  has_sdd1 = true;
+
+  foreach(node, root->element) {
+    if(node->name == "mcu") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m((Memory&)sdd1);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m((MMIO&)sdd1);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_spc7110(xml_element *root) {
+  has_spc7110 = true;
+
+  foreach(node, root->element) {
+    if(node->name == "dcu") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(spc7110dcu);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "mcu") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(spc7110mcu);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "offset") spc7110_data_rom_offset = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(spc7110);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "ram") {
+      foreach(attr, node->attribute) {
+        if(attr->name == "size") ram_size = strhex(attr->content);
+      }
+
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(spc7110ram);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+            if(attr->name == "mode") xml_parse_mode(m, attr->content);
+            if(attr->name == "offset") m.offset = strhex(attr->content);
+            if(attr->name == "size") m.size = strhex(attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "rtc") {
+      has_spc7110rtc = true;
+
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(spc7110);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_cx4(xml_element *root) {
+  has_cx4 = true;
+
+  foreach(node, root->element) {
+    if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(cx4);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_necdsp(xml_element *root) {
+  unsigned program = 0;
+
+  foreach(attr, root->attribute) {
+    if(attr->name == "program") {
+      if(attr->content == "DSP-1" || attr->content == "DSP-1A" || attr->content == "DSP-1B") {
+        program = 1;
+        has_dsp1 = true;
+      } else if(attr->content == "DSP-2") {
+        program = 2;
+        has_dsp2 = true;
+      } else if(attr->content == "DSP-3") {
+        program = 3;
+        has_dsp3 = true;
+      } else if(attr->content == "DSP-4") {
+        program = 4;
+        has_dsp4 = true;
+      }
+    }
+  }
+
+  Memory *dr[5] = { 0, &dsp1dr, &dsp2, &dsp3, &dsp4 };
+  Memory *sr[5] = { 0, &dsp1sr, &dsp2, &dsp3, &dsp4 };
+
+  foreach(node, root->element) {
+    if(node->name == "dr" && dr[program]) {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(*dr[program]);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    } else if(node->name == "sr" && sr[program]) {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(*sr[program]);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_obc1(xml_element *root) {
+  has_obc1 = true;
+
+  foreach(node, root->element) {
+    if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(obc1);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_setadsp(xml_element *root) {
+  unsigned program = 0;
+
+  foreach(attr, root->attribute) {
+    if(attr->name == "program") {
+      if(attr->content == "ST-0010") {
+        program = 1;
+        has_st0010 = true;
+      } else if(attr->content == "ST-0011") {
+        program = 2;
+        has_st0011 = true;
+      }
+    }
+  }
+
+  Memory *map[3] = { 0, &st0010, 0 };
+
+  foreach(node, root->element) {
+    if(node->name == "mmio" && map[program]) {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(*map[program]);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_setarisc(xml_element *root) {
+  unsigned program = 0;
+
+  foreach(attr, root->attribute) {
+    if(attr->name == "program") {
+      if(attr->content == "ST-0018") {
+        program = 1;
+        has_st0018 = true;
+      }
+    }
+  }
+
+  MMIO *map[2] = { 0, &st0018 };
+
+  foreach(node, root->element) {
+    if(node->name == "mmio" && map[program]) {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(*map[program]);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_msu1(xml_element *root) {
+  has_msu1 = true;
+
+  foreach(node, root->element) {
+    if(node->name == "mmio") {
+      foreach(leaf, node->element) {
+        if(leaf->name == "map") {
+          Mapping m(msu1);
+          foreach(attr, leaf->attribute) {
+            if(attr->name == "address") xml_parse_address(m, attr->content);
+          }
+          mapping.add(m);
+        }
+      }
+    }
+  }
+}
+
+void Cartridge::xml_parse_address(Mapping &m, const string &data) {
+  lstring part;
+  part.split(":", data);
+  if(part.size() != 2) return;
+
+  lstring subpart;
+  subpart.split("-", part[0]);
+  if(subpart.size() == 1) {
+    m.banklo = strhex(subpart[0]);
+    m.bankhi = m.banklo;
+  } else if(subpart.size() == 2) {
+    m.banklo = strhex(subpart[0]);
+    m.bankhi = strhex(subpart[1]);
+  }
+
+  subpart.split("-", part[1]);
+  if(subpart.size() == 1) {
+    m.addrlo = strhex(subpart[0]);
+    m.addrhi = m.addrlo;
+  } else if(subpart.size() == 2) {
+    m.addrlo = strhex(subpart[0]);
+    m.addrhi = strhex(subpart[1]);
+  }
+}
+
+void Cartridge::xml_parse_mode(Mapping &m, const string& data) {
+       if(data == "direct") m.mode = Bus::MapMode::Direct;
+  else if(data == "linear") m.mode = Bus::MapMode::Linear;
+  else if(data == "shadow") m.mode = Bus::MapMode::Shadow;
+}
+
+Cartridge::Mapping::Mapping() {
+  memory = 0;
+  mmio = 0;
+  mode = Bus::MapMode::Direct;
+  banklo = bankhi = addrlo = addrhi = offset = size = 0;
+}
+
+Cartridge::Mapping::Mapping(Memory &memory_) {
+  memory = &memory_;
+  mmio = 0;
+  mode = Bus::MapMode::Direct;
+  banklo = bankhi = addrlo = addrhi = offset = size = 0;
+}
+
+Cartridge::Mapping::Mapping(MMIO &mmio_) {
+  memory = 0;
+  mmio = &mmio_;
+  mode = Bus::MapMode::Direct;
+  banklo = bankhi = addrlo = addrhi = offset = size = 0;
+}
+
+#endif

bsnes/cc.bat

@@ -1,2 +1,3 @@
-@mingw32-make -j 8
-@pause
+@mingw32-make
+
+@pause

bsnes/cheat/cheat-inline.hpp

@@ -0,0 +1,2 @@
+bool Cheat::active() const { return cheat_enabled; }
+bool Cheat::exists(unsigned addr) const { return bitmask[addr >> 3] & 1 << (addr & 7); }

bsnes/cheat/cheat.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define CHEAT_CPP
 namespace SNES {
@@ -15,7 +15,7 @@ void Cheat::enable(bool state) {
 }
 
 void Cheat::synchronize() {
-  memset(override, 0x00, 16 * 1024 * 1024);
+  memset(bitmask, 0x00, sizeof bitmask);
   code_enabled = false;
 
   for(unsigned i = 0; i < size(); i++) {
@@ -26,16 +26,16 @@ void Cheat::synchronize() {
       code_enabled = true;
 
       unsigned addr = mirror(code.addr[n]);
-      override[addr] = true;
+      bitmask[addr >> 3] |= 1 << (addr & 7);
       if((addr & 0xffe000) == 0x7e0000) {
         //mirror $7e:0000-1fff to $00-3f|80-bf:0000-1fff
         unsigned mirroraddr;
         for(unsigned x = 0; x <= 0x3f; x++) {
           mirroraddr = ((0x00 + x) << 16) + (addr & 0x1fff);
-          override[mirroraddr] = true;
+          bitmask[mirroraddr >> 3] |= 1 << (mirroraddr & 7);
 
           mirroraddr = ((0x80 + x) << 16) + (addr & 0x1fff);
-          override[mirroraddr] = true;
+          bitmask[mirroraddr >> 3] |= 1 << (mirroraddr & 7);
         }
       }
     }
@@ -44,7 +44,7 @@ void Cheat::synchronize() {
   cheat_enabled = system_enabled && code_enabled;
 }
 
-uint8 Cheat::read(unsigned addr) const {
+bool Cheat::read(unsigned addr, uint8 &data) const {
   addr = mirror(addr);
 
   for(unsigned i = 0; i < size(); i++) {
@@ -53,25 +53,18 @@ uint8 Cheat::read(unsigned addr) const {
 
     for(unsigned n = 0; n < code.addr.size(); n++) {
       if(addr == mirror(code.addr[n])) {
-        return code.data[n];
+        data = code.data[n];
+        return true;
       }
     }
   }
 
-  return 0x00;
-}
-
-void Cheat::init() {
-  memset(override, 0x00, 16 * 1024 * 1024);
+  return false;
 }
 
 Cheat::Cheat() {
-  override = new uint8[16 * 1024 * 1024];
   system_enabled = true;
-}
-
-Cheat::~Cheat() {
-  delete[] override;
+  synchronize();
 }
 
 //===============
@@ -80,7 +73,7 @@ Cheat::~Cheat() {
 
 bool Cheat::decode(const char *s, unsigned &addr, uint8 &data, Type &type) {
   string t = s;
-  t.lower();
+  strlower(t);
 
   #define ischr(n) ((n >= '0' && n <= '9') || (n >= 'a' && n <= 'f'))
 
@@ -91,7 +84,7 @@ bool Cheat::decode(const char *s, unsigned &addr, uint8 &data, Type &type) {
     for(unsigned i = 0; i < 8; i++) if(!ischr(t[i])) return false;
 
     type = Type::ProActionReplay;
-    unsigned r = hex((const char*)t);
+    unsigned r = strhex((const char*)t);
     addr = r >> 8;
     data = r & 0xff;
     return true;
@@ -102,8 +95,8 @@ bool Cheat::decode(const char *s, unsigned &addr, uint8 &data, Type &type) {
     for(unsigned i = 0; i < 8; i++) if(!ischr(t[i])) return false;
 
     type = Type::GameGenie;
-    t.transform("df4709156bc8a23e", "0123456789abcdef");
-    unsigned r = hex((const char*)t);
+    strtr(t, "df4709156bc8a23e", "0123456789abcdef");
+    unsigned r = strhex((const char*)t);
     //8421 8421 8421 8421 8421 8421
     //abcd efgh ijkl mnop qrst uvwx
     //ijkl qrst opab cduv wxef ghmn
@@ -132,7 +125,7 @@ bool Cheat::encode(string &s, unsigned addr, uint8 data, Type type) {
   char t[16];
 
   if(type == Type::ProActionReplay) {
-    s = string(hex<6>(addr), hex<2>(data));
+    s = sprint("$$", strhex<6>(addr), strhex<2>(data));
     return true;
   } else if(type == Type::GameGenie) {
     unsigned r = addr;
@@ -148,8 +141,8 @@ bool Cheat::encode(string &s, unsigned addr, uint8 data, Type type) {
          | (!!(r & 0x080000) <<  5) | (!!(r & 0x040000) <<  4)
          | (!!(r & 0x020000) <<  3) | (!!(r & 0x010000) <<  2)
          | (!!(r & 0x000800) <<  1) | (!!(r & 0x000400) <<  0);
-    s = string(hex<2>(data), hex<2>(addr >> 16), "-", hex<4>(addr & 0xffff));
-    s.transform("0123456789abcdef", "df4709156bc8a23e");
+    s = sprint("$$-$", strhex<2>(data), strhex<2>(addr >> 16), strhex<4>(addr & 0xffff));
+    strtr(s, "0123456789abcdef", "df4709156bc8a23e");
     return true;
   } else {
     return false;
@@ -187,8 +180,8 @@ bool CheatCode::operator=(string s) {
       return false;
     }
 
-    addr.append(addr_);
-    data.append(data_);
+    addr.add(addr_);
+    data.add(data_);
   }
 
   return true;

bsnes/cheat/cheat.hpp

@@ -10,21 +10,22 @@ struct CheatCode {
 class Cheat : public linear_vector<CheatCode> {
 public:
   enum class Type : unsigned { ProActionReplay, GameGenie };
-  uint8 *override;
 
   bool enabled() const;
   void enable(bool);
   void synchronize();
-  uint8 read(unsigned) const;
-  void init();
+  bool read(unsigned, uint8&) const;
+
+  inline bool active() const;
+  inline bool exists(unsigned addr) const;
 
   Cheat();
-  ~Cheat();
 
   static bool decode(const char*, unsigned&, uint8&, Type&);
   static bool encode(string&, unsigned, uint8, Type);
 
 private:
+  uint8 bitmask[0x200000];
   bool system_enabled;
   bool code_enabled;
   bool cheat_enabled;

bsnes/chip/bsx/bsx.cpp

@@ -0,0 +1,10 @@
+#include <../base.hpp>
+
+#define BSX_CPP
+namespace SNES {
+
+#include "bsx_base.cpp"
+#include "bsx_cart.cpp"
+#include "bsx_flash.cpp"
+};
+

bsnes/chip/bsx/bsx.hpp

@@ -0,0 +1,71 @@
+class BSXBase : public MMIO {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 mmio_read(unsigned addr);
+  void mmio_write(unsigned addr, uint8 data);
+
+private:
+  struct {
+    uint8 r2188, r2189, r218a, r218b;
+    uint8 r218c, r218d, r218e, r218f;
+    uint8 r2190, r2191, r2192, r2193;
+    uint8 r2194, r2195, r2196, r2197;
+    uint8 r2198, r2199, r219a, r219b;
+    uint8 r219c, r219d, r219e, r219f;
+
+    uint8 r2192_counter;
+    uint8 r2192_hour, r2192_minute, r2192_second;
+  } regs;
+};
+
+class BSXCart : public MMIO {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 mmio_read(unsigned addr);
+  void mmio_write(unsigned addr, uint8 data);
+
+  BSXCart();
+  ~BSXCart();
+
+private:
+  struct {
+    uint8 r[16];
+  } regs;
+
+  void update_memory_map();
+};
+
+class BSXFlash : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  unsigned size() const;
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+private:
+  struct {
+    unsigned command;
+    uint8 write_old;
+    uint8 write_new;
+
+    bool flash_enable;
+    bool read_enable;
+    bool write_enable;
+  } regs;
+};
+
+extern BSXBase  bsxbase;
+extern BSXCart  bsxcart;
+extern BSXFlash bsxflash;

bsnes/chip/bsx/bsx_base.cpp

@@ -1,27 +1,23 @@
 #ifdef BSX_CPP
 
-BSXSatellaview bsxsatellaview;
+BSXBase bsxbase;
 
-void BSXSatellaview::init() {
+void BSXBase::init() {
 }
 
-void BSXSatellaview::load() {
-  bus.map(Bus::MapMode::Direct, 0x00, 0x3f, 0x2188, 0x219f, { &BSXSatellaview::mmio_read, &bsxsatellaview }, { &BSXSatellaview::mmio_write, &bsxsatellaview });
-  bus.map(Bus::MapMode::Direct, 0x80, 0xbf, 0x2188, 0x219f, { &BSXSatellaview::mmio_read, &bsxsatellaview }, { &BSXSatellaview::mmio_write, &bsxsatellaview });
+void BSXBase::enable() {
+  for(uint16 i = 0x2188; i <= 0x219f; i++) memory::mmio.map(i, *this);
 }
 
-void BSXSatellaview::unload() {
-}
-
-void BSXSatellaview::power() {
+void BSXBase::power() {
   reset();
 }
 
-void BSXSatellaview::reset() {
+void BSXBase::reset() {
   memset(&regs, 0x00, sizeof regs);
 }
 
-uint8 BSXSatellaview::mmio_read(unsigned addr) {
+uint8 BSXBase::mmio_read(unsigned addr) {
   addr &= 0xffff;
 
   switch(addr) {
@@ -79,7 +75,7 @@ uint8 BSXSatellaview::mmio_read(unsigned addr) {
   return cpu.regs.mdr;
 }
 
-void BSXSatellaview::mmio_write(unsigned addr, uint8 data) {
+void BSXBase::mmio_write(unsigned addr, uint8 data) {
   addr &= 0xffff;
 
   switch(addr) {
@@ -141,3 +137,4 @@ void BSXSatellaview::mmio_write(unsigned addr, uint8 data) {
 }
 
 #endif
+

bsnes/chip/bsx/bsx_cart.cpp

@@ -0,0 +1,96 @@
+#ifdef BSX_CPP
+
+BSXCart bsxcart;
+
+void BSXCart::init() {
+}
+
+void BSXCart::enable() {
+}
+
+void BSXCart::power() {
+  reset();
+}
+
+void BSXCart::reset() {
+  for(unsigned i = 0; i < 16; i++) regs.r[i] = 0x00;
+  regs.r[0x07] = 0x80;
+  regs.r[0x08] = 0x80;
+
+  update_memory_map();
+}
+
+void BSXCart::update_memory_map() {
+  Memory &cart = (regs.r[0x01] & 0x80) == 0x00 ? (Memory&)bsxflash : (Memory&)memory::bsxpram;
+
+  if((regs.r[0x02] & 0x80) == 0x00) {
+    //LoROM mapping
+    bus.map(Bus::MapMode::Linear, 0x00, 0x7d, 0x8000, 0xffff, cart);
+    bus.map(Bus::MapMode::Linear, 0x80, 0xff, 0x8000, 0xffff, cart);
+  } else {
+    //HiROM mapping
+    bus.map(Bus::MapMode::Shadow, 0x00, 0x3f, 0x8000, 0xffff, cart);
+    bus.map(Bus::MapMode::Linear, 0x40, 0x7d, 0x0000, 0xffff, cart);
+    bus.map(Bus::MapMode::Shadow, 0x80, 0xbf, 0x8000, 0xffff, cart);
+    bus.map(Bus::MapMode::Linear, 0xc0, 0xff, 0x0000, 0xffff, cart);
+  }
+
+  if(regs.r[0x03] & 0x80) {
+    bus.map(Bus::MapMode::Linear, 0x60, 0x6f, 0x0000, 0xffff, memory::bsxpram);
+  //bus.map(Bus::MapMode::Linear, 0x70, 0x77, 0x0000, 0xffff, memory::bsxpram);
+  }
+
+  if((regs.r[0x05] & 0x80) == 0x00) {
+    bus.map(Bus::MapMode::Linear, 0x40, 0x4f, 0x0000, 0xffff, memory::bsxpram);
+  }
+
+  if((regs.r[0x06] & 0x80) == 0x00) {
+    bus.map(Bus::MapMode::Linear, 0x50, 0x5f, 0x0000, 0xffff, memory::bsxpram);
+  }
+
+  if(regs.r[0x07] & 0x80) {
+    bus.map(Bus::MapMode::Linear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
+  }
+
+  if(regs.r[0x08] & 0x80) {
+    bus.map(Bus::MapMode::Linear, 0x80, 0x9f, 0x8000, 0xffff, memory::cartrom);
+  }
+
+  bus.map(Bus::MapMode::Shadow, 0x20, 0x3f, 0x6000, 0x7fff, memory::bsxpram);
+  bus.map(Bus::MapMode::Linear, 0x70, 0x77, 0x0000, 0xffff, memory::bsxpram);
+}
+
+uint8 BSXCart::mmio_read(unsigned addr) {
+  if((addr & 0xf0ffff) == 0x005000) {  //$[00-0f]:5000 MMIO
+    uint8 n = (addr >> 16) & 15;
+    return regs.r[n];
+  }
+
+  if((addr & 0xf8f000) == 0x105000) {  //$[10-17]:[5000-5fff] SRAM
+    return memory::bsxram.read(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff));
+  }
+
+  return 0x00;
+}
+
+void BSXCart::mmio_write(unsigned addr, uint8 data) {
+  if((addr & 0xf0ffff) == 0x005000) {  //$[00-0f]:5000 MMIO
+    uint8 n = (addr >> 16) & 15;
+    regs.r[n] = data;
+    if(n == 0x0e && data & 0x80) update_memory_map();
+    return;
+  }
+
+  if((addr & 0xf8f000) == 0x105000) {  //$[10-17]:[5000-5fff] SRAM
+    return memory::bsxram.write(((addr >> 16) & 7) * 0x1000 + (addr & 0xfff), data);
+  }
+}
+
+BSXCart::BSXCart() {
+}
+
+BSXCart::~BSXCart() {
+}
+
+#endif
+

bsnes/chip/bsx/bsx_flash.cpp

@@ -2,18 +2,8 @@
 
 BSXFlash bsxflash;
 
-void BSXFlash::init() {
-}
-
-void BSXFlash::load() {
-  if(memory.size() == 0) {
-    memory.map(allocate<uint8>(1024 * 1024, 0xff), 1024 * 1024);
-  }
-}
-
-void BSXFlash::unload() {
-  memory.reset();
-}
+void BSXFlash::init() {}
+void BSXFlash::enable() {}
 
 void BSXFlash::power() {
   reset();
@@ -27,11 +17,11 @@ void BSXFlash::reset() {
   regs.flash_enable = false;
   regs.read_enable  = false;
   regs.write_enable = false;
-  memory.write_protect(!regs.write_enable);
+  memory::bsxflash.write_protect(!regs.write_enable);
 }
 
 unsigned BSXFlash::size() const {
-  return memory.size();
+  return memory::bsxflash.size();
 }
 
 uint8 BSXFlash::read(unsigned addr) {
@@ -58,7 +48,7 @@ uint8 BSXFlash::read(unsigned addr) {
     }
   }
 
-  return memory.read(addr);
+  return memory::bsxflash.read(addr);
 }
 
 void BSXFlash::write(unsigned addr, uint8 data) {
@@ -77,11 +67,11 @@ void BSXFlash::write(unsigned addr, uint8 data) {
     regs.write_new = data;
 
     if(regs.write_enable && regs.write_old == regs.write_new) {
-      return memory.write(addr, data);
+      return memory::bsxflash.write(addr, data);
     }
   } else {
     if(regs.write_enable) {
-      return memory.write(addr, data);
+      return memory::bsxflash.write(addr, data);
     }
   }
 
@@ -121,8 +111,9 @@ void BSXFlash::write(unsigned addr, uint8 data) {
       regs.write_enable = false;
     }
 
-    memory.write_protect(!regs.write_enable);
+    memory::bsxflash.write_protect(!regs.write_enable);
   }
 }
 
 #endif
+

bsnes/chip/chip.hpp

@@ -0,0 +1,17 @@
+#include "supergameboy/supergameboy.hpp"
+#include "superfx/superfx.hpp"
+#include "sa1/sa1.hpp"
+#include "bsx/bsx.hpp"
+#include "srtc/srtc.hpp"
+#include "sdd1/sdd1.hpp"
+#include "spc7110/spc7110.hpp"
+#include "cx4/cx4.hpp"
+#include "dsp1/dsp1.hpp"
+#include "dsp2/dsp2.hpp"
+#include "dsp3/dsp3.hpp"
+#include "dsp4/dsp4.hpp"
+#include "obc1/obc1.hpp"
+#include "st0010/st0010.hpp"
+#include "st0011/st0011.hpp"
+#include "st0018/st0018.hpp"
+#include "msu1/msu1.hpp"

bsnes/chip/cx4/cx4.cpp

@@ -0,0 +1,208 @@
+//=============
+//Cx4 emulation
+//=============
+//Used in Rockman X2/X3 (Megaman X2/X3)
+//Portions (c) anomie, Overload, zsKnight, Nach, byuu
+
+#include <../base.hpp>
+
+#define CX4_CPP
+namespace SNES {
+
+Cx4 cx4;
+
+#include "serialization.cpp"
+#include "data.cpp"
+#include "functions.cpp"
+#include "oam.cpp"
+#include "opcodes.cpp"
+
+void Cx4::init() {
+}
+
+void Cx4::enable() {
+}
+
+uint32 Cx4::ldr(uint8 r) {
+  uint16 addr = 0x0080 + (r * 3);
+  return (reg[addr + 0] <<  0)
+       | (reg[addr + 1] <<  8)
+       | (reg[addr + 2] << 16);
+}
+
+void Cx4::str(uint8 r, uint32 data) {
+  uint16 addr = 0x0080 + (r * 3);
+  reg[addr + 0] = (data >>  0);
+  reg[addr + 1] = (data >>  8);
+  reg[addr + 2] = (data >> 16);
+}
+
+void Cx4::mul(uint32 x, uint32 y, uint32 &rl, uint32 &rh) {
+  int64 rx = x & 0xffffff;
+  int64 ry = y & 0xffffff;
+  if(rx & 0x800000)rx |= ~0x7fffff;
+  if(ry & 0x800000)ry |= ~0x7fffff;
+
+  rx *= ry;
+
+  rl = (rx)       & 0xffffff;
+  rh = (rx >> 24) & 0xffffff;
+}
+
+uint32 Cx4::sin(uint32 rx) {
+  r0 = rx & 0x1ff;
+  if(r0 & 0x100)r0 ^= 0x1ff;
+  if(r0 & 0x080)r0 ^= 0x0ff;
+  if(rx & 0x100) {
+    return sin_table[r0 + 0x80];
+  } else {
+    return sin_table[r0];
+  }
+}
+
+uint32 Cx4::cos(uint32 rx) {
+  return sin(rx + 0x080);
+}
+
+void Cx4::immediate_reg(uint32 start) {
+  r0 = ldr(0);
+  for(uint32 i = start; i < 48; i++) {
+    if((r0 & 0x0fff) < 0x0c00) {
+      ram[r0 & 0x0fff] = immediate_data[i];
+    }
+    r0++;
+  }
+  str(0, r0);
+}
+
+void Cx4::transfer_data() {
+  uint32 src;
+  uint16 dest, count;
+
+  src   = (reg[0x40]) | (reg[0x41] << 8) | (reg[0x42] << 16);
+  count = (reg[0x43]) | (reg[0x44] << 8);
+  dest  = (reg[0x45]) | (reg[0x46] << 8);
+
+  for(uint32 i=0;i<count;i++) {
+    write(dest++, bus.read(src++));
+  }
+}
+
+void Cx4::write(unsigned addr, uint8 data) {
+  addr &= 0x1fff;
+
+  if(addr < 0x0c00) {
+    //ram
+    ram[addr] = data;
+    return;
+  }
+
+  if(addr < 0x1f00) {
+    //unmapped
+    return;
+  }
+
+  //command register
+  reg[addr & 0xff] = data;
+
+  if(addr == 0x1f47) {
+    //memory transfer
+    transfer_data();
+    return;
+  }
+
+  if(addr == 0x1f4f) {
+    //c4 command
+    if(reg[0x4d] == 0x0e && !(data & 0xc3)) {
+      //c4 test command
+      reg[0x80] = data >> 2;
+      return;
+    }
+
+    switch(data) {
+      case 0x00: op00(); break;
+      case 0x01: op01(); break;
+      case 0x05: op05(); break;
+      case 0x0d: op0d(); break;
+      case 0x10: op10(); break;
+      case 0x13: op13(); break;
+      case 0x15: op15(); break;
+      case 0x1f: op1f(); break;
+      case 0x22: op22(); break;
+      case 0x25: op25(); break;
+      case 0x2d: op2d(); break;
+      case 0x40: op40(); break;
+      case 0x54: op54(); break;
+      case 0x5c: op5c(); break;
+      case 0x5e: op5e(); break;
+      case 0x60: op60(); break;
+      case 0x62: op62(); break;
+      case 0x64: op64(); break;
+      case 0x66: op66(); break;
+      case 0x68: op68(); break;
+      case 0x6a: op6a(); break;
+      case 0x6c: op6c(); break;
+      case 0x6e: op6e(); break;
+      case 0x70: op70(); break;
+      case 0x72: op72(); break;
+      case 0x74: op74(); break;
+      case 0x76: op76(); break;
+      case 0x78: op78(); break;
+      case 0x7a: op7a(); break;
+      case 0x7c: op7c(); break;
+      case 0x89: op89(); break;
+    }
+  }
+}
+
+void Cx4::writeb(uint16 addr, uint8 data) {
+  write(addr,     data);
+}
+
+void Cx4::writew(uint16 addr, uint16 data) {
+  write(addr + 0, data >> 0);
+  write(addr + 1, data >> 8);
+}
+
+void Cx4::writel(uint16 addr, uint32 data) {
+  write(addr + 0, data >>  0);
+  write(addr + 1, data >>  8);
+  write(addr + 2, data >> 16);
+}
+
+uint8 Cx4::read(unsigned addr) {
+  addr &= 0x1fff;
+
+  if(addr < 0x0c00) {
+    return ram[addr];
+  }
+
+  if(addr >= 0x1f00) {
+    return reg[addr & 0xff];
+  }
+
+  return cpu.regs.mdr;
+}
+
+uint8 Cx4::readb(uint16 addr) {
+  return read(addr);
+}
+
+uint16 Cx4::readw(uint16 addr) {
+  return read(addr) | (read(addr + 1) << 8);
+}
+
+uint32 Cx4::readl(uint16 addr) {
+  return read(addr) | (read(addr + 1) << 8) + (read(addr + 2) << 16);
+}
+
+void Cx4::power() {
+  reset();
+}
+
+void Cx4::reset() {
+  memset(ram, 0, 0x0c00);
+  memset(reg, 0, 0x0100);
+}
+
+};

bsnes/chip/cx4/cx4.hpp

@@ -0,0 +1,95 @@
+class Cx4 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+  void serialize(serializer&);
+
+private:
+  uint8  ram[0x0c00];
+  uint8  reg[0x0100];
+  uint32 r0, r1, r2,  r3,  r4,  r5,  r6,  r7,
+         r8, r9, r10, r11, r12, r13, r14, r15;
+
+  static const uint8  immediate_data[48];
+  static const uint16 wave_data[40];
+  static const uint32 sin_table[256];
+
+  static const int16 SinTable[512];
+  static const int16 CosTable[512];
+
+  int16 C4WFXVal, C4WFYVal, C4WFZVal, C4WFX2Val, C4WFY2Val, C4WFDist, C4WFScale;
+  int16 C41FXVal, C41FYVal, C41FAngleRes, C41FDist, C41FDistVal;
+
+  void C4TransfWireFrame();
+  void C4TransfWireFrame2();
+  void C4CalcWireFrame();
+  void C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2, uint8 Color);
+  void C4DrawWireFrame();
+  void C4DoScaleRotate(int row_padding);
+
+public:
+  uint32 ldr(uint8 r);
+  void   str(uint8 r, uint32 data);
+  void   mul(uint32 x, uint32 y, uint32 &rl, uint32 &rh);
+  uint32 sin(uint32 rx);
+  uint32 cos(uint32 rx);
+
+  void   transfer_data();
+  void   immediate_reg(uint32 num);
+
+  void   op00_00();
+  void   op00_03();
+  void   op00_05();
+  void   op00_07();
+  void   op00_08();
+  void   op00_0b();
+  void   op00_0c();
+
+  void   op00();
+  void   op01();
+  void   op05();
+  void   op0d();
+  void   op10();
+  void   op13();
+  void   op15();
+  void   op1f();
+  void   op22();
+  void   op25();
+  void   op2d();
+  void   op40();
+  void   op54();
+  void   op5c();
+  void   op5e();
+  void   op60();
+  void   op62();
+  void   op64();
+  void   op66();
+  void   op68();
+  void   op6a();
+  void   op6c();
+  void   op6e();
+  void   op70();
+  void   op72();
+  void   op74();
+  void   op76();
+  void   op78();
+  void   op7a();
+  void   op7c();
+  void   op89();
+
+  uint8  readb(uint16 addr);
+  uint16 readw(uint16 addr);
+  uint32 readl(uint16 addr);
+
+  void   writeb(uint16 addr, uint8 data);
+  void   writew(uint16 addr, uint16 data);
+  void   writel(uint16 addr, uint32 data);
+};
+
+extern Cx4 cx4;

bsnes/chip/cx4/data.cpp

@@ -0,0 +1,187 @@
+#ifdef CX4_CPP
+
+const uint8 Cx4::immediate_data[48] = {
+  0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0xff,
+  0xff, 0xff, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 0x80, 0xff, 0xff, 0x7f,
+  0x00, 0x80, 0x00, 0xff, 0x7f, 0x00, 0xff, 0x7f, 0xff, 0x7f, 0xff, 0xff,
+  0x00, 0x00, 0x01, 0xff, 0xff, 0xfe, 0x00, 0x01, 0x00, 0xff, 0xfe, 0x00
+};
+
+const uint16 Cx4::wave_data[40] = {
+  0x0000, 0x0002, 0x0004, 0x0006, 0x0008, 0x000a, 0x000c, 0x000e,
+  0x0200, 0x0202, 0x0204, 0x0206, 0x0208, 0x020a, 0x020c, 0x020e,
+  0x0400, 0x0402, 0x0404, 0x0406, 0x0408, 0x040a, 0x040c, 0x040e,
+  0x0600, 0x0602, 0x0604, 0x0606, 0x0608, 0x060a, 0x060c, 0x060e,
+  0x0800, 0x0802, 0x0804, 0x0806, 0x0808, 0x080a, 0x080c, 0x080e
+};
+
+const uint32 Cx4::sin_table[256] = {
+  0x000000, 0x000324, 0x000648, 0x00096c, 0x000c8f, 0x000fb2, 0x0012d5, 0x0015f6,
+  0x001917, 0x001c37, 0x001f56, 0x002273, 0x002590, 0x0028aa, 0x002bc4, 0x002edb,
+  0x0031f1, 0x003505, 0x003817, 0x003b26, 0x003e33, 0x00413e, 0x004447, 0x00474d,
+  0x004a50, 0x004d50, 0x00504d, 0x005347, 0x00563e, 0x005931, 0x005c22, 0x005f0e,
+  0x0061f7, 0x0064dc, 0x0067bd, 0x006a9b, 0x006d74, 0x007049, 0x007319, 0x0075e5,
+  0x0078ad, 0x007b70, 0x007e2e, 0x0080e7, 0x00839c, 0x00864b, 0x0088f5, 0x008b9a,
+  0x008e39, 0x0090d3, 0x009368, 0x0095f6, 0x00987f, 0x009b02, 0x009d7f, 0x009ff6,
+  0x00a267, 0x00a4d2, 0x00a736, 0x00a994, 0x00abeb, 0x00ae3b, 0x00b085, 0x00b2c8,
+  0x00b504, 0x00b73a, 0x00b968, 0x00bb8f, 0x00bdae, 0x00bfc7, 0x00c1d8, 0x00c3e2,
+  0x00c5e4, 0x00c7de, 0x00c9d1, 0x00cbbb, 0x00cd9f, 0x00cf7a, 0x00d14d, 0x00d318,
+  0x00d4db, 0x00d695, 0x00d848, 0x00d9f2, 0x00db94, 0x00dd2d, 0x00debe, 0x00e046,
+  0x00e1c5, 0x00e33c, 0x00e4aa, 0x00e60f, 0x00e76b, 0x00e8bf, 0x00ea09, 0x00eb4b,
+  0x00ec83, 0x00edb2, 0x00eed8, 0x00eff5, 0x00f109, 0x00f213, 0x00f314, 0x00f40b,
+  0x00f4fa, 0x00f5de, 0x00f6ba, 0x00f78b, 0x00f853, 0x00f912, 0x00f9c7, 0x00fa73,
+  0x00fb14, 0x00fbac, 0x00fc3b, 0x00fcbf, 0x00fd3a, 0x00fdab, 0x00fe13, 0x00fe70,
+  0x00fec4, 0x00ff0e, 0x00ff4e, 0x00ff84, 0x00ffb1, 0x00ffd3, 0x00ffec, 0x00fffb,
+  0x000000, 0xfffcdb, 0xfff9b7, 0xfff693, 0xfff370, 0xfff04d, 0xffed2a, 0xffea09,
+  0xffe6e8, 0xffe3c8, 0xffe0a9, 0xffdd8c, 0xffda6f, 0xffd755, 0xffd43b, 0xffd124,
+  0xffce0e, 0xffcafa, 0xffc7e8, 0xffc4d9, 0xffc1cc, 0xffbec1, 0xffbbb8, 0xffb8b2,
+  0xffb5af, 0xffb2af, 0xffafb2, 0xffacb8, 0xffa9c1, 0xffa6ce, 0xffa3dd, 0xffa0f1,
+  0xff9e08, 0xff9b23, 0xff9842, 0xff9564, 0xff928b, 0xff8fb6, 0xff8ce6, 0xff8a1a,
+  0xff8752, 0xff848f, 0xff81d1, 0xff7f18, 0xff7c63, 0xff79b4, 0xff770a, 0xff7465,
+  0xff71c6, 0xff6f2c, 0xff6c97, 0xff6a09, 0xff6780, 0xff64fd, 0xff6280, 0xff6009,
+  0xff5d98, 0xff5b2d, 0xff58c9, 0xff566b, 0xff5414, 0xff51c4, 0xff4f7a, 0xff4d37,
+  0xff4afb, 0xff48c5, 0xff4697, 0xff4470, 0xff4251, 0xff4038, 0xff3e27, 0xff3c1e,
+  0xff3a1b, 0xff3821, 0xff362e, 0xff3444, 0xff3260, 0xff3085, 0xff2eb2, 0xff2ce7,
+  0xff2b24, 0xff296a, 0xff27b7, 0xff260d, 0xff246b, 0xff22d2, 0xff2141, 0xff1fb9,
+  0xff1e3a, 0xff1cc3, 0xff1b55, 0xff19f0, 0xff1894, 0xff1740, 0xff15f6, 0xff14b4,
+  0xff137c, 0xff124d, 0xff1127, 0xff100a, 0xff0ef6, 0xff0dec, 0xff0ceb, 0xff0bf4,
+  0xff0b05, 0xff0a21, 0xff0945, 0xff0874, 0xff07ac, 0xff06ed, 0xff0638, 0xff058d,
+  0xff04eb, 0xff0453, 0xff03c4, 0xff0340, 0xff02c5, 0xff0254, 0xff01ec, 0xff018f,
+  0xff013b, 0xff00f1, 0xff00b1, 0xff007b, 0xff004e, 0xff002c, 0xff0013, 0xff0004
+};
+
+const int16 Cx4::SinTable[512] = {
+       0,    402,    804,   1206,   1607,   2009,   2410,   2811,
+    3211,   3611,   4011,   4409,   4808,   5205,   5602,   5997,
+    6392,   6786,   7179,   7571,   7961,   8351,   8739,   9126,
+    9512,   9896,  10278,  10659,  11039,  11416,  11793,  12167,
+   12539,  12910,  13278,  13645,  14010,  14372,  14732,  15090,
+   15446,  15800,  16151,  16499,  16846,  17189,  17530,  17869,
+   18204,  18537,  18868,  19195,  19519,  19841,  20159,  20475,
+   20787,  21097,  21403,  21706,  22005,  22301,  22594,  22884,
+   23170,  23453,  23732,  24007,  24279,  24547,  24812,  25073,
+   25330,  25583,  25832,  26077,  26319,  26557,  26790,  27020,
+   27245,  27466,  27684,  27897,  28106,  28310,  28511,  28707,
+   28898,  29086,  29269,  29447,  29621,  29791,  29956,  30117,
+   30273,  30425,  30572,  30714,  30852,  30985,  31114,  31237,
+   31357,  31471,  31581,  31685,  31785,  31881,  31971,  32057,
+   32138,  32214,  32285,  32351,  32413,  32469,  32521,  32568,
+   32610,  32647,  32679,  32706,  32728,  32745,  32758,  32765,
+   32767,  32765,  32758,  32745,  32728,  32706,  32679,  32647,
+   32610,  32568,  32521,  32469,  32413,  32351,  32285,  32214,
+   32138,  32057,  31971,  31881,  31785,  31685,  31581,  31471,
+   31357,  31237,  31114,  30985,  30852,  30714,  30572,  30425,
+   30273,  30117,  29956,  29791,  29621,  29447,  29269,  29086,
+   28898,  28707,  28511,  28310,  28106,  27897,  27684,  27466,
+   27245,  27020,  26790,  26557,  26319,  26077,  25832,  25583,
+   25330,  25073,  24812,  24547,  24279,  24007,  23732,  23453,
+   23170,  22884,  22594,  22301,  22005,  21706,  21403,  21097,
+   20787,  20475,  20159,  19841,  19519,  19195,  18868,  18537,
+   18204,  17869,  17530,  17189,  16846,  16499,  16151,  15800,
+   15446,  15090,  14732,  14372,  14010,  13645,  13278,  12910,
+   12539,  12167,  11793,  11416,  11039,  10659,  10278,   9896,
+    9512,   9126,   8739,   8351,   7961,   7571,   7179,   6786,
+    6392,   5997,   5602,   5205,   4808,   4409,   4011,   3611,
+    3211,   2811,   2410,   2009,   1607,   1206,    804,    402,
+       0,   -402,   -804,  -1206,  -1607,  -2009,  -2410,  -2811,
+   -3211,  -3611,  -4011,  -4409,  -4808,  -5205,  -5602,  -5997,
+   -6392,  -6786,  -7179,  -7571,  -7961,  -8351,  -8739,  -9126,
+   -9512,  -9896, -10278, -10659, -11039, -11416, -11793, -12167,
+  -12539, -12910, -13278, -13645, -14010, -14372, -14732, -15090,
+  -15446, -15800, -16151, -16499, -16846, -17189, -17530, -17869,
+  -18204, -18537, -18868, -19195, -19519, -19841, -20159, -20475,
+  -20787, -21097, -21403, -21706, -22005, -22301, -22594, -22884,
+  -23170, -23453, -23732, -24007, -24279, -24547, -24812, -25073,
+  -25330, -25583, -25832, -26077, -26319, -26557, -26790, -27020,
+  -27245, -27466, -27684, -27897, -28106, -28310, -28511, -28707,
+  -28898, -29086, -29269, -29447, -29621, -29791, -29956, -30117,
+  -30273, -30425, -30572, -30714, -30852, -30985, -31114, -31237,
+  -31357, -31471, -31581, -31685, -31785, -31881, -31971, -32057,
+  -32138, -32214, -32285, -32351, -32413, -32469, -32521, -32568,
+  -32610, -32647, -32679, -32706, -32728, -32745, -32758, -32765,
+  -32767, -32765, -32758, -32745, -32728, -32706, -32679, -32647,
+  -32610, -32568, -32521, -32469, -32413, -32351, -32285, -32214,
+  -32138, -32057, -31971, -31881, -31785, -31685, -31581, -31471,
+  -31357, -31237, -31114, -30985, -30852, -30714, -30572, -30425,
+  -30273, -30117, -29956, -29791, -29621, -29447, -29269, -29086,
+  -28898, -28707, -28511, -28310, -28106, -27897, -27684, -27466,
+  -27245, -27020, -26790, -26557, -26319, -26077, -25832, -25583,
+  -25330, -25073, -24812, -24547, -24279, -24007, -23732, -23453,
+  -23170, -22884, -22594, -22301, -22005, -21706, -21403, -21097,
+  -20787, -20475, -20159, -19841, -19519, -19195, -18868, -18537,
+  -18204, -17869, -17530, -17189, -16846, -16499, -16151, -15800,
+  -15446, -15090, -14732, -14372, -14010, -13645, -13278, -12910,
+  -12539, -12167, -11793, -11416, -11039, -10659, -10278,  -9896,
+   -9512,  -9126,  -8739,  -8351,  -7961,  -7571,  -7179,  -6786,
+   -6392,  -5997,  -5602,  -5205,  -4808,  -4409,  -4011,  -3611,
+   -3211,  -2811,  -2410,  -2009,  -1607,  -1206,   -804,   -402
+};
+
+const int16 Cx4::CosTable[512] = {
+   32767,  32765,  32758,  32745,  32728,  32706,  32679,  32647,
+   32610,  32568,  32521,  32469,  32413,  32351,  32285,  32214,
+   32138,  32057,  31971,  31881,  31785,  31685,  31581,  31471,
+   31357,  31237,  31114,  30985,  30852,  30714,  30572,  30425,
+   30273,  30117,  29956,  29791,  29621,  29447,  29269,  29086,
+   28898,  28707,  28511,  28310,  28106,  27897,  27684,  27466,
+   27245,  27020,  26790,  26557,  26319,  26077,  25832,  25583,
+   25330,  25073,  24812,  24547,  24279,  24007,  23732,  23453,
+   23170,  22884,  22594,  22301,  22005,  21706,  21403,  21097,
+   20787,  20475,  20159,  19841,  19519,  19195,  18868,  18537,
+   18204,  17869,  17530,  17189,  16846,  16499,  16151,  15800,
+   15446,  15090,  14732,  14372,  14010,  13645,  13278,  12910,
+   12539,  12167,  11793,  11416,  11039,  10659,  10278,   9896,
+    9512,   9126,   8739,   8351,   7961,   7571,   7179,   6786,
+    6392,   5997,   5602,   5205,   4808,   4409,   4011,   3611,
+    3211,   2811,   2410,   2009,   1607,   1206,    804,    402,
+       0,   -402,   -804,  -1206,  -1607,  -2009,  -2410,  -2811,
+   -3211,  -3611,  -4011,  -4409,  -4808,  -5205,  -5602,  -5997,
+   -6392,  -6786,  -7179,  -7571,  -7961,  -8351,  -8739,  -9126,
+   -9512,  -9896, -10278, -10659, -11039, -11416, -11793, -12167,
+  -12539, -12910, -13278, -13645, -14010, -14372, -14732, -15090,
+  -15446, -15800, -16151, -16499, -16846, -17189, -17530, -17869,
+  -18204, -18537, -18868, -19195, -19519, -19841, -20159, -20475,
+  -20787, -21097, -21403, -21706, -22005, -22301, -22594, -22884,
+  -23170, -23453, -23732, -24007, -24279, -24547, -24812, -25073,
+  -25330, -25583, -25832, -26077, -26319, -26557, -26790, -27020,
+  -27245, -27466, -27684, -27897, -28106, -28310, -28511, -28707,
+  -28898, -29086, -29269, -29447, -29621, -29791, -29956, -30117,
+  -30273, -30425, -30572, -30714, -30852, -30985, -31114, -31237,
+  -31357, -31471, -31581, -31685, -31785, -31881, -31971, -32057,
+  -32138, -32214, -32285, -32351, -32413, -32469, -32521, -32568,
+  -32610, -32647, -32679, -32706, -32728, -32745, -32758, -32765,
+  -32767, -32765, -32758, -32745, -32728, -32706, -32679, -32647,
+  -32610, -32568, -32521, -32469, -32413, -32351, -32285, -32214,
+  -32138, -32057, -31971, -31881, -31785, -31685, -31581, -31471,
+  -31357, -31237, -31114, -30985, -30852, -30714, -30572, -30425,
+  -30273, -30117, -29956, -29791, -29621, -29447, -29269, -29086,
+  -28898, -28707, -28511, -28310, -28106, -27897, -27684, -27466,
+  -27245, -27020, -26790, -26557, -26319, -26077, -25832, -25583,
+  -25330, -25073, -24812, -24547, -24279, -24007, -23732, -23453,
+  -23170, -22884, -22594, -22301, -22005, -21706, -21403, -21097,
+  -20787, -20475, -20159, -19841, -19519, -19195, -18868, -18537,
+  -18204, -17869, -17530, -17189, -16846, -16499, -16151, -15800,
+  -15446, -15090, -14732, -14372, -14010, -13645, -13278, -12910,
+  -12539, -12167, -11793, -11416, -11039, -10659, -10278,  -9896,
+   -9512,  -9126,  -8739,  -8351,  -7961,  -7571,  -7179,  -6786,
+   -6392,  -5997,  -5602,  -5205,  -4808,  -4409,  -4011,  -3611,
+   -3211,  -2811,  -2410,  -2009,  -1607,  -1206,   -804,   -402,
+       0,    402,    804,   1206,   1607,   2009,   2410,   2811,
+    3211,   3611,   4011,   4409,   4808,   5205,   5602,   5997,
+    6392,   6786,   7179,   7571,   7961,   8351,   8739,   9126,
+    9512,   9896,  10278,  10659,  11039,  11416,  11793,  12167,
+   12539,  12910,  13278,  13645,  14010,  14372,  14732,  15090,
+   15446,  15800,  16151,  16499,  16846,  17189,  17530,  17869,
+   18204,  18537,  18868,  19195,  19519,  19841,  20159,  20475,
+   20787,  21097,  21403,  21706,  22005,  22301,  22594,  22884,
+   23170,  23453,  23732,  24007,  24279,  24547,  24812,  25073,
+   25330,  25583,  25832,  26077,  26319,  26557,  26790,  27020,
+   27245,  27466,  27684,  27897,  28106,  28310,  28511,  28707,
+   28898,  29086,  29269,  29447,  29621,  29791,  29956,  30117,
+   30273,  30425,  30572,  30714,  30852,  30985,  31114,  31237,
+   31357,  31471,  31581,  31685,  31785,  31881,  31971,  32057,
+   32138,  32214,  32285,  32351,  32413,  32469,  32521,  32568,
+   32610,  32647,  32679,  32706,  32728,  32745,  32758,  32765
+};
+
+#endif

bsnes/chip/cx4/functions.cpp

@@ -0,0 +1,251 @@
+#ifdef CX4_CPP
+
+#include <math.h>
+#define Tan(a) (CosTable[a] ? ((((int32)SinTable[a]) << 16) / CosTable[a]) : 0x80000000)
+#define sar(b, n) ((b) >> (n))
+#ifdef PI
+#undef PI
+#endif
+#define PI 3.1415926535897932384626433832795
+
+//Wireframe Helpers
+void Cx4::C4TransfWireFrame() {
+  double c4x = (double)C4WFXVal;
+  double c4y = (double)C4WFYVal;
+  double c4z = (double)C4WFZVal - 0x95;
+  double tanval, c4x2, c4y2, c4z2;
+
+  //Rotate X
+  tanval = -(double)C4WFX2Val * PI * 2 / 128;
+  c4y2   = c4y * ::cos(tanval) - c4z * ::sin(tanval);
+  c4z2   = c4y * ::sin(tanval) + c4z * ::cos(tanval);
+
+  //Rotate Y
+  tanval = -(double)C4WFY2Val * PI * 2 / 128;
+  c4x2   = c4x * ::cos(tanval)  + c4z2 * ::sin(tanval);
+  c4z    = c4x * -::sin(tanval) + c4z2 * ::cos(tanval);
+
+  //Rotate Z
+  tanval = -(double)C4WFDist * PI * 2 / 128;
+  c4x    = c4x2 * ::cos(tanval) - c4y2 * ::sin(tanval);
+  c4y    = c4x2 * ::sin(tanval) + c4y2 * ::cos(tanval);
+
+  //Scale
+  C4WFXVal = (int16)(c4x * C4WFScale / (0x90 * (c4z + 0x95)) * 0x95);
+  C4WFYVal = (int16)(c4y * C4WFScale / (0x90 * (c4z + 0x95)) * 0x95);
+}
+
+void Cx4::C4CalcWireFrame() {
+  C4WFXVal = C4WFX2Val - C4WFXVal;
+  C4WFYVal = C4WFY2Val - C4WFYVal;
+
+  if(abs(C4WFXVal) > abs(C4WFYVal)) {
+    C4WFDist = abs(C4WFXVal) + 1;
+    C4WFYVal = (256 * (long)C4WFYVal) / abs(C4WFXVal);
+    C4WFXVal = (C4WFXVal < 0) ? -256 : 256;
+  } else if(C4WFYVal != 0) {
+    C4WFDist = abs(C4WFYVal) + 1;
+    C4WFXVal = (256 * (long)C4WFXVal) / abs(C4WFYVal);
+    C4WFYVal = (C4WFYVal < 0) ? -256 : 256;
+  } else {
+    C4WFDist = 0;
+  }
+}
+
+void Cx4::C4TransfWireFrame2() {
+  double c4x = (double)C4WFXVal;
+  double c4y = (double)C4WFYVal;
+  double c4z = (double)C4WFZVal;
+  double tanval, c4x2, c4y2, c4z2;
+
+  //Rotate X
+  tanval = -(double)C4WFX2Val * PI * 2 / 128;
+  c4y2   = c4y * ::cos(tanval) - c4z * ::sin(tanval);
+  c4z2   = c4y * ::sin(tanval) + c4z * ::cos(tanval);
+
+  //Rotate Y
+  tanval = -(double)C4WFY2Val * PI * 2 / 128;
+  c4x2   = c4x * ::cos(tanval)  + c4z2 * ::sin(tanval);
+  c4z    = c4x * -::sin(tanval) + c4z2 * ::cos(tanval);
+
+  //Rotate Z
+  tanval = -(double)C4WFDist * PI * 2 / 128;
+  c4x    = c4x2 * ::cos(tanval) - c4y2 * ::sin(tanval);
+  c4y    = c4x2 * ::sin(tanval) + c4y2 * ::cos(tanval);
+
+  //Scale
+  C4WFXVal = (int16)(c4x * C4WFScale / 0x100);
+  C4WFYVal = (int16)(c4y * C4WFScale / 0x100);
+}
+
+void Cx4::C4DrawWireFrame() {
+  uint32 line = readl(0x1f80);
+  uint32 point1, point2;
+  int16 X1, Y1, Z1;
+  int16 X2, Y2, Z2;
+  uint8 Color;
+
+  for(int32 i = ram[0x0295]; i > 0; i--, line += 5) {
+    if(bus.read(line) == 0xff && bus.read(line + 1) == 0xff) {
+      int32 tmp = line - 5;
+      while(bus.read(tmp + 2) == 0xff && bus.read(tmp + 3) == 0xff && (tmp + 2) >= 0) { tmp -= 5; }
+      point1 = (read(0x1f82) << 16) | (bus.read(tmp + 2) << 8) | bus.read(tmp + 3);
+    } else {
+      point1 = (read(0x1f82) << 16) | (bus.read(line) << 8) | bus.read(line + 1);
+    }
+    point2 = (read(0x1f82) << 16) | (bus.read(line + 2) << 8) | bus.read(line + 3);
+
+    X1=(bus.read(point1 + 0) << 8) | bus.read(point1 + 1);
+    Y1=(bus.read(point1 + 2) << 8) | bus.read(point1 + 3);
+    Z1=(bus.read(point1 + 4) << 8) | bus.read(point1 + 5);
+    X2=(bus.read(point2 + 0) << 8) | bus.read(point2 + 1);
+    Y2=(bus.read(point2 + 2) << 8) | bus.read(point2 + 3);
+    Z2=(bus.read(point2 + 4) << 8) | bus.read(point2 + 5);
+    Color = bus.read(line + 4);
+    C4DrawLine(X1, Y1, Z1, X2, Y2, Z2, Color);
+  }
+}
+
+void Cx4::C4DrawLine(int32 X1, int32 Y1, int16 Z1, int32 X2, int32 Y2, int16 Z2, uint8 Color) {
+  //Transform coordinates
+  C4WFXVal  = (int16)X1;
+  C4WFYVal  = (int16)Y1;
+  C4WFZVal  = Z1;
+  C4WFScale = read(0x1f90);
+  C4WFX2Val = read(0x1f86);
+  C4WFY2Val = read(0x1f87);
+  C4WFDist  = read(0x1f88);
+  C4TransfWireFrame2();
+  X1 = (C4WFXVal + 48) << 8;
+  Y1 = (C4WFYVal + 48) << 8;
+
+  C4WFXVal = (int16)X2;
+  C4WFYVal = (int16)Y2;
+  C4WFZVal = Z2;
+  C4TransfWireFrame2();
+  X2 = (C4WFXVal + 48) << 8;
+  Y2 = (C4WFYVal + 48) << 8;
+
+  //Get line info
+  C4WFXVal  = (int16)(X1 >> 8);
+  C4WFYVal  = (int16)(Y1 >> 8);
+  C4WFX2Val = (int16)(X2 >> 8);
+  C4WFY2Val = (int16)(Y2 >> 8);
+  C4CalcWireFrame();
+  X2 = (int16)C4WFXVal;
+  Y2 = (int16)C4WFYVal;
+
+  //Render line
+  for(int32 i = C4WFDist ? C4WFDist : 1; i > 0; i--) {
+    if(X1 > 0xff && Y1 > 0xff && X1 < 0x6000 && Y1 < 0x6000) {
+      uint16 addr = (((Y1 >> 8) >> 3) << 8) - (((Y1 >> 8) >> 3) << 6) + (((X1 >> 8) >> 3) << 4) + ((Y1 >> 8) & 7) * 2;
+      uint8 bit = 0x80 >> ((X1 >> 8) & 7);
+      ram[addr + 0x300] &= ~bit;
+      ram[addr + 0x301] &= ~bit;
+      if(Color & 1) ram[addr + 0x300] |= bit;
+      if(Color & 2) ram[addr + 0x301] |= bit;
+    }
+    X1 += X2;
+    Y1 += Y2;
+  }
+}
+
+void Cx4::C4DoScaleRotate(int row_padding) {
+  int16 A, B, C, D;
+
+  //Calculate matrix
+  int32 XScale = readw(0x1f8f);
+  int32 YScale = readw(0x1f92);
+
+  if(XScale & 0x8000)XScale = 0x7fff;
+  if(YScale & 0x8000)YScale = 0x7fff;
+
+  if(readw(0x1f80) == 0) {  //no rotation
+    A = (int16)XScale;
+    B = 0;
+    C = 0;
+    D = (int16)YScale;
+  } else if(readw(0x1f80) == 128) {  //90 degree rotation
+    A = 0;
+    B = (int16)(-YScale);
+    C = (int16)XScale;
+    D = 0;
+  } else if(readw(0x1f80) == 256) {  //180 degree rotation
+    A = (int16)(-XScale);
+    B = 0;
+    C = 0;
+    D = (int16)(-YScale);
+  } else if(readw(0x1f80) == 384) {  //270 degree rotation
+    A = 0;
+    B = (int16)YScale;
+    C = (int16)(-XScale);
+    D = 0;
+  } else {
+    A = (int16)  sar(CosTable[readw(0x1f80) & 0x1ff] * XScale, 15);
+    B = (int16)(-sar(SinTable[readw(0x1f80) & 0x1ff] * YScale, 15));
+    C = (int16)  sar(SinTable[readw(0x1f80) & 0x1ff] * XScale, 15);
+    D = (int16)  sar(CosTable[readw(0x1f80) & 0x1ff] * YScale, 15);
+  }
+
+  //Calculate Pixel Resolution
+  uint8 w = read(0x1f89) & ~7;
+  uint8 h = read(0x1f8c) & ~7;
+
+  //Clear the output RAM
+  memset(ram, 0, (w + row_padding / 4) * h / 2);
+
+  int32 Cx = (int16)readw(0x1f83);
+  int32 Cy = (int16)readw(0x1f86);
+
+  //Calculate start position (i.e. (Ox, Oy) = (0, 0))
+  //The low 12 bits are fractional, so (Cx<<12) gives us the Cx we want in
+  //the function. We do Cx*A etc normally because the matrix parameters
+  //already have the fractional parts.
+  int32 LineX = (Cx << 12) - Cx * A - Cx * B;
+  int32 LineY = (Cy << 12) - Cy * C - Cy * D;
+
+  //Start loop
+  uint32 X, Y;
+  uint8 byte;
+  int32 outidx = 0;
+  uint8 bit    = 0x80;
+
+  for(int32 y = 0; y < h; y++) {
+    X = LineX;
+    Y = LineY;
+    for(int32 x = 0; x < w; x++) {
+      if((X >> 12) >= w || (Y >> 12) >= h) {
+        byte = 0;
+      } else {
+        uint32 addr = (Y >> 12) * w + (X >> 12);
+        byte = read(0x600 + (addr >> 1));
+        if(addr & 1) { byte >>= 4; }
+      }
+
+      //De-bitplanify
+      if(byte & 1) ram[outidx     ] |= bit;
+      if(byte & 2) ram[outidx +  1] |= bit;
+      if(byte & 4) ram[outidx + 16] |= bit;
+      if(byte & 8) ram[outidx + 17] |= bit;
+
+      bit >>= 1;
+      if(!bit) {
+        bit     = 0x80;
+        outidx += 32;
+      }
+
+      X += A;  //Add 1 to output x => add an A and a C
+      Y += C;
+    }
+    outidx += 2 + row_padding;
+    if(outidx & 0x10) {
+      outidx &= ~0x10;
+    } else {
+      outidx -= w * 4 + row_padding;
+    }
+    LineX += B;  //Add 1 to output y => add a B and a D
+    LineY += D;
+  }
+}
+
+#endif

bsnes/chip/cx4/oam.cpp

@@ -0,0 +1,228 @@
+#ifdef CX4_CPP
+
+//Build OAM
+void Cx4::op00_00() {
+  uint32 oamptr = ram[0x626] << 2;
+  for(int32 i = 0x1fd; i > oamptr && i >= 0; i -= 4) {
+    //clear oam-to-be
+    if(i >= 0) ram[i] = 0xe0;
+  }
+
+  uint16 globalx, globaly;
+  uint32 oamptr2;
+  int16  sprx, spry;
+  uint8  sprname, sprattr;
+  uint8  sprcount;
+
+  globalx = readw(0x621);
+  globaly = readw(0x623);
+  oamptr2 = 0x200 + (ram[0x626] >> 2);
+
+  if(!ram[0x620]) return;
+
+  sprcount = 128 - ram[0x626];
+  uint8 offset = (ram[0x626] & 3) * 2;
+  uint32 srcptr = 0x220;
+
+  for(int i = ram[0x620]; i > 0 && sprcount > 0; i--, srcptr += 16) {
+    sprx = readw(srcptr)     - globalx;
+    spry = readw(srcptr + 2) - globaly;
+    sprname = ram[srcptr + 5];
+    sprattr = ram[srcptr + 4] | ram[srcptr + 6];
+
+    uint32 spraddr = readl(srcptr + 7);
+    if(bus.read(spraddr)) {
+      int16 x, y;
+      for(int sprcnt = bus.read(spraddr++); sprcnt > 0 && sprcount > 0; sprcnt--, spraddr += 4) {
+        x = (int8)bus.read(spraddr + 1);
+        if(sprattr & 0x40) {
+          x = -x - ((bus.read(spraddr) & 0x20) ? 16 : 8);
+        }
+        x += sprx;
+        if(x >= -16 && x <= 272) {
+          y = (int8)bus.read(spraddr + 2);
+          if(sprattr & 0x80) {
+            y = -y - ((bus.read(spraddr) & 0x20) ? 16 : 8);
+          }
+          y += spry;
+          if(y >= -16 && y <= 224) {
+            ram[oamptr    ] = (uint8)x;
+            ram[oamptr + 1] = (uint8)y;
+            ram[oamptr + 2] = sprname + bus.read(spraddr + 3);
+            ram[oamptr + 3] = sprattr ^ (bus.read(spraddr) & 0xc0);
+            ram[oamptr2] &= ~(3 << offset);
+            if(x & 0x100) ram[oamptr2] |= 1 << offset;
+            if(bus.read(spraddr) & 0x20) ram[oamptr2] |= 2 << offset;
+            oamptr += 4;
+            sprcount--;
+            offset = (offset + 2) & 6;
+            if(!offset)oamptr2++;
+          }
+        }
+      }
+    } else if(sprcount > 0) {
+      ram[oamptr    ] = (uint8)sprx;
+      ram[oamptr + 1] = (uint8)spry;
+      ram[oamptr + 2] = sprname;
+      ram[oamptr + 3] = sprattr;
+      ram[oamptr2] &= ~(3 << offset);
+      if(sprx & 0x100) ram[oamptr2] |= 3 << offset;
+      else ram[oamptr2] |= 2 << offset;
+      oamptr += 4;
+      sprcount--;
+      offset = (offset + 2) & 6;
+      if(!offset) oamptr2++;
+    }
+  }
+}
+
+//Scale and Rotate
+void Cx4::op00_03() {
+  C4DoScaleRotate(0);
+}
+
+//Transform Lines
+void Cx4::op00_05() {
+  C4WFX2Val = read(0x1f83);
+  C4WFY2Val = read(0x1f86);
+  C4WFDist  = read(0x1f89);
+  C4WFScale = read(0x1f8c);
+
+//Transform Vertices
+uint32 ptr = 0;
+  for(int32 i = readw(0x1f80); i > 0; i--, ptr += 0x10) {
+    C4WFXVal = readw(ptr + 1);
+    C4WFYVal = readw(ptr + 5);
+    C4WFZVal = readw(ptr + 9);
+    C4TransfWireFrame();
+
+    //Displace
+    writew(ptr + 1, C4WFXVal + 0x80);
+    writew(ptr + 5, C4WFYVal + 0x50);
+  }
+
+  writew(0x600,     23);
+  writew(0x602,     0x60);
+  writew(0x605,     0x40);
+  writew(0x600 + 8, 23);
+  writew(0x602 + 8, 0x60);
+  writew(0x605 + 8, 0x40);
+
+  ptr = 0xb02;
+  uint32 ptr2 = 0;
+
+  for(int32 i = readw(0xb00); i > 0; i--, ptr += 2, ptr2 += 8) {
+    C4WFXVal  = readw((read(ptr + 0) << 4) + 1);
+    C4WFYVal  = readw((read(ptr + 0) << 4) + 5);
+    C4WFX2Val = readw((read(ptr + 1) << 4) + 1);
+    C4WFY2Val = readw((read(ptr + 1) << 4) + 5);
+    C4CalcWireFrame();
+    writew(ptr2 + 0x600, C4WFDist ? C4WFDist : 1);
+    writew(ptr2 + 0x602, C4WFXVal);
+    writew(ptr2 + 0x605, C4WFYVal);
+  }
+}
+
+//Scale and Rotate
+void Cx4::op00_07() {
+  C4DoScaleRotate(64);
+}
+
+//Draw Wireframe
+void Cx4::op00_08() {
+  C4DrawWireFrame();
+}
+
+//Disintegrate
+void Cx4::op00_0b() {
+  uint8  width, height;
+  uint32 startx, starty;
+  uint32 srcptr;
+  uint32 x, y;
+  int32  scalex, scaley;
+  int32  cx, cy;
+  int32  i, j;
+
+  width  = read(0x1f89);
+  height = read(0x1f8c);
+  cx     = readw(0x1f80);
+  cy     = readw(0x1f83);
+
+  scalex = (int16)readw(0x1f86);
+  scaley = (int16)readw(0x1f8f);
+  startx = -cx * scalex + (cx << 8);
+  starty = -cy * scaley + (cy << 8);
+  srcptr = 0x600;
+
+  for(i = 0; i < (width * height) >> 1; i++) {
+    write(i, 0);
+  }
+
+  for(y = starty, i = 0;i < height; i++, y += scaley) {
+    for(x = startx, j = 0;j < width; j++, x += scalex) {
+      if((x >> 8) < width && (y >> 8) < height && (y >> 8) * width + (x >> 8) < 0x2000) {
+        uint8 pixel = (j & 1) ? (ram[srcptr] >> 4) : (ram[srcptr]);
+        int32 index = (y >> 11) * width * 4 + (x >> 11) * 32 + ((y >> 8) & 7) * 2;
+        uint8 mask = 0x80 >> ((x >> 8) & 7);
+
+        if(pixel & 1) ram[index     ] |= mask;
+        if(pixel & 2) ram[index +  1] |= mask;
+        if(pixel & 4) ram[index + 16] |= mask;
+        if(pixel & 8) ram[index + 17] |= mask;
+      }
+      if(j & 1) srcptr++;
+    }
+  }
+}
+
+//Bitplane Wave
+void Cx4::op00_0c() {
+  uint32 destptr = 0;
+  uint32 waveptr = read(0x1f83);
+  uint16 mask1   = 0xc0c0;
+  uint16 mask2   = 0x3f3f;
+
+  for(int j = 0; j < 0x10; j++) {
+    do {
+      int16 height = -((int8)read(waveptr + 0xb00)) - 16;
+      for(int i = 0; i < 40; i++) {
+        uint16 temp = readw(destptr + wave_data[i]) & mask2;
+        if(height >= 0) {
+          if(height < 8) {
+            temp |= mask1 & readw(0xa00 + height * 2);
+          } else {
+            temp |= mask1 & 0xff00;
+          }
+        }
+        writew(destptr + wave_data[i], temp);
+        height++;
+      }
+      waveptr = (waveptr + 1) & 0x7f;
+      mask1   = (mask1 >> 2) | (mask1 << 6);
+      mask2   = (mask2 >> 2) | (mask2 << 6);
+    } while(mask1 != 0xc0c0);
+    destptr += 16;
+
+    do {
+      int16 height = -((int8)read(waveptr + 0xb00)) - 16;
+      for(int i = 0; i < 40; i++) {
+        uint16 temp = readw(destptr + wave_data[i]) & mask2;
+        if(height >= 0) {
+          if(height < 8) {
+            temp |= mask1 & readw(0xa10 + height * 2);
+          } else {
+            temp |= mask1 & 0xff00;
+          }
+        }
+        writew(destptr + wave_data[i], temp);
+        height++;
+      }
+      waveptr = (waveptr + 1) & 0x7f;
+      mask1   = (mask1 >> 2) | (mask1 << 6);
+      mask2   = (mask2 >> 2) | (mask2 << 6);
+    } while(mask1 != 0xc0c0);
+    destptr += 16;
+  }
+}
+
+#endif

bsnes/chip/cx4/opcodes.cpp

@@ -0,0 +1,227 @@
+#ifdef CX4_CPP
+
+//Sprite Functions
+void Cx4::op00() {
+  switch(reg[0x4d]) {
+    case 0x00: op00_00(); break;
+    case 0x03: op00_03(); break;
+    case 0x05: op00_05(); break;
+    case 0x07: op00_07(); break;
+    case 0x08: op00_08(); break;
+    case 0x0b: op00_0b(); break;
+    case 0x0c: op00_0c(); break;
+  }
+}
+
+//Draw Wireframe
+void Cx4::op01() {
+  memset(ram + 0x300, 0, 2304);
+  C4DrawWireFrame();
+}
+
+//Propulsion
+void Cx4::op05() {
+  int32 temp = 0x10000;
+  if(readw(0x1f83)) {
+    temp = sar((temp / readw(0x1f83)) * readw(0x1f81), 8);
+  }
+  writew(0x1f80, temp);
+}
+
+//Set Vector length
+void Cx4::op0d() {
+  C41FXVal    = readw(0x1f80);
+  C41FYVal    = readw(0x1f83);
+  C41FDistVal = readw(0x1f86);
+  double tanval = sqrt(((double)C41FYVal) * ((double)C41FYVal) + ((double)C41FXVal) * ((double)C41FXVal));
+  tanval = (double)C41FDistVal / tanval;
+  C41FYVal = (int16)(((double)C41FYVal * tanval) * 0.99);
+  C41FXVal = (int16)(((double)C41FXVal * tanval) * 0.98);
+  writew(0x1f89, C41FXVal);
+  writew(0x1f8c, C41FYVal);
+}
+
+//Triangle
+void Cx4::op10() {
+  r0 = ldr(0);
+  r1 = ldr(1);
+
+  r4 = r0 & 0x1ff;
+  if(r1 & 0x8000)r1 |= ~0x7fff;
+
+  mul(cos(r4), r1, r5, r2);
+  r5 = (r5 >> 16) & 0xff;
+  r2 = (r2 << 8) + r5;
+
+  mul(sin(r4), r1, r5, r3);
+  r5 = (r5 >> 16) & 0xff;
+  r3 = (r3 << 8) + r5;
+
+  str(0, r0);
+  str(1, r1);
+  str(2, r2);
+  str(3, r3);
+  str(4, r4);
+  str(5, r5);
+}
+
+//Triangle
+void Cx4::op13() {
+  r0 = ldr(0);
+  r1 = ldr(1);
+
+  r4 = r0 & 0x1ff;
+
+  mul(cos(r4), r1, r5, r2);
+  r5 = (r5 >> 8) & 0xffff;
+  r2 = (r2 << 16) + r5;
+
+  mul(sin(r4), r1, r5, r3);
+  r5 = (r5 >> 8) & 0xffff;
+  r3 = (r3 << 16) + r5;
+
+  str(0, r0);
+  str(1, r1);
+  str(2, r2);
+  str(3, r3);
+  str(4, r4);
+  str(5, r5);
+}
+
+//Pythagorean
+void Cx4::op15() {
+  C41FXVal = readw(0x1f80);
+  C41FYVal = readw(0x1f83);
+  C41FDist = (int16)sqrt((double)C41FXVal * (double)C41FXVal + (double)C41FYVal * (double)C41FYVal);
+  writew(0x1f80, C41FDist);
+}
+
+//Calculate distance
+void Cx4::op1f() {
+  C41FXVal = readw(0x1f80);
+  C41FYVal = readw(0x1f83);
+  if(!C41FXVal) {
+    C41FAngleRes = (C41FYVal > 0) ? 0x080 : 0x180;
+  } else {
+    double tanval = ((double)C41FYVal) / ((double)C41FXVal);
+    C41FAngleRes = (short)(atan(tanval) / (PI * 2) * 512);
+    C41FAngleRes = C41FAngleRes;
+    if(C41FXVal < 0) {
+      C41FAngleRes += 0x100;
+    }
+    C41FAngleRes &= 0x1ff;
+  }
+  writew(0x1f86, C41FAngleRes);
+}
+
+//Trapezoid
+void Cx4::op22() {
+  int16 angle1 = readw(0x1f8c) & 0x1ff;
+  int16 angle2 = readw(0x1f8f) & 0x1ff;
+  int32 tan1 = Tan(angle1);
+  int32 tan2 = Tan(angle2);
+  int16 y = readw(0x1f83) - readw(0x1f89);
+  int16 left, right;
+
+  for(int32 j = 0; j < 225; j++, y++) {
+    if(y >= 0) {
+      left  = sar((int32)tan1 * y, 16) - readw(0x1f80) + readw(0x1f86);
+      right = sar((int32)tan2 * y, 16) - readw(0x1f80) + readw(0x1f86) + readw(0x1f93);
+
+      if(left < 0 && right < 0) {
+        left  = 1;
+        right = 0;
+      } else if(left < 0) {
+        left  = 0;
+      } else if(right < 0) {
+        right = 0;
+      }
+
+      if(left > 255 && right > 255) {
+        left  = 255;
+        right = 254;
+      } else if(left > 255) {
+        left  = 255;
+      } else if(right > 255) {
+        right = 255;
+      }
+    } else {
+      left  = 1;
+      right = 0;
+    }
+    ram[j + 0x800] = (uint8)left;
+    ram[j + 0x900] = (uint8)right;
+  }
+}
+
+//Multiply
+void Cx4::op25() {
+  r0 = ldr(0);
+  r1 = ldr(1);
+  mul(r0, r1, r0, r1);
+  str(0, r0);
+  str(1, r1);
+}
+
+//Transform Coords
+void Cx4::op2d() {
+  C4WFXVal  = readw(0x1f81);
+  C4WFYVal  = readw(0x1f84);
+  C4WFZVal  = readw(0x1f87);
+  C4WFX2Val = read (0x1f89);
+  C4WFY2Val = read (0x1f8a);
+  C4WFDist  = read (0x1f8b);
+  C4WFScale = readw(0x1f90);
+  C4TransfWireFrame2();
+  writew(0x1f80, C4WFXVal);
+  writew(0x1f83, C4WFYVal);
+}
+
+//Sum
+void Cx4::op40() {
+  r0 = 0;
+  for(uint32 i=0;i<0x800;i++) {
+    r0 += ram[i];
+  }
+  str(0, r0);
+}
+
+//Square
+void Cx4::op54() {
+  r0 = ldr(0);
+  mul(r0, r0, r1, r2);
+  str(1, r1);
+  str(2, r2);
+}
+
+//Immediate Register
+void Cx4::op5c() {
+  str(0, 0x000000);
+  immediate_reg(0);
+}
+
+//Immediate Register (Multiple)
+void Cx4::op5e() { immediate_reg( 0); }
+void Cx4::op60() { immediate_reg( 3); }
+void Cx4::op62() { immediate_reg( 6); }
+void Cx4::op64() { immediate_reg( 9); }
+void Cx4::op66() { immediate_reg(12); }
+void Cx4::op68() { immediate_reg(15); }
+void Cx4::op6a() { immediate_reg(18); }
+void Cx4::op6c() { immediate_reg(21); }
+void Cx4::op6e() { immediate_reg(24); }
+void Cx4::op70() { immediate_reg(27); }
+void Cx4::op72() { immediate_reg(30); }
+void Cx4::op74() { immediate_reg(33); }
+void Cx4::op76() { immediate_reg(36); }
+void Cx4::op78() { immediate_reg(39); }
+void Cx4::op7a() { immediate_reg(42); }
+void Cx4::op7c() { immediate_reg(45); }
+
+//Immediate ROM
+void Cx4::op89() {
+  str(0, 0x054336);
+  str(1, 0xffffff);
+}
+
+#endif

bsnes/chip/cx4/serialization.cpp

@@ -0,0 +1,39 @@
+#ifdef CX4_CPP
+
+void Cx4::serialize(serializer &s) {
+  s.array(ram);
+  s.array(reg);
+
+  s.integer(r0);
+  s.integer(r1);
+  s.integer(r2);
+  s.integer(r3);
+  s.integer(r4);
+  s.integer(r5);
+  s.integer(r6);
+  s.integer(r7);
+  s.integer(r8);
+  s.integer(r9);
+  s.integer(r10);
+  s.integer(r11);
+  s.integer(r12);
+  s.integer(r13);
+  s.integer(r14);
+  s.integer(r15);
+
+  s.integer(C4WFXVal);
+  s.integer(C4WFYVal);
+  s.integer(C4WFZVal);
+  s.integer(C4WFX2Val);
+  s.integer(C4WFY2Val);
+  s.integer(C4WFDist);
+  s.integer(C4WFScale);
+
+  s.integer(C41FXVal);
+  s.integer(C41FYVal);
+  s.integer(C41FAngleRes);
+  s.integer(C41FDist);
+  s.integer(C41FDistVal);
+}
+
+#endif

bsnes/chip/dsp1/dsp1.cpp

@@ -0,0 +1,33 @@
+#include <../base.hpp>
+
+#define DSP1_CPP
+namespace SNES {
+
+DSP1 dsp1;
+DSP1DR dsp1dr;
+DSP1SR dsp1sr;
+
+#include "serialization.cpp"
+#include "dsp1emu.cpp"
+
+void DSP1::init() {
+}
+
+void DSP1::enable() {
+}
+
+void DSP1::power() {
+  reset();
+}
+
+void DSP1::reset() {
+  dsp1.reset();
+}
+
+uint8 DSP1DR::read(unsigned addr) { return dsp1.dsp1.getDr(); }
+void DSP1DR::write(unsigned addr, uint8 data) { dsp1.dsp1.setDr(data); }
+
+uint8 DSP1SR::read(unsigned addr) { return dsp1.dsp1.getSr(); }
+void DSP1SR::write(unsigned addr, uint8 data) {}
+
+};

bsnes/chip/dsp1/dsp1.hpp

@@ -0,0 +1,30 @@
+#include "dsp1emu.hpp"
+
+class DSP1 {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  void serialize(serializer&);
+
+private:
+  Dsp1 dsp1;
+  friend class DSP1DR;
+  friend class DSP1SR;
+};
+
+class DSP1DR : public Memory {
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+};
+
+class DSP1SR : public Memory {
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+};
+
+extern DSP1 dsp1;
+extern DSP1DR dsp1dr;
+extern DSP1SR dsp1sr;

bsnes/chip/dsp1/dsp1emu.hpp

@@ -0,0 +1,129 @@
+// DSP-1's emulation code
+//
+// Based on research by Overload, The Dumper, Neviksti and Andreas Naive
+// Date: June 2006
+
+#ifndef __DSP1EMUL_H
+#define __DSP1EMUL_H
+
+#define DSP1_VERSION 0x0102
+
+class Dsp1
+{
+   public:
+      // The DSP-1 status register has 16 bits, but only
+      // the upper 8 bits can be accessed from an external device, so all these
+      // positions are referred to the upper byte (bits D8 to D15)
+      enum SrFlags {DRC=0x04, DRS=0x10, RQM=0x80};
+
+      // According to Overload's docs, these are the meanings of the flags:
+      // DRC: The Data Register Control (DRC) bit specifies the data transfer length to and from the host CPU.
+      //   0: Data transfer to and from the DSP-1 is 16 bits.
+      //   1: Data transfer to and from the DSP-1 is 8 bits.
+      // DRS: The Data Register Status (DRS) bit indicates the data transfer status in the case of transfering 16-bit data.
+      //   0: Data transfer has terminated.
+      //   1: Data transfer in progress.
+      // RQM: The Request for Master (RQM) indicates that the DSP1 is requesting host CPU for data read/write.
+      //   0: Internal Data Register Transfer.
+      //   1: External Data Register Transfer.
+
+      Dsp1();
+      uint8 getSr();            // return the status register's high byte
+      uint8 getDr();
+      void setDr(uint8 iDr);
+      void reset();
+
+      void serialize(serializer&);
+
+   private:
+      enum FsmMajorState {WAIT_COMMAND, READ_DATA, WRITE_DATA};
+      enum MaxDataAccesses {MAX_READS=7, MAX_WRITES=1024};
+
+      struct Command {
+         void (Dsp1::*callback)(int16 *, int16 *);
+         unsigned int reads;
+         unsigned int writes;
+      };
+
+      static const Command mCommandTable[];
+      static const int16 MaxAZS_Exp[16];
+      static const int16 SinTable[];
+      static const int16 MulTable[];
+      static const uint16 DataRom[];
+
+      struct SharedData { // some RAM variables shared between commands
+         int16 MatrixA[3][3];          // attitude matrix A
+         int16 MatrixB[3][3];
+         int16 MatrixC[3][3];
+         int16 CentreX, CentreY, CentreZ;   // center of projection
+         int16 CentreZ_C, CentreZ_E;
+         int16 VOffset;                     // vertical offset of the screen with regard to the centre of projection
+         int16 Les, C_Les, E_Les;
+         int16 SinAas, CosAas;
+         int16 SinAzs, CosAzs;
+         int16 SinAZS, CosAZS;
+         int16 SecAZS_C1, SecAZS_E1;
+         int16 SecAZS_C2, SecAZS_E2;
+         int16 Nx, Ny, Nz;    // normal vector to the screen (norm 1, points toward the center of projection)
+         int16 Gx, Gy, Gz;    // center of the screen (global coordinates)
+         int16 Hx, Hy;        // horizontal vector of the screen (Hz=0, norm 1, points toward the right of the screen)
+         int16 Vx, Vy, Vz;    // vertical vector of the screen (norm 1, points toward the top of the screen) 
+
+      } shared;
+
+      uint8 mSr;            // status register
+      int mSrLowByteAccess;
+      uint16 mDr;           // "internal" representation of the data register
+      unsigned mFsmMajorState;     // current major state of the FSM
+      uint8 mCommand;                  // current command processed by the FSM
+      uint8 mDataCounter;                 // #uint16 read/writes counter used by the FSM
+      int16 mReadBuffer[MAX_READS];
+      int16 mWriteBuffer[MAX_WRITES];
+      bool mFreeze;                   // need explanation?  ;)
+
+      void fsmStep(bool read, uint8 &data);            // FSM logic
+
+      // commands
+      void memoryTest(int16 *input, int16 *output);
+      void memoryDump(int16 *input, int16 *output);
+      void memorySize(int16 *input, int16 *output);
+      void multiply(int16* input, int16* output);
+      void multiply2(int16* input, int16* output);
+      void inverse(int16 *input, int16 *output);
+      void triangle(int16 *input, int16 *output);
+      void radius(int16 *input, int16 *output);
+      void range(int16 *input, int16 *output);
+      void range2(int16 *input, int16 *output);
+      void distance(int16 *input, int16 *output);
+      void rotate(int16 *input, int16 *output);
+      void polar(int16 *input, int16 *output);
+      void attitudeA(int16 *input, int16 *output);
+      void attitudeB(int16 *input, int16 *output);
+      void attitudeC(int16 *input, int16 *output);
+      void objectiveA(int16 *input, int16 *output);
+      void objectiveB(int16 *input, int16 *output);
+      void objectiveC(int16 *input, int16 *output);
+      void subjectiveA(int16 *input, int16 *output);
+      void subjectiveB(int16 *input, int16 *output);
+      void subjectiveC(int16 *input, int16 *output);
+      void scalarA(int16 *input, int16 *output);
+      void scalarB(int16 *input, int16 *output);
+      void scalarC(int16 *input, int16 *output);
+      void gyrate(int16 *input, int16 *output);
+      void parameter(int16 *input, int16 *output);
+      void raster(int16 *input, int16 *output);
+      void target(int16 *input, int16 *output);
+      void project(int16 *input, int16 *output);
+
+      // auxiliar functions
+      int16 sin(int16 Angle);
+      int16 cos(int16 Angle);
+      void inverse(int16 Coefficient, int16 Exponent, int16 &iCoefficient, int16 &iExponent);
+      int16 denormalizeAndClip(int16 C, int16 E);
+      void normalize(int16 m, int16 &Coefficient, int16 &Exponent);
+      void normalizeDouble(int32 Product, int16 &Coefficient, int16 &Exponent);
+      int16 shiftR(int16 C, int16 E);
+}; 
+
+#endif
+

bsnes/chip/dsp1/serialization.cpp

@@ -0,0 +1,56 @@
+#ifdef DSP1_CPP
+
+void DSP1::serialize(serializer &s) {
+  dsp1.serialize(s);
+}
+
+void Dsp1::serialize(serializer &s) {
+  for(unsigned i = 0; i < 3; i++) {
+    s.array(shared.MatrixA[i]);
+    s.array(shared.MatrixB[i]);
+    s.array(shared.MatrixC[i]);
+  }
+
+  s.integer(shared.CentreX);
+  s.integer(shared.CentreY);
+  s.integer(shared.CentreZ);
+  s.integer(shared.CentreZ_C);
+  s.integer(shared.CentreZ_E);
+  s.integer(shared.VOffset);
+  s.integer(shared.Les);
+  s.integer(shared.C_Les);
+  s.integer(shared.E_Les);
+  s.integer(shared.SinAas);
+  s.integer(shared.CosAas);
+  s.integer(shared.SinAzs);
+  s.integer(shared.CosAzs);
+  s.integer(shared.SinAZS);
+  s.integer(shared.CosAZS);
+  s.integer(shared.SecAZS_C1);
+  s.integer(shared.SecAZS_E1);
+  s.integer(shared.SecAZS_C2);
+  s.integer(shared.SecAZS_E2);
+  s.integer(shared.Nx);
+  s.integer(shared.Ny);
+  s.integer(shared.Nz);
+  s.integer(shared.Gx);
+  s.integer(shared.Gy);
+  s.integer(shared.Gz);
+  s.integer(shared.Hx);
+  s.integer(shared.Hy);
+  s.integer(shared.Vx);
+  s.integer(shared.Vy);
+  s.integer(shared.Vz);
+
+  s.integer(mSr);
+  s.integer(mSrLowByteAccess);
+  s.integer(mDr);
+  s.integer(mFsmMajorState);
+  s.integer(mCommand);
+  s.integer(mDataCounter);
+  s.array(mReadBuffer);
+  s.array(mWriteBuffer);
+  s.integer(mFreeze);
+}
+
+#endif

bsnes/chip/dsp2/dsp2.cpp

@@ -0,0 +1,145 @@
+#include <../base.hpp>
+
+#define DSP2_CPP
+namespace SNES {
+
+DSP2 dsp2;
+
+#include "serialization.cpp"
+#include "opcodes.cpp"
+
+void DSP2::init() {
+}
+
+void DSP2::enable() {
+}
+
+void DSP2::power() {
+  reset();
+}
+
+void DSP2::reset() {
+  status.waiting_for_command = true;
+  status.in_count  = 0;
+  status.in_index  = 0;
+  status.out_count = 0;
+  status.out_index = 0;
+
+  status.op05transparent = 0;
+  status.op05haslen      = false;
+  status.op05len         = 0;
+  status.op06haslen      = false;
+  status.op06len         = 0;
+  status.op09word1       = 0;
+  status.op09word2       = 0;
+  status.op0dhaslen      = false;
+  status.op0doutlen      = 0;
+  status.op0dinlen       = 0;
+}
+
+uint8 DSP2::read(unsigned addr) {
+  uint8 r = 0xff;
+  if(status.out_count) {
+    r = status.output[status.out_index++];
+    status.out_index &= 511;
+    if(status.out_count == status.out_index) {
+      status.out_count = 0;
+    }
+  }
+  return r;
+}
+
+void DSP2::write(unsigned addr, uint8 data) {
+  if(status.waiting_for_command) {
+    status.command  = data;
+    status.in_index = 0;
+    status.waiting_for_command = false;
+
+    switch(data) {
+    case 0x01: status.in_count = 32; break;
+    case 0x03: status.in_count =  1; break;
+    case 0x05: status.in_count =  1; break;
+    case 0x06: status.in_count =  1; break;
+    case 0x07: break;
+    case 0x08: break;
+    case 0x09: status.in_count =  4; break;
+    case 0x0d: status.in_count =  2; break;
+    case 0x0f: status.in_count =  0; break;
+    }
+  } else {
+    status.parameters[status.in_index++] = data;
+    status.in_index &= 511;
+  }
+
+  if(status.in_count == status.in_index) {
+    status.waiting_for_command = true;
+    status.out_index = 0;
+    switch(status.command) {
+    case 0x01: {
+      status.out_count = 32;
+      op01();
+    } break;
+
+    case 0x03: {
+      op03();
+    } break;
+
+    case 0x05: {
+      if(status.op05haslen) {
+        status.op05haslen = false;
+        status.out_count  = status.op05len;
+        op05();
+      } else {
+        status.op05len    = status.parameters[0];
+        status.in_index   = 0;
+        status.in_count   = status.op05len * 2;
+        status.op05haslen = true;
+        if(data)status.waiting_for_command = false;
+      }
+    } break;
+
+    case 0x06: {
+      if(status.op06haslen) {
+        status.op06haslen = false;
+        status.out_count  = status.op06len;
+        op06();
+      } else {
+        status.op06len    = status.parameters[0];
+        status.in_index   = 0;
+        status.in_count   = status.op06len;
+        status.op06haslen = true;
+        if(data)status.waiting_for_command = false;
+      }
+    } break;
+
+    case 0x07: break;
+    case 0x08: break;
+
+    case 0x09: {
+      op09();
+    } break;
+
+    case 0x0d: {
+      if(status.op0dhaslen) {
+        status.op0dhaslen = false;
+        status.out_count  = status.op0doutlen;
+        op0d();
+      } else {
+        status.op0dinlen  = status.parameters[0];
+        status.op0doutlen = status.parameters[1];
+        status.in_index   = 0;
+        status.in_count   = (status.op0dinlen + 1) >> 1;
+        status.op0dhaslen = true;
+        if(data)status.waiting_for_command = false;
+      }
+    } break;
+
+    case 0x0f: break;
+    }
+  }
+}
+
+DSP2::DSP2() {}
+DSP2::~DSP2() {}
+};
+

bsnes/chip/dsp2/dsp2.hpp

@@ -0,0 +1,45 @@
+class DSP2 : public Memory {
+public:
+  struct {
+    bool waiting_for_command;
+    unsigned command;
+    unsigned in_count,  in_index;
+    unsigned out_count, out_index;
+
+    uint8  parameters[512];
+    uint8  output[512];
+
+    uint8  op05transparent;
+    bool   op05haslen;
+    int    op05len;
+    bool   op06haslen;
+    int    op06len;
+    uint16 op09word1;
+    uint16 op09word2;
+    bool   op0dhaslen;
+    int    op0doutlen;
+    int    op0dinlen;
+  } status;
+
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+  void serialize(serializer&);
+  DSP2();
+  ~DSP2();
+
+protected:
+  void op01();
+  void op03();
+  void op05();
+  void op06();
+  void op09();
+  void op0d();
+};
+
+extern DSP2 dsp2;

bsnes/chip/dsp2/opcodes.cpp

@@ -0,0 +1,177 @@
+#ifdef DSP2_CPP
+
+//convert bitmap to bitplane tile
+void DSP2::op01() {
+//op01 size is always 32 bytes input and output
+//the hardware does strange things if you vary the size
+
+unsigned char c0, c1, c2, c3;
+unsigned char *p1  = status.parameters;
+unsigned char *p2a = status.output;
+unsigned char *p2b = status.output + 16; //halfway
+
+//process 8 blocks of 4 bytes each
+  for(int j = 0; j < 8; j++) {
+    c0 = *p1++;
+    c1 = *p1++;
+    c2 = *p1++;
+    c3 = *p1++;
+
+    *p2a++ = (c0 & 0x10) << 3 |
+             (c0 & 0x01) << 6 |
+             (c1 & 0x10) << 1 |
+             (c1 & 0x01) << 4 |
+             (c2 & 0x10) >> 1 |
+             (c2 & 0x01) << 2 |
+             (c3 & 0x10) >> 3 |
+             (c3 & 0x01);
+
+    *p2a++ = (c0 & 0x20) << 2 |
+             (c0 & 0x02) << 5 |
+             (c1 & 0x20)      |
+             (c1 & 0x02) << 3 |
+             (c2 & 0x20) >> 2 |
+             (c2 & 0x02) << 1 |
+             (c3 & 0x20) >> 4 |
+             (c3 & 0x02) >> 1;
+
+    *p2b++ = (c0 & 0x40) << 1 |
+             (c0 & 0x04) << 4 |
+             (c1 & 0x40) >> 1 |
+             (c1 & 0x04) << 2 |
+             (c2 & 0x40) >> 3 |
+             (c2 & 0x04)      |
+             (c3 & 0x40) >> 5 |
+             (c3 & 0x04) >> 2;
+
+    *p2b++ = (c0 & 0x80)      |
+             (c0 & 0x08) << 3 |
+             (c1 & 0x80) >> 2 |
+             (c1 & 0x08) << 1 |
+             (c2 & 0x80) >> 4 |
+             (c2 & 0x08) >> 1 |
+             (c3 & 0x80) >> 6 |
+             (c3 & 0x08) >> 3;
+  }
+}
+
+//set transparent color
+void DSP2::op03() {
+  status.op05transparent = status.parameters[0];
+}
+
+//replace bitmap using transparent color
+void DSP2::op05() {
+uint8 color;
+// Overlay bitmap with transparency.
+// Input:
+//
+//   Bitmap 1:  i[0] <=> i[size-1]
+//   Bitmap 2:  i[size] <=> i[2*size-1]
+//
+// Output:
+//
+//   Bitmap 3:  o[0] <=> o[size-1]
+//
+// Processing:
+//
+//   Process all 4-bit pixels (nibbles) in the bitmap
+//
+//   if ( BM2_pixel == transparent_color )
+//      pixelout = BM1_pixel
+//   else
+//      pixelout = BM2_pixel
+
+// The max size bitmap is limited to 255 because the size parameter is a byte
+// I think size=0 is an error.  The behavior of the chip on size=0 is to
+// return the last value written to DR if you read DR on Op05 with
+// size = 0.  I don't think it's worth implementing this quirk unless it's
+// proven necessary.
+
+unsigned char c1, c2;
+unsigned char *p1 = status.parameters;
+unsigned char *p2 = status.parameters + status.op05len;
+unsigned char *p3 = status.output;
+
+  color = status.op05transparent & 0x0f;
+
+  for(int n = 0; n < status.op05len; n++) {
+    c1 = *p1++;
+    c2 = *p2++;
+    *p3++ = ( ((c2 >> 4)   == color ) ? c1 & 0xf0 : c2 & 0xf0 ) |
+            ( ((c2 & 0x0f) == color ) ? c1 & 0x0f : c2 & 0x0f );
+  }
+}
+
+//reverse bitmap
+void DSP2::op06() {
+// Input:
+//    size
+//    bitmap
+
+int i, j;
+  for(i = 0, j = status.op06len - 1; i < status.op06len; i++, j--) {
+    status.output[j] = (status.parameters[i] << 4) | (status.parameters[i] >> 4);
+  }
+}
+
+//multiply
+void DSP2::op09() {
+  status.out_count = 4;
+
+  status.op09word1 = status.parameters[0] | (status.parameters[1] << 8);
+  status.op09word2 = status.parameters[2] | (status.parameters[3] << 8);
+
+uint32 r;
+  r = status.op09word1 * status.op09word2;
+  status.output[0] = r;
+  status.output[1] = r >> 8;
+  status.output[2] = r >> 16;
+  status.output[3] = r >> 24;
+}
+
+//scale bitmap
+void DSP2::op0d() {
+// Bit accurate hardware algorithm - uses fixed point math
+// This should match the DSP2 Op0D output exactly
+// I wouldn't recommend using this unless you're doing hardware debug.
+// In some situations it has small visual artifacts that
+// are not readily apparent on a TV screen but show up clearly
+// on a monitor.  Use Overload's scaling instead.
+// This is for hardware verification testing.
+//
+// One note:  the HW can do odd byte scaling but since we divide
+// by two to get the count of bytes this won't work well for
+// odd byte scaling (in any of the current algorithm implementations).
+// So far I haven't seen Dungeon Master use it.
+// If it does we can adjust the parameters and code to work with it
+
+uint32 multiplier; // Any size int >= 32-bits
+uint32 pixloc;     // match size of multiplier
+int    i, j;
+uint8  pixelarray[512];
+  if(status.op0dinlen <= status.op0doutlen) {
+    multiplier = 0x10000; // In our self defined fixed point 0x10000 == 1
+  } else {
+    multiplier = (status.op0dinlen << 17) / ((status.op0doutlen << 1) + 1);
+  }
+
+  pixloc = 0;
+  for(i = 0; i < status.op0doutlen * 2; i++) {
+    j = pixloc >> 16;
+
+    if(j & 1) {
+      pixelarray[i] = (status.parameters[j >> 1] & 0x0f);
+    } else {
+      pixelarray[i] = (status.parameters[j >> 1] & 0xf0) >> 4;
+    }
+
+    pixloc += multiplier;
+  }
+
+  for(i = 0; i < status.op0doutlen; i++) {
+    status.output[i] = (pixelarray[i << 1] << 4) | pixelarray[(i << 1) + 1];
+  }
+}
+
+#endif

bsnes/chip/dsp2/serialization.cpp

@@ -0,0 +1,26 @@
+#ifdef DSP2_CPP
+
+void DSP2::serialize(serializer &s) {
+  s.integer(status.waiting_for_command);
+  s.integer(status.command);
+  s.integer(status.in_count);
+  s.integer(status.in_index);
+  s.integer(status.out_count);
+  s.integer(status.out_index);
+
+  s.array(status.parameters);
+  s.array(status.output);
+
+  s.integer(status.op05transparent);
+  s.integer(status.op05haslen);
+  s.integer(status.op05len);
+  s.integer(status.op06haslen);
+  s.integer(status.op06len);
+  s.integer(status.op09word1);
+  s.integer(status.op09word2);
+  s.integer(status.op0dhaslen);
+  s.integer(status.op0doutlen);
+  s.integer(status.op0dinlen);
+}
+
+#endif

bsnes/chip/dsp3/dsp3.cpp

@@ -0,0 +1,40 @@
+#include <../base.hpp>
+
+#define DSP3_CPP
+namespace SNES {
+
+DSP3 dsp3;
+
+namespace DSP3i {
+  #define bool8 uint8
+  #include "dsp3emu.c"
+  #undef bool8
+};
+
+void DSP3::init() {
+}
+
+void DSP3::enable() {
+}
+
+void DSP3::power() {
+  reset();
+}
+
+void DSP3::reset() {
+  DSP3i::DSP3_Reset();
+}
+
+uint8 DSP3::read(unsigned addr) {
+  DSP3i::dsp3_address = addr & 0xffff;
+  DSP3i::DSP3GetByte();
+  return DSP3i::dsp3_byte;
+}
+
+void DSP3::write(unsigned addr, uint8 data) {
+  DSP3i::dsp3_address = addr & 0xffff;
+  DSP3i::dsp3_byte = data;
+  DSP3i::DSP3SetByte();
+}
+
+};

bsnes/chip/dsp3/dsp3.hpp

@@ -0,0 +1,12 @@
+class DSP3 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read (unsigned addr);
+  void  write(unsigned addr, uint8 data);
+};
+
+extern DSP3 dsp3;

bsnes/chip/dsp4/dsp4.cpp

@@ -0,0 +1,60 @@
+#include <../base.hpp>
+
+#define DSP4_CPP
+namespace SNES {
+
+DSP4 dsp4;
+
+void DSP4::init() {
+}
+
+void DSP4::enable() {
+}
+
+namespace DSP4i {
+  inline uint16 READ_WORD(uint8 *addr) {
+    return (addr[0]) + (addr[1] << 8);
+  }
+
+  inline uint32 READ_DWORD(uint8 *addr) {
+    return (addr[0]) + (addr[1] << 8) + (addr[2] << 16) + (addr[3] << 24);
+  }
+
+  inline void WRITE_WORD(uint8 *addr, uint16 data) {
+    addr[0] = data;
+    addr[1] = data >> 8;
+  }
+
+  #define bool8 uint8
+  #include "dsp4emu.c"
+  #undef bool8
+};
+
+void DSP4::power() {
+  reset();
+}
+
+void DSP4::reset() {
+  DSP4i::InitDSP4();
+}
+
+uint8 DSP4::read(unsigned addr) {
+  addr &= 0xffff;
+  if(addr < 0xc000) {
+    DSP4i::dsp4_address = addr;
+    DSP4i::DSP4GetByte();
+    return DSP4i::dsp4_byte;
+  }
+  return 0x80;
+}
+
+void DSP4::write(unsigned addr, uint8 data) {
+  addr &= 0xffff;
+  if(addr < 0xc000) {
+    DSP4i::dsp4_address = addr;
+    DSP4i::dsp4_byte = data;
+    DSP4i::DSP4SetByte();
+  }
+}
+
+};

bsnes/chip/dsp4/dsp4.hpp

@@ -0,0 +1,12 @@
+class DSP4 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read (unsigned addr);
+  void  write(unsigned addr, uint8 data);
+};
+
+extern DSP4 dsp4;

bsnes/chip/dsp4/dsp4emu.h

@@ -0,0 +1,108 @@
+//DSP-4 emulator code
+//Copyright (c) 2004-2006 Dreamer Nom, John Weidman, Kris Bleakley, Nach, z80 gaiden
+
+#ifndef DSP4EMU_H
+#define DSP4EMU_H
+
+#undef TRUE
+#undef FALSE
+#define TRUE  true
+#define FALSE false
+
+struct DSP4_t
+{
+  bool8 waiting4command;
+  bool8 half_command;
+  uint16 command;
+  uint32 in_count;
+  uint32 in_index;
+  uint32 out_count;
+  uint32 out_index;
+  uint8 parameters[512];
+  uint8 output[512];
+};
+
+extern struct DSP4_t DSP4;
+
+struct DSP4_vars_t
+{
+  // op control
+  int8 DSP4_Logic;            // controls op flow
+
+
+  // projection format
+  int16 lcv;                  // loop-control variable
+  int16 distance;             // z-position into virtual world
+  int16 raster;               // current raster line
+  int16 segments;             // number of raster lines drawn
+
+  // 1.15.16 or 1.15.0 [sign, integer, fraction]
+  int32 world_x;              // line of x-projection in world
+  int32 world_y;              // line of y-projection in world
+  int32 world_dx;             // projection line x-delta
+  int32 world_dy;             // projection line y-delta
+  int16 world_ddx;            // x-delta increment
+  int16 world_ddy;            // y-delta increment
+  int32 world_xenv;           // world x-shaping factor
+  int16 world_yofs;           // world y-vertical scroll
+
+  int16 view_x1;              // current viewer-x
+  int16 view_y1;              // current viewer-y
+  int16 view_x2;              // future viewer-x
+  int16 view_y2;              // future viewer-y
+  int16 view_dx;              // view x-delta factor
+  int16 view_dy;              // view y-delta factor
+  int16 view_xofs1;           // current viewer x-vertical scroll
+  int16 view_yofs1;           // current viewer y-vertical scroll
+  int16 view_xofs2;           // future viewer x-vertical scroll
+  int16 view_yofs2;           // future viewer y-vertical scroll
+  int16 view_yofsenv;         // y-scroll shaping factor
+  int16 view_turnoff_x;       // road turnoff data
+  int16 view_turnoff_dx;      // road turnoff delta factor
+
+
+  // drawing area
+
+  int16 viewport_cx;          // x-center of viewport window
+  int16 viewport_cy;          // y-center of render window
+  int16 viewport_left;        // x-left of viewport
+  int16 viewport_right;       // x-right of viewport
+  int16 viewport_top;         // y-top of viewport
+  int16 viewport_bottom;      // y-bottom of viewport
+
+
+  // sprite structure
+
+  int16 sprite_x;             // projected x-pos of sprite
+  int16 sprite_y;             // projected y-pos of sprite
+  int16 sprite_attr;          // obj attributes
+  bool8 sprite_size;          // sprite size: 8x8 or 16x16
+  int16 sprite_clipy;         // visible line to clip pixels off
+  int16 sprite_count;
+
+  // generic projection variables designed for
+  // two solid polygons + two polygon sides
+
+  int16 poly_clipLf[2][2];    // left clip boundary
+  int16 poly_clipRt[2][2];    // right clip boundary
+  int16 poly_ptr[2][2];       // HDMA structure pointers
+  int16 poly_raster[2][2];    // current raster line below horizon
+  int16 poly_top[2][2];       // top clip boundary
+  int16 poly_bottom[2][2];    // bottom clip boundary
+  int16 poly_cx[2][2];        // center for left/right points
+  int16 poly_start[2];        // current projection points
+  int16 poly_plane[2];        // previous z-plane distance
+
+
+  // OAM
+  int16 OAM_attr[16];         // OAM (size,MSB) data
+  int16 OAM_index;            // index into OAM table
+  int16 OAM_bits;             // offset into OAM table
+
+  int16 OAM_RowMax;           // maximum number of tiles per 8 aligned pixels (row)
+  int16 OAM_Row[32];          // current number of tiles per row
+};
+
+extern struct DSP4_vars_t DSP4_vars;
+
+#endif

bsnes/chip/msu1/msu1.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define MSU1_CPP
 namespace SNES {
@@ -7,9 +7,9 @@ MSU1 msu1;
 
 #include "serialization.cpp"
 
-void MSU1::Enter() { msu1.enter(); }
-
 void MSU1::enter() {
+  scheduler.clock.cop_freq = 44100;
+
   while(true) {
     if(scheduler.sync == Scheduler::SynchronizeMode::All) {
       scheduler.exit(Scheduler::ExitReason::SynchronizeEvent);
@@ -20,12 +20,8 @@ void MSU1::enter() {
     if(mmio.audio_play) {
       if(audiofile.open()) {
         if(audiofile.end()) {
-          if(!mmio.audio_repeat) {
-            mmio.audio_play = false;
-            audiofile.seek(mmio.audio_offset = 8);
-          } else {
-            audiofile.seek(mmio.audio_offset = mmio.audio_loop_offset);
-          }
+          if(!mmio.audio_repeat) mmio.audio_play = false;
+          audiofile.seek(mmio.audio_offset = 58);
         } else {
           mmio.audio_offset += 4;
           left  = audiofile.readl(2);
@@ -40,33 +36,27 @@ void MSU1::enter() {
     right = sclamp<16>((double)right * (double)mmio.audio_volume / 255.0);
 
     audio.coprocessor_sample(left, right);
-    step(1);
-    synchronize_cpu();
+    scheduler.addclocks_cop(1);
+    scheduler.sync_copcpu();
   }
 }
 
 void MSU1::init() {
 }
 
-void MSU1::load() {
-  if(datafile.open()) datafile.close();
-  datafile.open(system.interface->path(Cartridge::Slot::Base, ".msu"), file::mode::read);
-}
-
-void MSU1::unload() {
-  if(datafile.open()) datafile.close();
-}
-
-void MSU1::power() {
+void MSU1::enable() {
   audio.coprocessor_enable(true);
   audio.coprocessor_frequency(44100.0);
 
+  if(datafile.open()) datafile.close();
+  datafile.open(string() << basename << ".msu", file::mode_read);
+}
+
+void MSU1::power() {
   reset();
 }
 
 void MSU1::reset() {
-  create(MSU1::Enter, 44100);
-
   mmio.data_offset  = 0;
   mmio.audio_offset = 0;
   mmio.audio_track  = 0;
@@ -133,14 +123,10 @@ void MSU1::mmio_write(unsigned addr, uint8 data) {
   if(addr == 0x2005) {
     mmio.audio_track = (mmio.audio_track & 0x00ff) | (data << 8);
     if(audiofile.open()) audiofile.close();
-    if(audiofile.open(system.interface->path(Cartridge::Slot::Base, { "-", (unsigned)mmio.audio_track, ".pcm" }), file::mode::read)) {
-      uint32 header = audiofile.readm(4);
-      if(header != 0x4d535531) {  //verify 'MSU1' header
-        audiofile.close();
-      } else {
-        mmio.audio_offset = 8;
-        mmio.audio_loop_offset = 8 + audiofile.readl(4) * 4;
-      }
+    char track[16];
+    sprintf(track, "-%u", mmio.audio_track);
+    if(audiofile.open(string() << basename << track << ".wav", file::mode_read)) {
+      audiofile.seek(mmio.audio_offset = 58);  //skip WAV header
     }
     mmio.audio_busy   = false;
     mmio.audio_repeat = false;
@@ -157,4 +143,8 @@ void MSU1::mmio_write(unsigned addr, uint8 data) {
   }
 }
 
+void MSU1::base(const string& name) {
+  basename = name;
+}
+
 }

bsnes/chip/msu1/msu1.hpp

@@ -1,19 +1,20 @@
-class MSU1 : public Coprocessor {
+class MSU1 : public MMIO {
 public:
-  static void Enter();
   void enter();
+
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 
   uint8 mmio_read(unsigned addr);
   void mmio_write(unsigned addr, uint8 data);
 
+  void base(const string &name);
   void serialize(serializer&);
 
 private:
+  string basename;
   file datafile;
   file audiofile;
 
@@ -28,11 +29,8 @@ private:
   struct MMIO {
     uint32 data_offset;
     uint32 audio_offset;
-    uint32 audio_loop_offset;
-
     uint16 audio_track;
     uint8 audio_volume;
-
     bool data_busy;
     bool audio_busy;
     bool audio_repeat;

bsnes/chip/msu1/serialization.cpp

@@ -1,27 +1,24 @@
 #ifdef MSU1_CPP
 
 void MSU1::serialize(serializer &s) {
-  Processor::serialize(s);
-
   s.integer(mmio.data_offset);
   s.integer(mmio.audio_offset);
-  s.integer(mmio.audio_loop_offset);
-
   s.integer(mmio.audio_track);
   s.integer(mmio.audio_volume);
-
   s.integer(mmio.data_busy);
   s.integer(mmio.audio_busy);
   s.integer(mmio.audio_repeat);
   s.integer(mmio.audio_play);
 
   if(datafile.open()) datafile.close();
-  if(datafile.open(system.interface->path(Cartridge::Slot::Base, ".msu"), file::mode::read)) {
+  if(datafile.open(string() << basename << ".msun", file::mode_read)) {
     datafile.seek(mmio.data_offset);
   }
 
   if(audiofile.open()) audiofile.close();
-  if(audiofile.open(system.interface->path(Cartridge::Slot::Base, { "-", (unsigned)mmio.audio_track, ".pcm" }), file::mode::read)) {
+  char track[16];
+  sprintf(track, "-%u", mmio.audio_track);
+  if(audiofile.open(string() << basename << track << ".wav", file::mode_read)) {
     audiofile.seek(mmio.audio_offset);
   }
 }

bsnes/chip/obc1/obc1.cpp

@@ -0,0 +1,82 @@
+#include <../base.hpp>
+
+#define OBC1_CPP
+namespace SNES {
+
+OBC1 obc1;
+
+#include "serialization.cpp"
+
+void OBC1::init() {
+}
+
+void OBC1::enable() {
+}
+
+void OBC1::power() {
+  reset();
+}
+
+void OBC1::reset() {
+  for(unsigned i = 0x0000; i <= 0x1fff; i++) ram_write(i, 0xff);
+
+  status.baseptr = (ram_read(0x1ff5) & 1) ? 0x1800 : 0x1c00;
+  status.address = (ram_read(0x1ff6) & 0x7f);
+  status.shift   = (ram_read(0x1ff6) & 3) << 1;
+}
+
+uint8 OBC1::read(unsigned addr) {
+  addr &= 0x1fff;
+  if((addr & 0x1ff8) != 0x1ff0) return ram_read(addr);
+
+  switch(addr) { default:  //never used, avoids compiler warning
+    case 0x1ff0: return ram_read(status.baseptr + (status.address << 2) + 0);
+    case 0x1ff1: return ram_read(status.baseptr + (status.address << 2) + 1);
+    case 0x1ff2: return ram_read(status.baseptr + (status.address << 2) + 2);
+    case 0x1ff3: return ram_read(status.baseptr + (status.address << 2) + 3);
+    case 0x1ff4: return ram_read(status.baseptr + (status.address >> 2) + 0x200);
+    case 0x1ff5: case 0x1ff6: case 0x1ff7: return ram_read(addr);
+  }
+}
+
+void OBC1::write(unsigned addr, uint8 data) {
+  addr &= 0x1fff;
+  if((addr & 0x1ff8) != 0x1ff0) return ram_write(addr, data);
+
+  switch(addr) {
+    case 0x1ff0: ram_write(status.baseptr + (status.address << 2) + 0, data); break;
+    case 0x1ff1: ram_write(status.baseptr + (status.address << 2) + 1, data); break;
+    case 0x1ff2: ram_write(status.baseptr + (status.address << 2) + 2, data); break;
+    case 0x1ff3: ram_write(status.baseptr + (status.address << 2) + 3, data); break;
+    case 0x1ff4: {
+      uint8 temp = ram_read(status.baseptr + (status.address >> 2) + 0x200);
+      temp = (temp & ~(3 << status.shift)) | ((data & 3) << status.shift);
+      ram_write(status.baseptr + (status.address >> 2) + 0x200, temp);
+    } break;
+    case 0x1ff5: {
+      status.baseptr = (data & 1) ? 0x1800 : 0x1c00;
+      ram_write(addr, data);
+    } break;
+    case 0x1ff6: {
+      status.address = (data & 0x7f);
+      status.shift   = (data & 3) << 1;
+      ram_write(addr, data);
+    } break;
+    case 0x1ff7: {
+      ram_write(addr, data);
+    } break;
+  }
+}
+
+uint8 OBC1::ram_read(unsigned addr) {
+  return memory::cartram.read(addr & 0x1fff);
+}
+
+void OBC1::ram_write(unsigned addr, uint8 data) {
+  memory::cartram.write(addr & 0x1fff, data);
+}
+
+OBC1::OBC1() {}
+OBC1::~OBC1() {}
+
+};

bsnes/chip/obc1/obc1.hpp

@@ -1,8 +1,7 @@
-class OBC1 {
+class OBC1 : public Memory {
 public:
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 
@@ -10,6 +9,8 @@ public:
   void write(unsigned addr, uint8 data);
 
   void serialize(serializer&);
+  OBC1();
+  ~OBC1();
 
 private:
   uint8 ram_read(unsigned addr);

bsnes/chip/sa1/bus/bus.cpp

@@ -0,0 +1,218 @@
+#ifdef SA1_CPP
+
+VBRBus vbrbus;
+SA1Bus sa1bus;
+
+namespace memory {
+  StaticRAM iram(2048);
+                        //accessed by:
+  VSPROM vsprom;        //S-CPU + SA-1
+  CPUIRAM cpuiram;      //S-CPU
+  SA1IRAM sa1iram;      //SA-1
+  SA1BWRAM sa1bwram;    //SA-1
+  CC1BWRAM cc1bwram;    //S-CPU
+  BitmapRAM bitmapram;  //SA-1
+}
+
+//$230c (VDPL), $230d (VDPH) use this bus to read variable-length data.
+//this is used both to avoid VBR-reads from accessing MMIO registers, and
+//to avoid syncing the S-CPU and SA-1*; as both chips are able to access
+//these ports.
+//(* eg, memory::cartram is used directly, as memory::sa1bwram syncs to the S-CPU)
+void VBRBus::init() {
+  map(MapMode::Direct, 0x00, 0xff, 0x0000, 0xffff, memory::memory_unmapped);
+
+  map(MapMode::Linear, 0x00, 0x3f, 0x0000, 0x07ff, memory::iram);
+  map(MapMode::Linear, 0x00, 0x3f, 0x3000, 0x37ff, memory::iram);
+  map(MapMode::Linear, 0x00, 0x3f, 0x6000, 0x7fff, memory::cartram);
+  map(MapMode::Linear, 0x00, 0x3f, 0x8000, 0xffff, memory::vsprom);
+  map(MapMode::Linear, 0x40, 0x4f, 0x0000, 0xffff, memory::cartram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x0000, 0x07ff, memory::iram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x3000, 0x37ff, memory::iram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x6000, 0x7fff, memory::cartram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x8000, 0xffff, memory::vsprom);
+  map(MapMode::Linear, 0xc0, 0xff, 0x0000, 0xffff, memory::vsprom);
+}
+
+void SA1Bus::init() {
+  map(MapMode::Direct, 0x00, 0xff, 0x0000, 0xffff, memory::memory_unmapped);
+
+  map(MapMode::Linear, 0x00, 0x3f, 0x0000, 0x07ff, memory::sa1iram);
+  map(MapMode::Direct, 0x00, 0x3f, 0x2200, 0x23ff, memory::mmio);
+  map(MapMode::Linear, 0x00, 0x3f, 0x3000, 0x37ff, memory::sa1iram);
+  map(MapMode::Linear, 0x00, 0x3f, 0x6000, 0x7fff, memory::sa1bwram);
+  map(MapMode::Linear, 0x00, 0x3f, 0x8000, 0xffff, memory::vsprom);
+  map(MapMode::Linear, 0x40, 0x4f, 0x0000, 0xffff, memory::sa1bwram);
+  map(MapMode::Linear, 0x60, 0x6f, 0x0000, 0xffff, memory::bitmapram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x0000, 0x07ff, memory::sa1iram);
+  map(MapMode::Direct, 0x80, 0xbf, 0x2200, 0x23ff, memory::mmio);
+  map(MapMode::Linear, 0x80, 0xbf, 0x3000, 0x37ff, memory::sa1iram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x6000, 0x7fff, memory::sa1bwram);
+  map(MapMode::Linear, 0x80, 0xbf, 0x8000, 0xffff, memory::vsprom);
+  map(MapMode::Linear, 0xc0, 0xff, 0x0000, 0xffff, memory::vsprom);
+}
+
+//======
+//VSPROM
+//======
+
+//this class maps $00:[ff00-ffff] for the purpose of supporting:
+//$2209.d6 IVSW (S-CPU IRQ vector selection) (0 = cart, 1 = SA-1)
+//$2209.d4 NVSW (S-CPU NMI vector selection) (0 = cart, 1 = SA-1)
+//when set, vector addresses are over-ridden with SA-1 register settings:
+//SIV = S-CPU IRQ vector address override
+//SNV = S-CPU NMI vector address override
+//
+//$00:[ffea-ffeb|ffee-ffef] are special cased on read;
+//all other addresses return original mapped data.
+
+unsigned VSPROM::size() const {
+  return memory::cartrom.size();
+}
+
+uint8 VSPROM::read(unsigned addr) {
+  //use $7fex instead of $ffex due to linear mapping of 32k granularity ROM data
+  if((addr & 0xffffe0) == 0x007fe0) {
+    if(addr == 0x7fea && sa1.mmio.cpu_nvsw) return sa1.mmio.snv >> 0;
+    if(addr == 0x7feb && sa1.mmio.cpu_nvsw) return sa1.mmio.snv >> 8;
+    if(addr == 0x7fee && sa1.mmio.cpu_ivsw) return sa1.mmio.siv >> 0;
+    if(addr == 0x7fef && sa1.mmio.cpu_ivsw) return sa1.mmio.siv >> 8;
+  }
+  return memory::cartrom.read(addr);
+}
+
+void VSPROM::write(unsigned addr, uint8 data) {
+}
+
+//=======
+//SA1IRAM
+//=======
+
+unsigned SA1IRAM::size() const {
+  return memory::iram.size();
+}
+
+uint8 SA1IRAM::read(unsigned addr) {
+  scheduler.sync_copcpu();
+  return memory::iram.read(addr);
+}
+
+void SA1IRAM::write(unsigned addr, uint8 data) {
+  scheduler.sync_copcpu();
+  memory::iram.write(addr, data);
+}
+
+//=======
+//CPUIRAM
+//=======
+
+unsigned CPUIRAM::size() const {
+  return memory::iram.size();
+}
+
+uint8 CPUIRAM::read(unsigned addr) {
+  scheduler.sync_cpucop();
+  return memory::iram.read(addr);
+}
+
+void CPUIRAM::write(unsigned addr, uint8 data) {
+  scheduler.sync_cpucop();
+  memory::iram.write(addr, data);
+}
+
+//========
+//SA1BWRAM
+//========
+
+unsigned SA1BWRAM::size() const {
+  return memory::cartram.size();
+}
+
+uint8 SA1BWRAM::read(unsigned addr) {
+  scheduler.sync_copcpu();
+  return memory::cartram.read(addr);
+}
+
+void SA1BWRAM::write(unsigned addr, uint8 data) {
+  scheduler.sync_copcpu();
+  memory::cartram.write(addr, data);
+}
+
+//========
+//CC1BWRAM
+//========
+
+unsigned CC1BWRAM::size() const {
+  return memory::cartram.size();
+}
+
+uint8 CC1BWRAM::read(unsigned addr) {
+  scheduler.sync_cpucop();
+  if(dma) return sa1.dma_cc1_read(addr);
+  return memory::cartram.read(addr);
+}
+
+void CC1BWRAM::write(unsigned addr, uint8 data) {
+  scheduler.sync_cpucop();
+  memory::cartram.write(addr, data);
+}
+
+//=========
+//BitmapRAM
+//=========
+
+unsigned BitmapRAM::size() const {
+  return 0x100000;
+}
+
+uint8 BitmapRAM::read(unsigned addr) {
+  scheduler.sync_copcpu();
+
+  if(sa1.mmio.bbf == 0) {
+    //4bpp
+    unsigned shift = addr & 1;
+    addr = (addr >> 1) & (memory::cartram.size() - 1);
+    switch(shift) { default:
+      case 0: return (memory::cartram.read(addr) >> 0) & 15;
+      case 1: return (memory::cartram.read(addr) >> 4) & 15;
+    }
+  } else {
+    //2bpp
+    unsigned shift = addr & 3;
+    addr = (addr >> 2) & (memory::cartram.size() - 1);
+    switch(shift) { default:
+      case 0: return (memory::cartram.read(addr) >> 0) & 3;
+      case 1: return (memory::cartram.read(addr) >> 2) & 3;
+      case 2: return (memory::cartram.read(addr) >> 4) & 3;
+      case 3: return (memory::cartram.read(addr) >> 6) & 3;
+    }
+  }
+}
+
+void BitmapRAM::write(unsigned addr, uint8 data) {
+  scheduler.sync_copcpu();
+
+  if(sa1.mmio.bbf == 0) {
+    //4bpp
+    unsigned shift = addr & 1;
+    addr = (addr >> 1) & (memory::cartram.size() - 1);
+    switch(shift) { default:
+      case 0: data = (memory::cartram.read(addr) & 0xf0) | ((data & 15) << 0); break;
+      case 1: data = (memory::cartram.read(addr) & 0x0f) | ((data & 15) << 4); break;
+    }
+  } else {
+    //2bpp
+    unsigned shift = addr & 3;
+    addr = (addr >> 2) & (memory::cartram.size() - 1);
+    switch(shift) { default:
+      case 0: data = (memory::cartram.read(addr) & 0xfc) | ((data &  3) << 0); break;
+      case 1: data = (memory::cartram.read(addr) & 0xf3) | ((data &  3) << 2); break;
+      case 2: data = (memory::cartram.read(addr) & 0xcf) | ((data &  3) << 4); break;
+      case 3: data = (memory::cartram.read(addr) & 0x3f) | ((data &  3) << 6); break;
+    }
+  }
+
+  memory::cartram.write(addr, data);
+}
+
+#endif

bsnes/chip/sa1/bus/bus.hpp

@@ -0,0 +1,55 @@
+struct VBRBus : Bus {
+  void init();
+};
+
+struct SA1Bus : Bus {
+  void init();
+};
+
+struct VSPROM : Memory {
+  unsigned size() const;
+  alwaysinline uint8 read(unsigned);
+  alwaysinline void write(unsigned, uint8);
+};
+
+struct CPUIRAM : Memory {
+  unsigned size() const;
+  alwaysinline uint8 read(unsigned);
+  alwaysinline void write(unsigned, uint8);
+};
+
+struct SA1IRAM : Memory {
+  unsigned size() const;
+  alwaysinline uint8 read(unsigned);
+  alwaysinline void write(unsigned, uint8);
+};
+
+struct SA1BWRAM : Memory {
+  unsigned size() const;
+  alwaysinline uint8 read(unsigned);
+  alwaysinline void write(unsigned, uint8);
+};
+
+struct CC1BWRAM : Memory {
+  unsigned size() const;
+  alwaysinline uint8 read(unsigned);
+  alwaysinline void write(unsigned, uint8);
+  bool dma;
+};
+
+struct BitmapRAM : Memory {
+  unsigned size() const;
+  alwaysinline uint8 read(unsigned);
+  alwaysinline void write(unsigned, uint8);
+};
+
+namespace memory {
+  extern StaticRAM iram;
+
+  extern VSPROM vsprom;
+  extern CPUIRAM cpuiram;
+  extern SA1IRAM sa1iram;
+  extern SA1BWRAM sa1bwram;
+  extern CC1BWRAM cc1bwram;
+  extern BitmapRAM bitmapram;
+};

bsnes/chip/sa1/dma/dma.cpp

@@ -17,30 +17,30 @@ void SA1::dma_normal() {
     switch(mmio.sd) {
       case DMA::SourceROM: {
         if((dsa & 0x408000) == 0x008000 || (dsa & 0xc00000) == 0xc00000) {
-          data = bus_read(dsa);
+          data = sa1bus.read(dsa);
         }
       } break;
 
       case DMA::SourceBWRAM: {
         if((dsa & 0x40e000) == 0x006000 || (dsa & 0xf00000) == 0x400000) {
-          data = bus_read(dsa);
+          data = sa1bus.read(dsa);
         }
       } break;
 
       case DMA::SourceIRAM: {
-        data = iram.read(dsa & 0x07ff);
+        data = memory::iram.read(dsa & 0x07ff);
       } break;
     }
 
     switch(mmio.dd) {
       case DMA::DestBWRAM: {
         if((dda & 0x40e000) == 0x006000 || (dda & 0xf00000) == 0x400000) {
-          bus_write(dda, data);
+          sa1bus.write(dda, data);
         }
       } break;
 
       case DMA::DestIRAM: {
-        iram.write(dda & 0x07ff, data);
+        memory::iram.write(dda & 0x07ff, data);
       } break;
     }
   }
@@ -59,7 +59,7 @@ void SA1::dma_normal() {
 //===========================
 
 void SA1::dma_cc1() {
-  cpubwram.dma = true;
+  memory::cc1bwram.dma = true;
   mmio.chdma_irqfl = true;
   if(mmio.chdma_irqen) {
     mmio.chdma_irqcl = 0;
@@ -75,7 +75,7 @@ uint8 SA1::dma_cc1_read(unsigned addr) {
     //buffer next character to I-RAM
     unsigned bpp = 2 << (2 - mmio.dmacb);
     unsigned bpl = (8 << mmio.dmasize) >> mmio.dmacb;
-    unsigned bwmask = cartridge.ram.size() - 1;
+    unsigned bwmask = memory::cartram.size() - 1;
     unsigned tile = ((addr - mmio.dsa) & bwmask) >> (6 - mmio.dmacb);
     unsigned ty = (tile >> mmio.dmasize);
     unsigned tx = tile & ((1 << mmio.dmasize) - 1);
@@ -84,7 +84,7 @@ uint8 SA1::dma_cc1_read(unsigned addr) {
     for(unsigned y = 0; y < 8; y++) {
       uint64 data = 0;
       for(unsigned byte = 0; byte < bpp; byte++) {
-        data |= (uint64)cartridge.ram.read((bwaddr + byte) & bwmask) << (byte << 3);
+        data |= (uint64)memory::cartram.read((bwaddr + byte) & bwmask) << (byte << 3);
       }
       bwaddr += bpl;
 
@@ -104,12 +104,12 @@ uint8 SA1::dma_cc1_read(unsigned addr) {
 
       for(unsigned byte = 0; byte < bpp; byte++) {
         unsigned p = mmio.dda + (y << 1) + ((byte & 6) << 3) + (byte & 1);
-        iram.write(p & 0x07ff, out[byte]);
+        memory::iram.write(p & 0x07ff, out[byte]);
       }
     }
   }
 
-  return iram.read((mmio.dda + (addr & charmask)) & 0x07ff);
+  return memory::iram.read((mmio.dda + (addr & charmask)) & 0x07ff);
 }
 
 //===========================
@@ -130,7 +130,7 @@ void SA1::dma_cc2() {
     for(unsigned bit = 0; bit < 8; bit++) {
       output |= ((brf[bit] >> byte) & 1) << (7 - bit);
     }
-    iram.write(addr + ((byte & 6) << 3) + (byte & 1), output);
+    memory::iram.write(addr + ((byte & 6) << 3) + (byte & 1), output);
   }
 
   dma.line = (dma.line + 1) & 15;

bsnes/chip/sa1/memory/memory.cpp

@@ -0,0 +1,24 @@
+#ifdef SA1_CPP
+
+//ROM, I-RAM and MMIO registers are accessed at ~10.74MHz (2 clock ticks)
+//BW-RAM is accessed at ~5.37MHz (4 clock ticks)
+//tick() == 2 clock ticks
+//note: bus conflict delays are not emulated at this time
+
+void SA1::op_io() {
+  tick();
+}
+
+uint8 SA1::op_read(unsigned addr) {
+  tick();
+  if(((addr & 0x40e000) == 0x006000) || ((addr & 0xd00000) == 0x400000)) tick();
+  return sa1bus.read(addr);
+}
+
+void SA1::op_write(unsigned addr, uint8 data) {
+  tick();
+  if(((addr & 0x40e000) == 0x006000) || ((addr & 0xd00000) == 0x400000)) tick();
+  sa1bus.write(addr, data);
+}
+
+#endif

bsnes/chip/sa1/memory/memory.hpp

@@ -0,0 +1,5 @@
+alwaysinline void op_io();
+alwaysinline uint8 op_read(unsigned addr);
+alwaysinline void op_write(unsigned addr, uint8 data);
+
+uint8_t vbr_read(unsigned addr);

bsnes/chip/sa1/mmio/mmio.cpp

@@ -1,5 +1,13 @@
 #ifdef SA1_CPP
 
+//BS-X flash carts, when present, are mapped to 0x400000+
+Memory& SA1::mmio_access(unsigned &addr) {
+  if(!memory::bsxflash.data()) return memory::vsprom;
+  if(addr < 0x400000) return memory::vsprom;
+  addr &= 0x3fffff;
+  return bsxflash;
+}
+
 //(CCNT) SA-1 control
 void SA1::mmio_w2200(uint8 data) {
   if(mmio.sa1_resb && !(data & 0x80)) {
@@ -143,35 +151,104 @@ void SA1::mmio_w2215(uint8 data) { mmio.vcnt = (mmio.vcnt & 0x00ff) | (data << 8
 void SA1::mmio_w2220(uint8 data) {
   mmio.cbmode = (data & 0x80);
   mmio.cb     = (data & 0x07);
+
+  unsigned addr = mmio.cb << 20;
+  Memory &access = mmio_access(addr);
+
+  if(mmio.cbmode == 0) {
+       bus.map(Bus::MapMode::Linear, 0x00, 0x1f, 0x8000, 0xffff, memory::vsprom, 0x000000);
+    sa1bus.map(Bus::MapMode::Linear, 0x00, 0x1f, 0x8000, 0xffff, memory::vsprom, 0x000000);
+  } else {
+       bus.map(Bus::MapMode::Linear, 0x00, 0x1f, 0x8000, 0xffff, access, addr);
+    sa1bus.map(Bus::MapMode::Linear, 0x00, 0x1f, 0x8000, 0xffff, access, addr);
+  }
+
+     bus.map(Bus::MapMode::Linear, 0xc0, 0xcf, 0x0000, 0xffff, access, addr);
+  sa1bus.map(Bus::MapMode::Linear, 0xc0, 0xcf, 0x0000, 0xffff, access, addr);
 }
 
 //(DXB) Super MMC bank D
 void SA1::mmio_w2221(uint8 data) {
   mmio.dbmode = (data & 0x80);
   mmio.db     = (data & 0x07);
+
+  unsigned addr = mmio.db << 20;
+  Memory &access = mmio_access(addr);
+
+  if(mmio.dbmode == 0) {
+       bus.map(Bus::MapMode::Linear, 0x20, 0x3f, 0x8000, 0xffff, memory::vsprom, 0x100000);
+    sa1bus.map(Bus::MapMode::Linear, 0x20, 0x3f, 0x8000, 0xffff, memory::vsprom, 0x100000);
+  } else {
+       bus.map(Bus::MapMode::Linear, 0x20, 0x3f, 0x8000, 0xffff, access, addr);
+    sa1bus.map(Bus::MapMode::Linear, 0x20, 0x3f, 0x8000, 0xffff, access, addr);
+  }
+
+     bus.map(Bus::MapMode::Linear, 0xd0, 0xdf, 0x0000, 0xffff, access, addr);
+  sa1bus.map(Bus::MapMode::Linear, 0xd0, 0xdf, 0x0000, 0xffff, access, addr);
 }
 
 //(EXB) Super MMC bank E
 void SA1::mmio_w2222(uint8 data) {
   mmio.ebmode = (data & 0x80);
   mmio.eb     = (data & 0x07);
+
+  unsigned addr = mmio.eb << 20;
+  Memory &access = mmio_access(addr);
+
+  if(mmio.ebmode == 0) {
+       bus.map(Bus::MapMode::Linear, 0x80, 0x9f, 0x8000, 0xffff, memory::vsprom, 0x200000);
+    sa1bus.map(Bus::MapMode::Linear, 0x80, 0x9f, 0x8000, 0xffff, memory::vsprom, 0x200000);
+  } else {
+       bus.map(Bus::MapMode::Linear, 0x80, 0x9f, 0x8000, 0xffff, access, addr);
+    sa1bus.map(Bus::MapMode::Linear, 0x80, 0x9f, 0x8000, 0xffff, access, addr);
+  }
+
+     bus.map(Bus::MapMode::Linear, 0xe0, 0xef, 0x0000, 0xffff, access, addr);
+  sa1bus.map(Bus::MapMode::Linear, 0xe0, 0xef, 0x0000, 0xffff, access, addr);
 }
 
 //(FXB) Super MMC bank F
 void SA1::mmio_w2223(uint8 data) {
   mmio.fbmode = (data & 0x80);
   mmio.fb     = (data & 0x07);
+
+  unsigned addr = mmio.fb << 20;
+  Memory &access = mmio_access(addr);
+
+  if(mmio.fbmode == 0) {
+       bus.map(Bus::MapMode::Linear, 0xa0, 0xbf, 0x8000, 0xffff, memory::vsprom, 0x300000);
+    sa1bus.map(Bus::MapMode::Linear, 0xa0, 0xbf, 0x8000, 0xffff, memory::vsprom, 0x300000);
+  } else {
+       bus.map(Bus::MapMode::Linear, 0xa0, 0xbf, 0x8000, 0xffff, access, addr);
+    sa1bus.map(Bus::MapMode::Linear, 0xa0, 0xbf, 0x8000, 0xffff, access, addr);
+  }
+
+     bus.map(Bus::MapMode::Linear, 0xf0, 0xff, 0x0000, 0xffff, access, addr);
+  sa1bus.map(Bus::MapMode::Linear, 0xf0, 0xff, 0x0000, 0xffff, access, addr);
 }
 
 //(BMAPS) S-CPU BW-RAM address mapping
 void SA1::mmio_w2224(uint8 data) {
   mmio.sbm = (data & 0x1f);
+
+  bus.map(Bus::MapMode::Linear, 0x00, 0x3f, 0x6000, 0x7fff, memory::cc1bwram, mmio.sbm * 0x2000, 0x2000);
+  bus.map(Bus::MapMode::Linear, 0x80, 0xbf, 0x6000, 0x7fff, memory::cc1bwram, mmio.sbm * 0x2000, 0x2000);
 }
 
 //(BMAP) SA-1 BW-RAM address mapping
 void SA1::mmio_w2225(uint8 data) {
   mmio.sw46 = (data & 0x80);
   mmio.cbm  = (data & 0x7f);
+
+  if(mmio.sw46 == 0) {
+    //$[40-43]:[0000-ffff] x  32 projection
+    sa1bus.map(Bus::MapMode::Linear, 0x00, 0x3f, 0x6000, 0x7fff, memory::sa1bwram, (mmio.cbm & 0x1f) * 0x2000, 0x2000);
+    sa1bus.map(Bus::MapMode::Linear, 0x80, 0xbf, 0x6000, 0x7fff, memory::sa1bwram, (mmio.cbm & 0x1f) * 0x2000, 0x2000);
+  } else {
+    //$[60-6f]:[0000-ffff] x 128 projection
+    sa1bus.map(Bus::MapMode::Linear, 0x00, 0x3f, 0x6000, 0x7fff, memory::bitmapram, mmio.cbm * 0x2000, 0x2000);
+    sa1bus.map(Bus::MapMode::Linear, 0x80, 0xbf, 0x6000, 0x7fff, memory::bitmapram, mmio.cbm * 0x2000, 0x2000);
+  }
 }
 
 //(SWBE) S-CPU BW-RAM write enable
@@ -217,7 +294,7 @@ void SA1::mmio_w2231(uint8 data) {
   mmio.dmasize = (data >> 2) & 7;
   mmio.dmacb   = (data & 0x03);
 
-  if(mmio.chdend) cpubwram.dma = false;
+  if(mmio.chdend) memory::cc1bwram.dma = false;
   if(mmio.dmasize > 5) mmio.dmasize = 5;
   if(mmio.dmacb   > 2) mmio.dmacb   = 2;
 }
@@ -414,18 +491,18 @@ uint8 SA1::mmio_r230b() { return mmio.overflow << 7; }
 
 //(VDPL) variable-length data read port low
 uint8 SA1::mmio_r230c() {
-  uint32 data = (vbr_read(mmio.va + 0) <<  0)
-              | (vbr_read(mmio.va + 1) <<  8)
-              | (vbr_read(mmio.va + 2) << 16);
+  uint32 data = (vbrbus.read(mmio.va + 0) <<  0)
+              | (vbrbus.read(mmio.va + 1) <<  8)
+              | (vbrbus.read(mmio.va + 2) << 16);
   data >>= mmio.vbit;
   return data >> 0;
 }
 
 //(VDPH) variable-length data read port high
 uint8 SA1::mmio_r230d() {
-  uint32 data = (vbr_read(mmio.va + 0) <<  0)
-              | (vbr_read(mmio.va + 1) <<  8)
-              | (vbr_read(mmio.va + 2) << 16);
+  uint32 data = (vbrbus.read(mmio.va + 0) <<  0)
+              | (vbrbus.read(mmio.va + 1) <<  8)
+              | (vbrbus.read(mmio.va + 2) << 16);
   data >>= mmio.vbit;
 
   if(mmio.hl == 1) {
@@ -444,7 +521,7 @@ uint8 SA1::mmio_r230e() {
 }
 
 uint8 SA1::mmio_read(unsigned addr) {
-  (co_active() == cpu.thread ? cpu.synchronize_coprocessors() : synchronize_cpu());
+  (co_active() == scheduler.thread_cpu ? scheduler.sync_cpucop() : scheduler.sync_copcpu());
   addr &= 0xffff;
 
   switch(addr) {
@@ -469,7 +546,7 @@ uint8 SA1::mmio_read(unsigned addr) {
 }
 
 void SA1::mmio_write(unsigned addr, uint8 data) {
-  (co_active() == cpu.thread ? cpu.synchronize_coprocessors() : synchronize_cpu());
+  (co_active() == scheduler.thread_cpu ? scheduler.sync_cpucop() : scheduler.sync_copcpu());
   addr &= 0xffff;
 
   switch(addr) {

bsnes/chip/sa1/mmio/mmio.hpp

@@ -1,5 +1,6 @@
 uint8 mmio_read(unsigned addr);
 void mmio_write(unsigned addr, uint8 data);
+Memory& mmio_access(unsigned &addr);
 
 struct MMIO {
   //$2200 CCNT
@@ -63,19 +64,19 @@ struct MMIO {
 
   //$2220 CXB
   bool cbmode;
-  unsigned cb;
+  uint8 cb;
 
   //$2221 DXB
   bool dbmode;
-  unsigned db;
+  uint8 db;
 
   //$2222 EXB
   bool ebmode;
-  unsigned eb;
+  uint8 eb;
 
   //$2223 FXB
   bool fbmode;
-  unsigned fb;
+  uint8 fb;
 
   //$2224 BMAPS
   uint8 sbm;

bsnes/chip/sa1/sa1.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define SA1_CPP
 namespace SNES {
@@ -11,8 +11,6 @@ SA1 sa1;
 #include "memory/memory.cpp"
 #include "mmio/mmio.cpp"
 
-void SA1::Enter() { sa1.enter(); }
-
 void SA1::enter() {
   while(true) {
     if(scheduler.sync == Scheduler::SynchronizeMode::All) {
@@ -22,7 +20,7 @@ void SA1::enter() {
     if(mmio.sa1_rdyb || mmio.sa1_resb) {
       //SA-1 co-processor is asleep
       tick();
-      synchronize_cpu();
+      scheduler.sync_copcpu();
       continue;
     }
 
@@ -63,8 +61,8 @@ void SA1::last_cycle() {
 }
 
 void SA1::interrupt(uint16 vector) {
-  SA1::op_read(regs.pc.d);
-  SA1::op_io();
+  op_read(regs.pc.d);
+  op_io();
   if(!regs.e) op_writestack(regs.pc.b);
   op_writestack(regs.pc.h);
   op_writestack(regs.pc.l);
@@ -80,8 +78,8 @@ bool SA1::interrupt_pending() {
 }
 
 void SA1::tick() {
-  step(2);
-  if(++status.tick_counter == 0) synchronize_cpu();
+  scheduler.addclocks_cop(2);
+  if(++status.tick_counter == 0) scheduler.sync_copcpu();
 
   //adjust counters:
   //note that internally, status counters are in clocks;
@@ -118,25 +116,23 @@ void SA1::trigger_irq() {
 void SA1::init() {
 }
 
-void SA1::load() {
-}
-
-void SA1::unload() {
+void SA1::enable() {
 }
 
 void SA1::power() {
   regs.a = regs.x = regs.y = 0x0000;
   regs.s = 0x01ff;
+
   reset();
 }
 
 void SA1::reset() {
-  create(SA1::Enter, system.cpu_frequency());
-
-  cpubwram.dma = false;
-  for(unsigned addr = 0; addr < iram.size(); addr++) {
-    iram.write(addr, 0x00);
+  memory::cc1bwram.dma = false;
+  for(unsigned addr = 0; addr < memory::iram.size(); addr++) {
+    memory::iram.write(addr, 0x00);
   }
+  vbrbus.init();
+  sa1bus.init();
 
   regs.pc.d = 0x000000;
   regs.x.h  = 0x00;
@@ -221,15 +217,15 @@ void SA1::reset() {
   mmio.vcnt = 0x0000;
 
   //$2220-2223 CXB, DXB, EXB, FXB
-  mmio.cbmode = 1;
-  mmio.dbmode = 1;
-  mmio.ebmode = 1;
-  mmio.fbmode = 1;
+  mmio.cbmode = 0;
+  mmio.dbmode = 0;
+  mmio.ebmode = 0;
+  mmio.fbmode = 0;
 
   mmio.cb = 0x00;
   mmio.db = 0x01;
-  mmio.eb = 0x00;
-  mmio.fb = 0x01;
+  mmio.eb = 0x02;
+  mmio.fb = 0x03;
 
   //$2224 BMAPS
   mmio.sbm = 0x00;
@@ -324,7 +320,7 @@ void SA1::reset() {
   mmio.overflow = false;
 }
 
-SA1::SA1() : iram(2048) {
+SA1::SA1() {
 }
 
-}
+};

bsnes/chip/sa1/sa1.hpp

@@ -1,6 +1,7 @@
-class SA1 : public Coprocessor, public CPUcore {
+#include "bus/bus.hpp"
+
+class SA1 : public CPUcore, public MMIO {
 public:
-  #include "bus/bus.hpp"
   #include "dma/dma.hpp"
   #include "memory/memory.hpp"
   #include "mmio/mmio.hpp"
@@ -16,7 +17,6 @@ public:
     uint16 hcounter;
   } status;
 
-  static void Enter();
   void enter();
   void interrupt(uint16 vector);
   void tick();
@@ -26,8 +26,7 @@ public:
   alwaysinline bool interrupt_pending();
 
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 
@@ -36,3 +35,4 @@ public:
 };
 
 extern SA1 sa1;
+extern SA1Bus sa1bus;

bsnes/chip/sa1/serialization.cpp

@@ -1,7 +1,6 @@
 #ifdef SA1_CPP
 
 void SA1::serialize(serializer &s) {
-  Processor::serialize(s);
   CPUcore::core_serialize(s);
 
   //sa1.hpp
@@ -15,9 +14,9 @@ void SA1::serialize(serializer &s) {
   s.integer(status.hcounter);
 
   //bus/bus.hpp
-  s.array(iram.data(), iram.size());
+  s.array(memory::iram.data(), memory::iram.size());
 
-  s.integer(cpubwram.dma);
+  s.integer(memory::cc1bwram.dma);
 
   //dma/dma.hpp
   s.integer(dma.line);

bsnes/chip/sdd1/sdd1.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define SDD1_CPP
 namespace SNES {
@@ -8,17 +8,15 @@ SDD1 sdd1;
 #include "serialization.cpp"
 #include "sdd1emu.cpp"
 
-void SDD1::init() {
-}
+void SDD1::init() {}
 
-void SDD1::load() {
+void SDD1::enable() {
   //hook S-CPU DMA MMIO registers to gather information for struct dma[];
-  //buffer address and transfer size information for use in SDD1::mcu_read()
-  bus.map(Bus::MapMode::Direct, 0x00, 0x3f, 0x4300, 0x437f, { &SDD1::mmio_read, &sdd1 }, { &SDD1::mmio_write, &sdd1 });
-  bus.map(Bus::MapMode::Direct, 0x80, 0xbf, 0x4300, 0x437f, { &SDD1::mmio_read, &sdd1 }, { &SDD1::mmio_write, &sdd1 });
-}
-
-void SDD1::unload() {
+  //buffer address and transfer size information for use in SDD1::read()
+  for(unsigned i = 0x4300; i <= 0x437f; i++) {
+    cpu_mmio[i & 0x7f] = memory::mmio.mmio[i - 0x2000];
+    memory::mmio.map(i, *this);
+  }
 }
 
 void SDD1::power() {
@@ -46,7 +44,7 @@ uint8 SDD1::mmio_read(unsigned addr) {
   addr &= 0xffff;
 
   if((addr & 0x4380) == 0x4300) {
-    return cpu.mmio_read(addr);
+    return cpu_mmio[addr & 0x7f]->mmio_read(addr);
   }
 
   switch(addr) {
@@ -72,7 +70,7 @@ void SDD1::mmio_write(unsigned addr, uint8 data) {
       case 5: dma[channel].size = (dma[channel].size &   0xff00) + (data <<  0); break;
       case 6: dma[channel].size = (dma[channel].size &   0x00ff) + (data <<  8); break;
     }
-    return cpu.mmio_write(addr, data);
+    return cpu_mmio[addr & 0x7f]->mmio_write(addr, data);
   }
 
   switch(addr) {
@@ -86,7 +84,7 @@ void SDD1::mmio_write(unsigned addr, uint8 data) {
   }
 }
 
-//SDD1::mcu_read() is mapped to $c0-ff:0000-ffff
+//SDD1::read() is mapped to $[c0-ff]:[0000-ffff]
 //the design is meant to be as close to the hardware design as possible, thus this code
 //avoids adding S-DD1 hooks inside S-CPU::DMA emulation.
 //
@@ -104,7 +102,7 @@ void SDD1::mmio_write(unsigned addr, uint8 data) {
 //
 //the actual S-DD1 transfer can occur on any channel, but it is most likely limited to
 //one transfer per $420b write (for spooling purposes). however, this is not known for certain.
-uint8 SDD1::mcu_read(unsigned addr) {
+uint8 SDD1::read(unsigned addr) {
   if(sdd1_enable & xfer_enable) {
     //at least one channel has S-DD1 decompression enabled ...
     for(unsigned i = 0; i < 8; i++) {
@@ -141,10 +139,10 @@ uint8 SDD1::mcu_read(unsigned addr) {
   }  //S-DD1 decompressor enabled
 
   //S-DD1 decompression mode inactive; return ROM data
-  return cartridge.rom.read(mmc[(addr >> 20) & 3] + (addr & 0x0fffff));
+  return memory::cartrom.read(mmc[(addr >> 20) & 3] + (addr & 0x0fffff));
 }
 
-void SDD1::mcu_write(unsigned addr, uint8 data) {
+void SDD1::write(unsigned addr, uint8 data) {
 }
 
 SDD1::SDD1() {
@@ -153,4 +151,4 @@ SDD1::SDD1() {
 SDD1::~SDD1() {
 }
 
-}
+};

bsnes/chip/sdd1/sdd1.hpp

@@ -1,24 +1,25 @@
 #include "sdd1emu.hpp"
 
-class SDD1 {
+class SDD1 : public MMIO, public Memory {
 public:
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 
   uint8 mmio_read(unsigned addr);
   void mmio_write(unsigned addr, uint8 data);
 
-  uint8 mcu_read(unsigned addr);
-  void mcu_write(unsigned addr, uint8 data);
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
 
   void serialize(serializer&);
   SDD1();
   ~SDD1();
 
 private:
+  MMIO *cpu_mmio[0x80];  //bus spying hooks to glean information for struct dma[]
+
   uint8 sdd1_enable;     //channel bit-mask
   uint8 xfer_enable;     //channel bit-mask
   unsigned mmc[4];       //memory map controller ROM indices

bsnes/chip/sdd1/sdd1emu.cpp

@@ -31,7 +31,7 @@ understood.
 ************************************************************************/
 
 typedef uint8 bool8;
-#define SDD1_read(__addr) (sdd1.mcu_read(__addr))
+#define SDD1_read(__addr) (sdd1.read(__addr))
 
 ////////////////////////////////////////////////////
 

bsnes/chip/spc7110/decomp.cpp

@@ -24,9 +24,9 @@ void SPC7110Decomp::write(uint8 data) {
 }
 
 uint8 SPC7110Decomp::dataread() {
-  unsigned size = cartridge.rom.size() - spc7110.data_rom_offset;
+  unsigned size = memory::cartrom.size() - cartridge.spc7110_data_rom_offset();
   while(decomp_offset >= size) decomp_offset -= size;
-  return cartridge.rom.read(spc7110.data_rom_offset + decomp_offset++);
+  return memory::cartrom.read(cartridge.spc7110_data_rom_offset() + decomp_offset++);
 }
 
 void SPC7110Decomp::init(unsigned mode, unsigned offset, unsigned index) {

bsnes/chip/spc7110/serialization.cpp

@@ -73,7 +73,6 @@ void SPC7110::serialize(serializer &s) {
   s.integer(r4841);
   s.integer(r4842);
 
-  s.array(rtc);
   s.integer(rtc_state);
   s.integer(rtc_mode);
   s.integer(rtc_index);

bsnes/chip/spc7110/spc7110.cpp

@@ -1,25 +1,20 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define SPC7110_CPP
 namespace SNES {
 
 SPC7110 spc7110;
+SPC7110MCU spc7110mcu;
+SPC7110DCU spc7110dcu;
+SPC7110RAM spc7110ram;
 
 #include "serialization.cpp"
 #include "decomp.cpp"
 
 const unsigned SPC7110::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
 
-void SPC7110::init() {
-}
-
-void SPC7110::load() {
-  for(unsigned n = 0; n < 20; n++) rtc[n] = 0xff;
-  if(cartridge.has_spc7110rtc()) cartridge.nvram.append({ ".rtc", rtc, 20 });
-}
-
-void SPC7110::unload() {
-}
+void SPC7110::init() {}
+void SPC7110::enable() {}
 
 void SPC7110::power() {
   reset();
@@ -89,9 +84,9 @@ void SPC7110::reset() {
 }
 
 unsigned SPC7110::datarom_addr(unsigned addr) {
-  unsigned size = cartridge.rom.size() - data_rom_offset;
+  unsigned size = memory::cartrom.size() - cartridge.spc7110_data_rom_offset();
   while(addr >= size) addr -= size;
-  return data_rom_offset + addr;
+  return cartridge.spc7110_data_rom_offset() + addr;
 }
 
 unsigned SPC7110::data_pointer()   { return r4811 + (r4812 << 8) + (r4813 << 16); }
@@ -101,13 +96,17 @@ void SPC7110::set_data_pointer(unsigned addr) { r4811 = addr; r4812 = addr >> 8;
 void SPC7110::set_data_adjust(unsigned addr)  { r4814 = addr; r4815 = addr >> 8; }
 
 void SPC7110::update_time(int offset) {
-  time_t rtc_time = (rtc[16] << 0) | (rtc[17] << 8) | (rtc[18] << 16) | (rtc[19] << 24);
+  time_t rtc_time
+  = (memory::cartrtc.read(16) <<  0)
+  | (memory::cartrtc.read(17) <<  8)
+  | (memory::cartrtc.read(18) << 16)
+  | (memory::cartrtc.read(19) << 24);
   time_t current_time = time(0) - offset;
 
-  //sizeof(time_t) is platform-dependent; though rtc[] needs to be platform-agnostic.
+  //sizeof(time_t) is platform-dependent; though memory::cartrtc needs to be platform-agnostic.
   //yet platforms with 32-bit signed time_t will overflow every ~68 years. handle this by
   //accounting for overflow at the cost of 1-bit precision (to catch underflow). this will allow
-  //rtc[] timestamp to remain valid for up to ~34 years from the last update, even if
+  //memory::cartrtc timestamp to remain valid for up to ~34 years from the last update, even if
   //time_t overflows. calculation should be valid regardless of number representation, time_t size,
   //or whether time_t is signed or unsigned.
   time_t diff
@@ -117,17 +116,17 @@ void SPC7110::update_time(int offset) {
   if(diff > std::numeric_limits<time_t>::max() / 2) diff = 0;            //compensate for underflow
 
   bool update = true;
-  if(rtc[13] & 1) update = false;  //do not update if CR0 timer disable flag is set
-  if(rtc[15] & 3) update = false;  //do not update if CR2 timer disable flags are set
+  if(memory::cartrtc.read(13) & 1) update = false;  //do not update if CR0 timer disable flag is set
+  if(memory::cartrtc.read(15) & 3) update = false;  //do not update if CR2 timer disable flags are set
 
   if(diff > 0 && update == true) {
-    unsigned second  = rtc[ 0] + rtc[ 1] * 10;
-    unsigned minute  = rtc[ 2] + rtc[ 3] * 10;
-    unsigned hour    = rtc[ 4] + rtc[ 5] * 10;
-    unsigned day     = rtc[ 6] + rtc[ 7] * 10;
-    unsigned month   = rtc[ 8] + rtc[ 9] * 10;
-    unsigned year    = rtc[10] + rtc[11] * 10;
-    unsigned weekday = rtc[12];
+    unsigned second  = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
+    unsigned minute  = memory::cartrtc.read( 2) + memory::cartrtc.read( 3) * 10;
+    unsigned hour    = memory::cartrtc.read( 4) + memory::cartrtc.read( 5) * 10;
+    unsigned day     = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
+    unsigned month   = memory::cartrtc.read( 8) + memory::cartrtc.read( 9) * 10;
+    unsigned year    = memory::cartrtc.read(10) + memory::cartrtc.read(11) * 10;
+    unsigned weekday = memory::cartrtc.read(12);
 
     day--;
     month--;
@@ -170,25 +169,25 @@ void SPC7110::update_time(int offset) {
     month++;
     year %= 100;
 
-    rtc[ 0] = second % 10;
-    rtc[ 1] = second / 10;
-    rtc[ 2] = minute % 10;
-    rtc[ 3] = minute / 10;
-    rtc[ 4] = hour % 10;
-    rtc[ 5] = hour / 10;
-    rtc[ 6] = day % 10;
-    rtc[ 7] = day / 10;
-    rtc[ 8] = month % 10;
-    rtc[ 9] = month / 10;
-    rtc[10] = year % 10;
-    rtc[11] = (year / 10) % 10;
-    rtc[12] = weekday % 7;
+    memory::cartrtc.write( 0, second % 10);
+    memory::cartrtc.write( 1, second / 10);
+    memory::cartrtc.write( 2, minute % 10);
+    memory::cartrtc.write( 3, minute / 10);
+    memory::cartrtc.write( 4, hour % 10);
+    memory::cartrtc.write( 5, hour / 10);
+    memory::cartrtc.write( 6, day % 10);
+    memory::cartrtc.write( 7, day / 10);
+    memory::cartrtc.write( 8, month % 10);
+    memory::cartrtc.write( 9, month / 10);
+    memory::cartrtc.write(10, year % 10);
+    memory::cartrtc.write(11, (year / 10) % 10);
+    memory::cartrtc.write(12, weekday % 7);
   }
 
-  rtc[16] = current_time >>  0;
-  rtc[17] = current_time >>  8;
-  rtc[18] = current_time >> 16;
-  rtc[19] = current_time >> 24;
+  memory::cartrtc.write(16, current_time >>  0);
+  memory::cartrtc.write(17, current_time >>  8);
+  memory::cartrtc.write(18, current_time >> 16);
+  memory::cartrtc.write(19, current_time >> 24);
 }
 
 uint8 SPC7110::mmio_read(unsigned addr) {
@@ -240,7 +239,7 @@ uint8 SPC7110::mmio_read(unsigned addr) {
         set_data_adjust(adjust + 1);
       }
 
-      uint8 data = cartridge.rom.read(datarom_addr(adjustaddr));
+      uint8 data = memory::cartrom.read(datarom_addr(adjustaddr));
       if(!(r4818 & 2)) {
         unsigned increment = (r4818 & 1) ? data_increment() : 1;
         if(r4818 & 4) increment = (int16)increment;  //16-bit sign extend
@@ -269,7 +268,7 @@ uint8 SPC7110::mmio_read(unsigned addr) {
       unsigned adjust = data_adjust();
       if(r4818 & 8) adjust = (int16)adjust;  //16-bit sign extend
 
-      uint8 data = cartridge.rom.read(datarom_addr(addr + adjust));
+      uint8 data = memory::cartrom.read(datarom_addr(addr + adjust));
       if((r4818 & 0x60) == 0x60) {
         if((r4818 & 16) == 0) {
           set_data_pointer(addr + adjust);
@@ -325,7 +324,7 @@ uint8 SPC7110::mmio_read(unsigned addr) {
       if(rtc_state == RTCS_Inactive || rtc_state == RTCS_ModeSelect) return 0x00;
 
       r4842 = 0x80;
-      uint8 data = rtc[rtc_index];
+      uint8 data = memory::cartrtc.read(rtc_index);
       rtc_index = (rtc_index + 1) & 15;
       return data;
     }
@@ -359,10 +358,10 @@ void SPC7110::mmio_write(unsigned addr, uint8 data) {
       unsigned index   = (r4804 << 2);
       unsigned length  = (r4809 + (r480a << 8));
       unsigned addr    = datarom_addr(table + index);
-      unsigned mode    = (cartridge.rom.read(addr + 0));
-      unsigned offset  = (cartridge.rom.read(addr + 1) << 16)
-                       + (cartridge.rom.read(addr + 2) <<  8)
-                       + (cartridge.rom.read(addr + 3) <<  0);
+      unsigned mode    = (memory::cartrom.read(addr + 0));
+      unsigned offset  = (memory::cartrom.read(addr + 1) << 16)
+                       + (memory::cartrom.read(addr + 2) <<  8)
+                       + (memory::cartrom.read(addr + 3) <<  0);
 
       decomp.init(mode, offset, (r4805 + (r4806 << 8)) << mode);
       r480c = 0x80;
@@ -598,10 +597,10 @@ void SPC7110::mmio_write(unsigned addr, uint8 data) {
             if(data & 8) {
               update_time();
 
-              unsigned second = rtc[ 0] + rtc[ 1] * 10;
+              unsigned second = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
               //clear seconds
-              rtc[0] = 0;
-              rtc[1] = 0;
+              memory::cartrtc.write(0, 0);
+              memory::cartrtc.write(1, 0);
 
               if(second >= 30) update_time(+60);
             }
@@ -610,21 +609,21 @@ void SPC7110::mmio_write(unsigned addr, uint8 data) {
           //control register 2
           if(rtc_index == 15) {
             //disable timer and clear second counter
-            if((data & 1) && !(rtc[15] & 1)) {
+            if((data & 1) && !(memory::cartrtc.read(15) & 1)) {
               update_time();
 
               //clear seconds
-              rtc[0] = 0;
-              rtc[1] = 0;
+              memory::cartrtc.write(0, 0);
+              memory::cartrtc.write(1, 0);
             }
 
             //disable timer
-            if((data & 2) && !(rtc[15] & 2)) {
+            if((data & 2) && !(memory::cartrtc.read(15) & 2)) {
               update_time();
             }
           }
 
-          rtc[rtc_index] = data & 15;
+          memory::cartrtc.write(rtc_index, data & 15);
           rtc_index = (rtc_index + 1) & 15;
         } break;
       } //switch(rtc_state)
@@ -635,41 +634,49 @@ void SPC7110::mmio_write(unsigned addr, uint8 data) {
 SPC7110::SPC7110() {
 }
 
-//============
-//SPC7110::MCU
-//============
+//==========
+//SPC7110MCU
+//==========
 
-uint8 SPC7110::mcu_read(unsigned addr) {
-  if(addr <= 0xdfffff) return cartridge.rom.read(dx_offset + (addr & 0x0fffff));
-  if(addr <= 0xefffff) return cartridge.rom.read(ex_offset + (addr & 0x0fffff));
-  if(addr <= 0xffffff) return cartridge.rom.read(fx_offset + (addr & 0x0fffff));
+unsigned SPC7110MCU::size() const {
+  return 0x300000;
+}
+
+uint8 SPC7110MCU::read(unsigned addr) {
+  if(addr <= 0xdfffff) return memory::cartrom.read(spc7110.dx_offset + (addr & 0x0fffff));
+  if(addr <= 0xefffff) return memory::cartrom.read(spc7110.ex_offset + (addr & 0x0fffff));
+  if(addr <= 0xffffff) return memory::cartrom.read(spc7110.fx_offset + (addr & 0x0fffff));
   return cpu.regs.mdr;
 }
 
-void SPC7110::mcu_write(unsigned addr, uint8 data) {
+void SPC7110MCU::write(unsigned addr, uint8 data) {
 }
 
-//============
-//SPC7110::DCU
-//============
+//==========
+//SPC7110DCU
+//==========
 
-uint8 SPC7110::dcu_read(unsigned) {
-  return mmio_read(0x4800);
+uint8 SPC7110DCU::read(unsigned) {
+  return spc7110.mmio_read(0x4800);
 }
 
-void SPC7110::dcu_write(unsigned, uint8) {
+void SPC7110DCU::write(unsigned, uint8) {
 }
 
-//============
-//SPC7110::RAM
-//============
+//==========
+//SPC7110RAM
+//==========
 
-uint8 SPC7110::ram_read(unsigned addr) {
-  return cartridge.ram.read(addr & 0x1fff);
+unsigned SPC7110RAM::size() const {
+  return 0x2000;
 }
 
-void SPC7110::ram_write(unsigned addr, uint8 data) {
-  if(r4830 & 0x80) cartridge.ram.write(addr & 0x1fff, data);
+uint8 SPC7110RAM::read(unsigned addr) {
+  return memory::cartram.read(addr & 0x1fff);
 }
 
+void SPC7110RAM::write(unsigned addr, uint8 data) {
+  if(spc7110.r4830 & 0x80) memory::cartram.write(addr & 0x1fff, data);
 }
+
+};

bsnes/chip/spc7110/spc7110.hpp

@@ -17,14 +17,10 @@
 
 #include "decomp.hpp"
 
-class SPC7110 {
+class SPC7110 : public MMIO {
 public:
-  uint8 rtc[20];
-  unsigned data_rom_offset;
-
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 
@@ -42,15 +38,6 @@ public:
   uint8 mmio_read(unsigned addr);
   void mmio_write(unsigned addr, uint8 data);
 
-  uint8 mcu_read(unsigned addr);
-  void mcu_write(unsigned addr, uint8 data);
-
-  uint8 dcu_read(unsigned);
-  void dcu_write(unsigned, uint8);
-
-  uint8 ram_read(unsigned addr);
-  void ram_write(unsigned addr, uint8 data);
-
   //spc7110decomp
   void decomp_init();
   uint8 decomp_read();
@@ -141,6 +128,32 @@ private:
   unsigned rtc_index;
 
   static const unsigned months[12];
+  friend class SPC7110MCU;
+  friend class SPC7110DCU;
+  friend class SPC7110RAM;
+};
+
+class SPC7110MCU : public Memory {
+public:
+  unsigned size() const;
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+};
+
+class SPC7110DCU : public Memory {
+public:
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+};
+
+class SPC7110RAM : public Memory {
+public:
+  unsigned size() const;
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
 };
 
 extern SPC7110 spc7110;
+extern SPC7110MCU spc7110mcu;
+extern SPC7110DCU spc7110dcu;
+extern SPC7110RAM spc7110ram;

bsnes/chip/srtc/serialization.cpp

@@ -1,7 +1,6 @@
 #ifdef SRTC_CPP
 
 void SRTC::serialize(serializer &s) {
-  s.array(rtc);
   s.integer(rtc_mode);
   s.integer(rtc_index);
 }

bsnes/chip/srtc/srtc.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define SRTC_CPP
 namespace SNES {
@@ -12,12 +12,7 @@ const unsigned SRTC::months[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30,
 void SRTC::init() {
 }
 
-void SRTC::load() {
-  for(unsigned n = 0; n < 20; n++) rtc[n] = 0xff;
-  cartridge.nvram.append({ ".rtc", rtc, 20 });
-}
-
-void SRTC::unload() {
+void SRTC::enable() {
 }
 
 void SRTC::power() {
@@ -31,13 +26,17 @@ void SRTC::reset() {
 }
 
 void SRTC::update_time() {
-  time_t rtc_time = (rtc[16] << 0) | (rtc[17] << 8) | (rtc[18] << 16) | (rtc[19] << 24);
+  time_t rtc_time
+  = (memory::cartrtc.read(16) <<  0)
+  | (memory::cartrtc.read(17) <<  8)
+  | (memory::cartrtc.read(18) << 16)
+  | (memory::cartrtc.read(19) << 24);
   time_t current_time = time(0);
 
-  //sizeof(time_t) is platform-dependent; though rtc[] needs to be platform-agnostic.
+  //sizeof(time_t) is platform-dependent; though memory::cartrtc needs to be platform-agnostic.
   //yet platforms with 32-bit signed time_t will overflow every ~68 years. handle this by
   //accounting for overflow at the cost of 1-bit precision (to catch underflow). this will allow
-  //rtc[] timestamp to remain valid for up to ~34 years from the last update, even if
+  //memory::cartrtc timestamp to remain valid for up to ~34 years from the last update, even if
   //time_t overflows. calculation should be valid regardless of number representation, time_t size,
   //or whether time_t is signed or unsigned.
   time_t diff
@@ -47,13 +46,13 @@ void SRTC::update_time() {
   if(diff > std::numeric_limits<time_t>::max() / 2) diff = 0;            //compensate for underflow
 
   if(diff > 0) {
-    unsigned second  = rtc[ 0] + rtc[ 1] * 10;
-    unsigned minute  = rtc[ 2] + rtc[ 3] * 10;
-    unsigned hour    = rtc[ 4] + rtc[ 5] * 10;
-    unsigned day     = rtc[ 6] + rtc[ 7] * 10;
-    unsigned month   = rtc[ 8];
-    unsigned year    = rtc[ 9] + rtc[10] * 10 + rtc[11] * 100;
-    unsigned weekday = rtc[12];
+    unsigned second  = memory::cartrtc.read( 0) + memory::cartrtc.read( 1) * 10;
+    unsigned minute  = memory::cartrtc.read( 2) + memory::cartrtc.read( 3) * 10;
+    unsigned hour    = memory::cartrtc.read( 4) + memory::cartrtc.read( 5) * 10;
+    unsigned day     = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
+    unsigned month   = memory::cartrtc.read( 8);
+    unsigned year    = memory::cartrtc.read( 9) + memory::cartrtc.read(10) * 10 + memory::cartrtc.read(11) * 100;
+    unsigned weekday = memory::cartrtc.read(12);
 
     day--;
     month--;
@@ -96,25 +95,25 @@ void SRTC::update_time() {
     month++;
     year -= 1000;
 
-    rtc[ 0] = second % 10;
-    rtc[ 1] = second / 10;
-    rtc[ 2] = minute % 10;
-    rtc[ 3] = minute / 10;
-    rtc[ 4] = hour % 10;
-    rtc[ 5] = hour / 10;
-    rtc[ 6] = day % 10;
-    rtc[ 7] = day / 10;
-    rtc[ 8] = month;
-    rtc[ 9] = year % 10;
-    rtc[10] = (year / 10) % 10;
-    rtc[11] = year / 100;
-    rtc[12] = weekday % 7;
+    memory::cartrtc.write( 0, second % 10);
+    memory::cartrtc.write( 1, second / 10);
+    memory::cartrtc.write( 2, minute % 10);
+    memory::cartrtc.write( 3, minute / 10);
+    memory::cartrtc.write( 4, hour % 10);
+    memory::cartrtc.write( 5, hour / 10);
+    memory::cartrtc.write( 6, day % 10);
+    memory::cartrtc.write( 7, day / 10);
+    memory::cartrtc.write( 8, month);
+    memory::cartrtc.write( 9, year % 10);
+    memory::cartrtc.write(10, (year / 10) % 10);
+    memory::cartrtc.write(11, year / 100);
+    memory::cartrtc.write(12, weekday % 7);
   }
 
-  rtc[16] = current_time >>  0;
-  rtc[17] = current_time >>  8;
-  rtc[18] = current_time >> 16;
-  rtc[19] = current_time >> 24;
+  memory::cartrtc.write(16, current_time >>  0);
+  memory::cartrtc.write(17, current_time >>  8);
+  memory::cartrtc.write(18, current_time >> 16);
+  memory::cartrtc.write(19, current_time >> 24);
 }
 
 //returns day of week for specified date
@@ -156,7 +155,7 @@ unsigned SRTC::weekday(unsigned year, unsigned month, unsigned day) {
   return (sum + 1) % 7;  //1900-01-01 was a Monday
 }
 
-uint8 SRTC::read(unsigned addr) {
+uint8 SRTC::mmio_read(unsigned addr) {
   addr &= 0xffff;
 
   if(addr == 0x2800) {
@@ -170,14 +169,14 @@ uint8 SRTC::read(unsigned addr) {
       rtc_index = -1;
       return 0x0f;
     } else {
-      return rtc[rtc_index++];
+      return memory::cartrtc.read(rtc_index++);
     }
   }
 
   return cpu.regs.mdr;
 }
 
-void SRTC::write(unsigned addr, uint8 data) {
+void SRTC::mmio_write(unsigned addr, uint8 data) {
   addr &= 0xffff;
 
   if(addr == 0x2801) {
@@ -198,16 +197,16 @@ void SRTC::write(unsigned addr, uint8 data) {
 
     if(rtc_mode == RtcWrite) {
       if(rtc_index >= 0 && rtc_index < 12) {
-        rtc[rtc_index++] = data;
+        memory::cartrtc.write(rtc_index++, data);
 
         if(rtc_index == 12) {
           //day of week is automatically calculated and written
-          unsigned day   = rtc[ 6] + rtc[ 7] * 10;
-          unsigned month = rtc[ 8];
-          unsigned year  = rtc[ 9] + rtc[10] * 10 + rtc[11] * 100;
+          unsigned day   = memory::cartrtc.read( 6) + memory::cartrtc.read( 7) * 10;
+          unsigned month = memory::cartrtc.read( 8);
+          unsigned year  = memory::cartrtc.read( 9) + memory::cartrtc.read(10) * 10 + memory::cartrtc.read(11) * 100;
           year += 1000;
 
-          rtc[rtc_index++] = weekday(year, month, day);
+          memory::cartrtc.write(rtc_index++, weekday(year, month, day));
         }
       }
     } else if(rtc_mode == RtcCommand) {
@@ -217,7 +216,7 @@ void SRTC::write(unsigned addr, uint8 data) {
       } else if(data == 4) {
         rtc_mode = RtcReady;
         rtc_index = -1;
-        for(unsigned i = 0; i < 13; i++) rtc[i] = 0;
+        for(unsigned i = 0; i < 13; i++) memory::cartrtc.write(i, 0);
       } else {
         //unknown behavior
         rtc_mode = RtcReady;
@@ -229,4 +228,4 @@ void SRTC::write(unsigned addr, uint8 data) {
 SRTC::SRTC() {
 }
 
-}
+};

bsnes/chip/srtc/srtc.hpp

@@ -1,15 +1,12 @@
-class SRTC {
+class SRTC : public MMIO {
 public:
-  uint8 rtc[20];
-
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 
-  uint8 read(unsigned addr);
-  void write(unsigned addr, uint8 data);
+  uint8 mmio_read(unsigned addr);
+  void mmio_write(unsigned addr, uint8 data);
 
   void serialize(serializer&);
   SRTC();

bsnes/chip/st0010/data.hpp

@@ -0,0 +1,130 @@
+#ifdef ST0010_CPP
+
+const int16 ST0010::sin_table[256] = {
+   0x0000,  0x0324,  0x0648,  0x096a,  0x0c8c,  0x0fab,  0x12c8,  0x15e2,
+   0x18f9,  0x1c0b,  0x1f1a,  0x2223,  0x2528,  0x2826,  0x2b1f,  0x2e11,
+   0x30fb,  0x33df,  0x36ba,  0x398c,  0x3c56,  0x3f17,  0x41ce,  0x447a,
+   0x471c,  0x49b4,  0x4c3f,  0x4ebf,  0x5133,  0x539b,  0x55f5,  0x5842,
+   0x5a82,  0x5cb3,  0x5ed7,  0x60eb,  0x62f1,  0x64e8,  0x66cf,  0x68a6,
+   0x6a6d,  0x6c23,  0x6dc9,  0x6f5e,  0x70e2,  0x7254,  0x73b5,  0x7504,
+   0x7641,  0x776b,  0x7884,  0x7989,  0x7a7c,  0x7b5c,  0x7c29,  0x7ce3,
+   0x7d89,  0x7e1d,  0x7e9c,  0x7f09,  0x7f61,  0x7fa6,  0x7fd8,  0x7ff5,
+   0x7fff,  0x7ff5,  0x7fd8,  0x7fa6,  0x7f61,  0x7f09,  0x7e9c,  0x7e1d,
+   0x7d89,  0x7ce3,  0x7c29,  0x7b5c,  0x7a7c,  0x7989,  0x7884,  0x776b,
+   0x7641,  0x7504,  0x73b5,  0x7254,  0x70e2,  0x6f5e,  0x6dc9,  0x6c23,
+   0x6a6d,  0x68a6,  0x66cf,  0x64e8,  0x62f1,  0x60eb,  0x5ed7,  0x5cb3,
+   0x5a82,  0x5842,  0x55f5,  0x539b,  0x5133,  0x4ebf,  0x4c3f,  0x49b4,
+   0x471c,  0x447a,  0x41ce,  0x3f17,  0x3c56,  0x398c,  0x36ba,  0x33df,
+   0x30fb,  0x2e11,  0x2b1f,  0x2826,  0x2528,  0x2223,  0x1f1a,  0x1c0b,
+   0x18f8,  0x15e2,  0x12c8,  0x0fab,  0x0c8c,  0x096a,  0x0648,  0x0324,
+   0x0000, -0x0324, -0x0648, -0x096b, -0x0c8c, -0x0fab, -0x12c8, -0x15e2,
+  -0x18f9, -0x1c0b, -0x1f1a, -0x2223, -0x2528, -0x2826, -0x2b1f, -0x2e11,
+  -0x30fb, -0x33df, -0x36ba, -0x398d, -0x3c56, -0x3f17, -0x41ce, -0x447a,
+  -0x471c, -0x49b4, -0x4c3f, -0x4ebf, -0x5133, -0x539b, -0x55f5, -0x5842,
+  -0x5a82, -0x5cb3, -0x5ed7, -0x60ec, -0x62f1, -0x64e8, -0x66cf, -0x68a6,
+  -0x6a6d, -0x6c23, -0x6dc9, -0x6f5e, -0x70e2, -0x7254, -0x73b5, -0x7504,
+  -0x7641, -0x776b, -0x7884, -0x7989, -0x7a7c, -0x7b5c, -0x7c29, -0x7ce3,
+  -0x7d89, -0x7e1d, -0x7e9c, -0x7f09, -0x7f61, -0x7fa6, -0x7fd8, -0x7ff5,
+  -0x7fff, -0x7ff5, -0x7fd8, -0x7fa6, -0x7f61, -0x7f09, -0x7e9c, -0x7e1d,
+  -0x7d89, -0x7ce3, -0x7c29, -0x7b5c, -0x7a7c, -0x7989, -0x7883, -0x776b,
+  -0x7641, -0x7504, -0x73b5, -0x7254, -0x70e2, -0x6f5e, -0x6dc9, -0x6c23,
+  -0x6a6d, -0x68a6, -0x66cf, -0x64e8, -0x62f1, -0x60eb, -0x5ed7, -0x5cb3,
+  -0x5a82, -0x5842, -0x55f5, -0x539a, -0x5133, -0x4ebf, -0x4c3f, -0x49b3,
+  -0x471c, -0x447a, -0x41cd, -0x3f17, -0x3c56, -0x398c, -0x36b9, -0x33de,
+  -0x30fb, -0x2e10, -0x2b1f, -0x2826, -0x2527, -0x2223, -0x1f19, -0x1c0b,
+  -0x18f8, -0x15e2, -0x12c8, -0x0fab, -0x0c8b, -0x096a, -0x0647, -0x0324
+};
+
+const int16 ST0010::mode7_scale[176] = {
+  0x0380,  0x0325,  0x02da,  0x029c,  0x0268,  0x023b,  0x0215,  0x01f3,
+  0x01d5,  0x01bb,  0x01a3,  0x018e,  0x017b,  0x016a,  0x015a,  0x014b,
+  0x013e,  0x0132,  0x0126,  0x011c,  0x0112,  0x0109,  0x0100,  0x00f8,
+  0x00f0,  0x00e9,  0x00e3,  0x00dc,  0x00d6,  0x00d1,  0x00cb,  0x00c6,
+  0x00c1,  0x00bd,  0x00b8,  0x00b4,  0x00b0,  0x00ac,  0x00a8,  0x00a5,
+  0x00a2,  0x009e,  0x009b,  0x0098,  0x0095,  0x0093,  0x0090,  0x008d,
+  0x008b,  0x0088,  0x0086,  0x0084,  0x0082,  0x0080,  0x007e,  0x007c,
+  0x007a,  0x0078,  0x0076,  0x0074,  0x0073,  0x0071,  0x006f,  0x006e,
+  0x006c,  0x006b,  0x0069,  0x0068,  0x0067,  0x0065,  0x0064,  0x0063,
+  0x0062,  0x0060,  0x005f,  0x005e,  0x005d,  0x005c,  0x005b,  0x005a,
+  0x0059,  0x0058,  0x0057,  0x0056,  0x0055,  0x0054,  0x0053,  0x0052,
+  0x0051,  0x0051,  0x0050,  0x004f,  0x004e,  0x004d,  0x004d,  0x004c,
+  0x004b,  0x004b,  0x004a,  0x0049,  0x0048,  0x0048,  0x0047,  0x0047,
+  0x0046,  0x0045,  0x0045,  0x0044,  0x0044,  0x0043,  0x0042,  0x0042,
+  0x0041,  0x0041,  0x0040,  0x0040,  0x003f,  0x003f,  0x003e,  0x003e,
+  0x003d,  0x003d,  0x003c,  0x003c,  0x003b,  0x003b,  0x003a,  0x003a,
+  0x003a,  0x0039,  0x0039,  0x0038,  0x0038,  0x0038,  0x0037,  0x0037,
+  0x0036,  0x0036,  0x0036,  0x0035,  0x0035,  0x0035,  0x0034,  0x0034,
+  0x0034,  0x0033,  0x0033,  0x0033,  0x0032,  0x0032,  0x0032,  0x0031,
+  0x0031,  0x0031,  0x0030,  0x0030,  0x0030,  0x0030,  0x002f,  0x002f,
+  0x002f,  0x002e,  0x002e,  0x002e,  0x002e,  0x002d,  0x002d,  0x002d,
+  0x002d,  0x002c,  0x002c,  0x002c,  0x002c,  0x002b,  0x002b,  0x002b
+};
+
+const uint8 ST0010::arctan[32][32] = {
+  { 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
+    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 },
+  { 0x80, 0xa0, 0xad, 0xb3, 0xb6, 0xb8, 0xb9, 0xba, 0xbb, 0xbb, 0xbc, 0xbc, 0xbd, 0xbd, 0xbd, 0xbd,
+    0xbd, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbe, 0xbf, 0xbf, 0xbf, 0xbf },
+  { 0x80, 0x93, 0xa0, 0xa8, 0xad, 0xb0, 0xb3, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xb9, 0xba, 0xba, 0xbb,
+    0xbb, 0xbb, 0xbb, 0xbc, 0xbc, 0xbc, 0xbc, 0xbc, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd, 0xbd },
+  { 0x80, 0x8d, 0x98, 0xa0, 0xa6, 0xaa, 0xad, 0xb0, 0xb1, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb7, 0xb8,
+    0xb8, 0xb9, 0xb9, 0xba, 0xba, 0xba, 0xba, 0xbb, 0xbb, 0xbb, 0xbb, 0xbb, 0xbc, 0xbc, 0xbc, 0xbc },
+  { 0x80, 0x8a, 0x93, 0x9a, 0xa0, 0xa5, 0xa8, 0xab, 0xad, 0xaf, 0xb0, 0xb2, 0xb3, 0xb4, 0xb5, 0xb5,
+    0xb6, 0xb7, 0xb7, 0xb8, 0xb8, 0xb8, 0xb9, 0xb9, 0xb9, 0xba, 0xba, 0xba, 0xba, 0xba, 0xbb, 0xbb },
+  { 0x80, 0x88, 0x90, 0x96, 0x9b, 0xa0, 0xa4, 0xa7, 0xa9, 0xab, 0xad, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3,
+    0xb4, 0xb4, 0xb5, 0xb6, 0xb6, 0xb6, 0xb7, 0xb7, 0xb8, 0xb8, 0xb8, 0xb9, 0xb9, 0xb9, 0xb9, 0xb9 },
+  { 0x80, 0x87, 0x8d, 0x93, 0x98, 0x9c, 0xa0, 0xa3, 0xa6, 0xa8, 0xaa, 0xac, 0xad, 0xae, 0xb0, 0xb0,
+    0xb1, 0xb2, 0xb3, 0xb4, 0xb4, 0xb5, 0xb5, 0xb6, 0xb6, 0xb6, 0xb7, 0xb7, 0xb7, 0xb8, 0xb8, 0xb8 },
+  { 0x80, 0x86, 0x8b, 0x90, 0x95, 0x99, 0x9d, 0xa0, 0xa3, 0xa5, 0xa7, 0xa9, 0xaa, 0xac, 0xad, 0xae,
+    0xaf, 0xb0, 0xb1, 0xb2, 0xb2, 0xb3, 0xb3, 0xb4, 0xb4, 0xb5, 0xb5, 0xb6, 0xb6, 0xb6, 0xb7, 0xb7 },
+  { 0x80, 0x85, 0x8a, 0x8f, 0x93, 0x97, 0x9a, 0x9d, 0xa0, 0xa2, 0xa5, 0xa6, 0xa8, 0xaa, 0xab, 0xac,
+    0xad, 0xae, 0xaf, 0xb0, 0xb0, 0xb1, 0xb2, 0xb2, 0xb3, 0xb3, 0xb4, 0xb4, 0xb5, 0xb5, 0xb5, 0xb5 },
+  { 0x80, 0x85, 0x89, 0x8d, 0x91, 0x95, 0x98, 0x9b, 0x9e, 0xa0, 0xa0, 0xa4, 0xa6, 0xa7, 0xa9, 0xaa,
+    0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb0, 0xb1, 0xb1, 0xb2, 0xb2, 0xb3, 0xb3, 0xb4, 0xb4, 0xb4 },
+  { 0x80, 0x84, 0x88, 0x8c, 0x90, 0x93, 0x96, 0x99, 0x9b, 0x9e, 0xa0, 0xa2, 0xa4, 0xa5, 0xa7, 0xa8,
+    0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xaf, 0xb0, 0xb0, 0xb1, 0xb2, 0xb2, 0xb2, 0xb3, 0xb3 },
+  { 0x80, 0x84, 0x87, 0x8b, 0x8e, 0x91, 0x94, 0x97, 0x9a, 0x9c, 0x9e, 0xa0, 0xa2, 0xa3, 0xa5, 0xa6,
+    0xa7, 0xa9, 0xaa, 0xab, 0xac, 0xac, 0xad, 0xae, 0xae, 0xaf, 0xb0, 0xb0, 0xb1, 0xb1, 0xb2, 0xb2 },
+  { 0x80, 0x83, 0x87, 0x8a, 0x8d, 0x90, 0x93, 0x96, 0x98, 0x9a, 0x9c, 0x9e, 0xa0, 0xa2, 0xa3, 0xa5,
+    0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xac, 0xad, 0xae, 0xae, 0xaf, 0xb0, 0xb0, 0xb0, 0xb1 },
+  { 0x80, 0x83, 0x86, 0x89, 0x8c, 0x8f, 0x92, 0x94, 0x96, 0x99, 0x9b, 0x9d, 0x9e, 0xa0, 0xa2, 0xa3,
+    0xa4, 0xa5, 0xa7, 0xa8, 0xa9, 0xa9, 0xaa, 0xab, 0xac, 0xac, 0xad, 0xae, 0xae, 0xaf, 0xaf, 0xb0 },
+  { 0x80, 0x83, 0x86, 0x89, 0x8b, 0x8e, 0x90, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9d, 0x9e, 0xa0, 0xa1,
+    0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xaa, 0xab, 0xac, 0xad, 0xad, 0xae, 0xae, 0xaf },
+  { 0x80, 0x83, 0x85, 0x88, 0x8b, 0x8d, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9b, 0x9d, 0x9f, 0xa0,
+    0xa1, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa8, 0xa9, 0xaa, 0xab, 0xab, 0xac, 0xad, 0xad, 0xae },
+  { 0x80, 0x83, 0x85, 0x88, 0x8a, 0x8c, 0x8f, 0x91, 0x93, 0x95, 0x97, 0x99, 0x9a, 0x9c, 0x9d, 0x9f,
+    0xa0, 0xa1, 0xa2, 0xa3, 0xa5, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xaa, 0xab, 0xab, 0xac, 0xad },
+  { 0x80, 0x82, 0x85, 0x87, 0x89, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x97, 0x99, 0x9b, 0x9c, 0x9d,
+    0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa8, 0xa9, 0xaa, 0xaa, 0xab, 0xac },
+  { 0x80, 0x82, 0x85, 0x87, 0x89, 0x8b, 0x8d, 0x8f, 0x91, 0x93, 0x95, 0x96, 0x98, 0x99, 0x9b, 0x9c,
+    0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa7, 0xa8, 0xa9, 0xa9, 0xaa, 0xab },
+  { 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x95, 0x97, 0x98, 0x9a, 0x9b,
+    0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa6, 0xa7, 0xa8, 0xa8, 0xa9, 0xaa },
+  { 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x91, 0x93, 0x94, 0x96, 0x97, 0x99, 0x9a,
+    0x9b, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa5, 0xa6, 0xa7, 0xa7, 0xa8, 0xa9 },
+  { 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8b, 0x8d, 0x8f, 0x90, 0x92, 0x94, 0x95, 0x97, 0x98, 0x99,
+    0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa4, 0xa5, 0xa6, 0xa6, 0xa7, 0xa8 },
+  { 0x80, 0x82, 0x84, 0x86, 0x87, 0x89, 0x8b, 0x8d, 0x8e, 0x90, 0x91, 0x93, 0x94, 0x96, 0x97, 0x98,
+    0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3, 0xa3, 0xa4, 0xa5, 0xa6, 0xa6, 0xa7 },
+  { 0x80, 0x82, 0x84, 0x85, 0x87, 0x89, 0x8a, 0x8c, 0x8e, 0x8f, 0x91, 0x92, 0x94, 0x95, 0x96, 0x98,
+    0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa2, 0xa3, 0xa4, 0xa5, 0xa5, 0xa6 },
+  { 0x80, 0x82, 0x83, 0x85, 0x87, 0x88, 0x8a, 0x8c, 0x8d, 0x8f, 0x90, 0x92, 0x93, 0x94, 0x96, 0x97,
+    0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa2, 0xa3, 0xa4, 0xa5, 0xa5 },
+  { 0x80, 0x82, 0x83, 0x85, 0x86, 0x88, 0x8a, 0x8b, 0x8d, 0x8e, 0x90, 0x91, 0x92, 0x94, 0x95, 0x96,
+    0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa2, 0xa3, 0xa4, 0xa4 },
+  { 0x80, 0x82, 0x83, 0x85, 0x86, 0x88, 0x89, 0x8b, 0x8c, 0x8e, 0x8f, 0x90, 0x92, 0x93, 0x94, 0x95,
+    0x96, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa2, 0xa3, 0xa4 },
+  { 0x80, 0x82, 0x83, 0x85, 0x86, 0x87, 0x89, 0x8a, 0x8c, 0x8d, 0x8e, 0x90, 0x91, 0x92, 0x93, 0x95,
+    0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9e, 0x9f, 0xa0, 0xa1, 0xa1, 0xa2, 0xa3 },
+  { 0x80, 0x81, 0x83, 0x84, 0x86, 0x87, 0x89, 0x8a, 0x8b, 0x8d, 0x8e, 0x8f, 0x90, 0x92, 0x93, 0x94,
+    0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9e, 0x9f, 0xa0, 0xa1, 0xa1, 0xa2 },
+  { 0x80, 0x81, 0x83, 0x84, 0x86, 0x87, 0x88, 0x8a, 0x8b, 0x8c, 0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93,
+    0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x9f, 0xa0, 0xa1, 0xa1 },
+  { 0x80, 0x81, 0x83, 0x84, 0x85, 0x87, 0x88, 0x89, 0x8b, 0x8c, 0x8d, 0x8e, 0x90, 0x91, 0x92, 0x93,
+    0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0x9f, 0xa0, 0xa1 },
+  { 0x80, 0x81, 0x83, 0x84, 0x85, 0x87, 0x88, 0x89, 0x8a, 0x8c, 0x8d, 0x8e, 0x8f, 0x90, 0x91, 0x92,
+    0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9c, 0x9d, 0x9e, 0x9f, 0x9f, 0xa0 }
+};
+
+#endif

bsnes/chip/st0010/opcodes.cpp

@@ -0,0 +1,261 @@
+#ifdef ST0010_CPP
+
+//ST-0010 emulation code - Copyright (C) 2003 The Dumper, Matthew Kendora, Overload, Feather
+//bsnes port - Copyright (C) 2007 byuu
+
+void ST0010::op_01(int16 x0, int16 y0, int16 &x1, int16 &y1, int16 &quadrant, int16 &theta) {
+  if((x0 < 0) && (y0 < 0)) {
+    x1 = -x0;
+    y1 = -y0;
+    quadrant = -0x8000;
+  } else if(x0 < 0) {
+    x1 = y0;
+    y1 = -x0;
+    quadrant = -0x4000;
+  } else if(y0 < 0) {
+    x1 = -y0;
+    y1 = x0;
+    quadrant = 0x4000;
+  } else {
+    x1 = x0;
+    y1 = y0;
+    quadrant = 0x0000;
+  }
+
+  while((x1 > 0x1f) || (y1 > 0x1f)) {
+    if(x1 > 1) { x1 >>= 1; }
+    if(y1 > 1) { y1 >>= 1; }
+  }
+
+  if(y1 == 0) { quadrant += 0x4000; }
+
+  theta = (arctan[y1][x1] << 8) ^ quadrant;
+}
+
+//
+
+void ST0010::op_01() {
+  int16 x0 = readw(0x0000);
+  int16 y0 = readw(0x0002);
+  int16 x1, y1, quadrant, theta;
+
+  op_01(x0, y0, x1, y1, quadrant, theta);
+
+  writew(0x0000, x1);
+  writew(0x0002, y1);
+  writew(0x0004, quadrant);
+//writew(0x0006, y0);  //Overload's docs note this write occurs, SNES9x disagrees
+  writew(0x0010, theta);
+}
+
+void ST0010::op_02() {
+  int16 positions = readw(0x0024);
+  uint16 *places  = (uint16*)(ram + 0x0040);
+  uint16 *drivers = (uint16*)(ram + 0x0080);
+
+  bool sorted;
+  uint16 temp;
+  if(positions > 1) {
+    do {
+      sorted = true;
+      for(int i = 0; i < positions - 1; i++) {
+        if(places[i] < places[i + 1]) {
+          temp = places[i + 1];
+          places[i + 1] = places[i];
+          places[i] = temp;
+
+          temp = drivers[i + 1];
+          drivers[i + 1] = drivers[i];
+          drivers[i] = temp;
+
+          sorted = false;
+        }
+      }
+      positions--;
+    } while(!sorted);
+  }
+}
+
+void ST0010::op_03() {
+  int16 x0 = readw(0x0000);
+  int16 y0 = readw(0x0002);
+  int16 multiplier = readw(0x0004);
+  int32 x1, y1;
+
+  x1 = x0 * multiplier << 1;
+  y1 = y0 * multiplier << 1;
+
+  writed(0x0010, x1);
+  writed(0x0014, y1);
+}
+
+void ST0010::op_04() {
+  int16 x = readw(0x0000);
+  int16 y = readw(0x0002);
+  int16 square;
+  //calculate the vector length of (x,y)
+  square = (int16)sqrt((double)(y * y + x * x));
+
+  writew(0x0010, square);
+}
+
+void ST0010::op_05() {
+  int32 dx, dy;
+  int16 a1, b1, c1;
+  uint16 o1;
+  bool wrap = false;
+
+  //target (x,y) coordinates
+  int16 ypos_max = readw(0x00c0);
+  int16 xpos_max = readw(0x00c2);
+
+  //current coordinates and direction
+  int32 ypos = readd(0x00c4);
+  int32 xpos = readd(0x00c8);
+  uint16 rot = readw(0x00cc);
+
+  //physics
+  uint16 speed = readw(0x00d4);
+  uint16 accel = readw(0x00d6);
+  uint16 speed_max = readw(0x00d8);
+
+  //special condition acknowledgement
+  int16 system = readw(0x00da);
+  int16 flags = readw(0x00dc);
+
+  //new target coordinates
+  int16 ypos_new = readw(0x00de);
+  int16 xpos_new = readw(0x00e0);
+
+  //mask upper bit
+  xpos_new &= 0x7fff;
+
+  //get the current distance
+  dx = xpos_max - (xpos >> 16);
+  dy = ypos_max - (ypos >> 16);
+
+  //quirk: clear and move in9
+  writew(0x00d2, 0xffff);
+  writew(0x00da, 0x0000);
+
+  //grab the target angle
+  op_01(dy, dx, a1, b1, c1, (int16&)o1);
+
+  //check for wrapping
+  if(abs(o1 - rot) > 0x8000) {
+    o1 += 0x8000;
+    rot += 0x8000;
+    wrap = true;
+  }
+
+  uint16 old_speed = speed;
+
+  //special case
+  if(abs(o1 - rot) == 0x8000) {
+    speed = 0x100;
+  }
+
+  //slow down for sharp curves
+  else if(abs(o1 - rot) >= 0x1000) {
+  uint32 slow = abs(o1 - rot);
+    slow >>= 4;  //scaling
+    speed -= slow;
+  }
+
+  //otherwise accelerate
+  else {
+    speed += accel;
+    if(speed > speed_max) {
+      speed = speed_max;  //clip speed
+    }
+  }
+
+  //prevent negative/positive overflow
+  if(abs(old_speed - speed) > 0x8000) {
+    if(old_speed < speed) { speed = 0; }
+    else speed = 0xff00;
+  }
+
+  //adjust direction by so many degrees
+  //be careful of negative adjustments
+  if((o1 > rot && (o1 - rot) > 0x80) || (o1 < rot && (rot - o1) >= 0x80)) {
+    if(o1 < rot) { rot -= 0x280; }
+    else if(o1 > rot) { rot += 0x280; }
+  }
+
+  //turn off wrapping
+  if(wrap) { rot -= 0x8000; }
+
+  //now check the distances (store for later)
+  dx = (xpos_max << 16) - xpos;
+  dy = (ypos_max << 16) - ypos;
+  dx >>= 16;
+  dy >>= 16;
+
+  //if we're in so many units of the target, signal it
+  if((system && (dy <= 6 && dy >= -8) && (dx <= 126 && dx >= -128)) || (!system && (dx <= 6 && dx >= -8) && (dy <= 126 && dy >= -128))) {
+    //announce our new destination and flag it
+    xpos_max = xpos_new & 0x7fff;
+    ypos_max = ypos_new;
+    flags |= 0x08;
+  }
+
+  //update position
+  xpos -= (cos(rot) * 0x400 >> 15) * (speed >> 8) << 1;
+  ypos -= (sin(rot) * 0x400 >> 15) * (speed >> 8) << 1;
+
+  //quirk: mask upper byte
+  xpos &= 0x1fffffff;
+  ypos &= 0x1fffffff;
+
+  writew(0x00c0, ypos_max);
+  writew(0x00c2, xpos_max);
+  writed(0x00c4, ypos);
+  writed(0x00c8, xpos);
+  writew(0x00cc, rot);
+  writew(0x00d4, speed);
+  writew(0x00dc, flags);
+}
+
+void ST0010::op_06() {
+  int16 multiplicand = readw(0x0000);
+  int16 multiplier = readw(0x0002);
+  int32 product;
+
+  product = multiplicand * multiplier << 1;
+
+  writed(0x0010, product);
+}
+
+void ST0010::op_07() {
+  int16 theta = readw(0x0000);
+
+  int16 data;
+  for(int i = 0, offset = 0; i < 176; i++) {
+    data = mode7_scale[i] * cos(theta) >> 15;
+    writew(0x00f0 + offset, data);
+    writew(0x0510 + offset, data);
+
+    data = mode7_scale[i] * sin(theta) >> 15;
+    writew(0x0250 + offset, data);
+    if(data) { data = ~data; }
+    writew(0x03b0 + offset, data);
+
+    offset += 2;
+  }
+}
+
+void ST0010::op_08() {
+  int16 x0 = readw(0x0000);
+  int16 y0 = readw(0x0002);
+  int16 theta = readw(0x0004);
+  int16 x1, y1;
+
+  x1 = (y0 * sin(theta) >> 15) + (x0 * cos(theta) >> 15);
+  y1 = (y0 * cos(theta) >> 15) - (x0 * sin(theta) >> 15);
+
+  writew(0x0010, x1);
+  writew(0x0012, y1);
+}
+
+#endif

bsnes/chip/st0010/serialization.cpp

@@ -0,0 +1,7 @@
+#ifdef ST0010_CPP
+
+void ST0010::serialize(serializer &s) {
+  s.array(ram);
+}
+
+#endif

bsnes/chip/st0010/st0010.cpp

@@ -0,0 +1,93 @@
+#include <../base.hpp>
+
+#define ST0010_CPP
+namespace SNES {
+
+ST0010 st0010;
+
+#include "data.hpp"
+#include "opcodes.cpp"
+#include "serialization.cpp"
+
+void ST0010::init() {
+}
+
+void ST0010::enable() {
+}
+
+int16 ST0010::sin(int16 theta) {
+  return sin_table[(theta >> 8) & 0xff];
+}
+
+int16 ST0010::cos(int16 theta) {
+  return sin_table[((theta + 0x4000) >> 8) & 0xff];
+}
+
+uint8 ST0010::readb(uint16 addr) {
+  return ram[addr & 0xfff];
+}
+
+uint16 ST0010::readw(uint16 addr) {
+  return (readb(addr + 0) <<  0) |
+         (readb(addr + 1) <<  8);
+}
+
+uint32 ST0010::readd(uint16 addr) {
+  return (readb(addr + 0) <<  0) |
+         (readb(addr + 1) <<  8) |
+         (readb(addr + 2) << 16) |
+         (readb(addr + 3) << 24);
+}
+
+void ST0010::writeb(uint16 addr, uint8 data) {
+  ram[addr & 0xfff] = data;
+}
+
+void ST0010::writew(uint16 addr, uint16 data) {
+  writeb(addr + 0, data >> 0);
+  writeb(addr + 1, data >> 8);
+}
+
+void ST0010::writed(uint16 addr, uint32 data) {
+  writeb(addr + 0, data >>  0);
+  writeb(addr + 1, data >>  8);
+  writeb(addr + 2, data >> 16);
+  writeb(addr + 3, data >> 24);
+}
+
+//
+
+void ST0010::power() {
+  reset();
+}
+
+void ST0010::reset() {
+  memset(ram, 0x00, sizeof ram);
+}
+
+//
+
+uint8 ST0010::read(unsigned addr) {
+  return readb(addr);
+}
+
+void ST0010::write(unsigned addr, uint8 data) {
+  writeb(addr, data);
+
+  if((addr & 0xfff) == 0x0021 && (data & 0x80)) {
+    switch(ram[0x0020]) {
+      case 0x01: op_01(); break;
+      case 0x02: op_02(); break;
+      case 0x03: op_03(); break;
+      case 0x04: op_04(); break;
+      case 0x05: op_05(); break;
+      case 0x06: op_06(); break;
+      case 0x07: op_07(); break;
+      case 0x08: op_08(); break;
+    }
+
+    ram[0x0021] &= ~0x80;
+  }
+}
+
+};

bsnes/chip/st0010/st0010.hpp

@@ -0,0 +1,44 @@
+class ST0010 : public Memory {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+
+  uint8 read(unsigned addr);
+  void write(unsigned addr, uint8 data);
+
+  void serialize(serializer&);
+
+private:
+  uint8 ram[0x1000];
+  static const int16 sin_table[256];
+  static const int16 mode7_scale[176];
+  static const uint8 arctan[32][32];
+
+  //interfaces to sin table
+  int16 sin(int16 theta);
+  int16 cos(int16 theta);
+
+  //interfaces to ram buffer
+  uint8  readb (uint16 addr);
+  uint16 readw (uint16 addr);
+  uint32 readd (uint16 addr);
+  void   writeb(uint16 addr, uint8  data);
+  void   writew(uint16 addr, uint16 data);
+  void   writed(uint16 addr, uint32 data);
+
+  //opcodes
+  void op_01();
+  void op_02();
+  void op_03();
+  void op_04();
+  void op_05();
+  void op_06();
+  void op_07();
+  void op_08();
+
+  void op_01(int16 x0, int16 y0, int16 &x1, int16 &y1, int16 &quadrant, int16 &theta);
+};
+
+extern ST0010 st0010;

bsnes/chip/st0011/st0011.cpp

@@ -0,0 +1,20 @@
+#include <../base.hpp>
+
+#define ST0011_CPP
+namespace SNES {
+
+ST0011 st0011;
+
+void ST0011::init() {
+}
+
+void ST0011::enable() {
+}
+
+void ST0011::power() {
+}
+
+void ST0011::reset() {
+}
+
+};

bsnes/chip/st0011/st0011.hpp

@@ -0,0 +1,9 @@
+class ST0011 {
+public:
+  void init();
+  void enable();
+  void power();
+  void reset();
+};
+
+extern ST0011 st0011;

bsnes/chip/st0018/st0018.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define ST0018_CPP
 namespace SNES {
@@ -48,10 +48,7 @@ void ST0018::mmio_write(unsigned addr, uint8 data) {
 void ST0018::init() {
 }
 
-void ST0018::load() {
-}
-
-void ST0018::unload() {
+void ST0018::enable() {
 }
 
 void ST0018::power() {
@@ -123,4 +120,4 @@ void ST0018::op_query_chip() {
   regs.r3800 = 0x00;
 }
 
-}
+};

bsnes/chip/st0018/st0018.hpp

@@ -1,8 +1,7 @@
-class ST0018 {
+class ST0018 : public MMIO {
 public:
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
 

bsnes/chip/superfx/bus/bus.cpp

@@ -0,0 +1,97 @@
+#ifdef SUPERFX_CPP
+
+SuperFXBus superfxbus;
+
+namespace memory {
+  SuperFXGSUROM gsurom;
+  SuperFXGSURAM gsuram;
+  SuperFXCPUROM fxrom;
+  SuperFXCPURAM fxram;
+}
+
+void SuperFXBus::init() {
+  map(MapMode::Direct, 0x00, 0xff, 0x0000, 0xffff, memory::memory_unmapped);
+
+  map(MapMode::Linear, 0x00, 0x3f, 0x0000, 0x7fff, memory::gsurom);
+  map(MapMode::Linear, 0x00, 0x3f, 0x8000, 0xffff, memory::gsurom);
+  map(MapMode::Linear, 0x40, 0x5f, 0x0000, 0xffff, memory::gsurom);
+  map(MapMode::Linear, 0x60, 0x7f, 0x0000, 0xffff, memory::gsuram);
+}
+
+//ROM / RAM access from the SuperFX CPU
+
+unsigned SuperFXGSUROM::size() const {
+  return memory::cartrom.size();
+}
+
+uint8 SuperFXGSUROM::read(unsigned addr) {
+  while(!superfx.regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
+    superfx.add_clocks(6);
+    scheduler.sync_copcpu();
+  }
+  return memory::cartrom.read(addr);
+}
+
+void SuperFXGSUROM::write(unsigned addr, uint8 data) {
+  while(!superfx.regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
+    superfx.add_clocks(6);
+    scheduler.sync_copcpu();
+  }
+  memory::cartrom.write(addr, data);
+}
+
+unsigned SuperFXGSURAM::size() const {
+  return memory::cartram.size();
+}
+
+uint8 SuperFXGSURAM::read(unsigned addr) {
+  while(!superfx.regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
+    superfx.add_clocks(6);
+    scheduler.sync_copcpu();
+  }
+  return memory::cartram.read(addr);
+}
+
+void SuperFXGSURAM::write(unsigned addr, uint8 data) {
+  while(!superfx.regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
+    superfx.add_clocks(6);
+    scheduler.sync_copcpu();
+  }
+  memory::cartram.write(addr, data);
+}
+
+//ROM / RAM access from the S-CPU
+
+unsigned SuperFXCPUROM::size() const {
+  return memory::cartrom.size();
+}
+
+uint8 SuperFXCPUROM::read(unsigned addr) {
+  if(superfx.regs.sfr.g && superfx.regs.scmr.ron) {
+    static const uint8_t data[16] = {
+      0x00, 0x01, 0x00, 0x01, 0x04, 0x01, 0x00, 0x01,
+      0x00, 0x01, 0x08, 0x01, 0x00, 0x01, 0x0c, 0x01,
+    };
+    return data[addr & 15];
+  }
+  return memory::cartrom.read(addr);
+}
+
+void SuperFXCPUROM::write(unsigned addr, uint8 data) {
+  memory::cartrom.write(addr, data);
+}
+
+unsigned SuperFXCPURAM::size() const {
+  return memory::cartram.size();
+}
+
+uint8 SuperFXCPURAM::read(unsigned addr) {
+  if(superfx.regs.sfr.g && superfx.regs.scmr.ran) return cpu.regs.mdr;
+  return memory::cartram.read(addr);
+}
+
+void SuperFXCPURAM::write(unsigned addr, uint8 data) {
+  memory::cartram.write(addr, data);
+}
+
+#endif

bsnes/chip/superfx/bus/bus.hpp

@@ -0,0 +1,34 @@
+struct SuperFXBus : Bus {
+  void init();
+};
+
+struct SuperFXGSUROM : Memory {
+  unsigned size() const;
+  uint8 read(unsigned);
+  void write(unsigned, uint8);
+};
+
+struct SuperFXGSURAM : Memory {
+  unsigned size() const;
+  uint8 read(unsigned);
+  void write(unsigned, uint8);
+};
+
+struct SuperFXCPUROM : Memory {
+  unsigned size() const;
+  uint8 read(unsigned);
+  void write(unsigned, uint8);
+};
+
+struct SuperFXCPURAM : Memory {
+  unsigned size() const;
+  uint8 read(unsigned);
+  void write(unsigned, uint8);
+};
+
+namespace memory {
+  extern SuperFXGSUROM gsurom;
+  extern SuperFXGSURAM gsuram;
+  extern SuperFXCPUROM fxrom;
+  extern SuperFXCPURAM fxram;
+}

bsnes/chip/superfx/core/core.cpp

@@ -66,7 +66,7 @@ uint8 SuperFX::rpix(uint8 x, uint8 y) {
   for(unsigned n = 0; n < bpp; n++) {
     unsigned byte = ((n >> 1) << 4) + (n & 1);  // = [n]{ 0, 1, 16, 17, 32, 33, 48, 49 };
     add_clocks(memory_access_speed);
-    data |= ((bus_read(addr + byte) >> x) & 1) << n;
+    data |= ((superfxbus.read(addr + byte) >> x) & 1) << n;
   }
 
   return data;
@@ -95,10 +95,10 @@ void SuperFX::pixelcache_flush(pixelcache_t &cache) {
     if(cache.bitpend != 0xff) {
       add_clocks(memory_access_speed);
       data &= cache.bitpend;
-      data |= bus_read(addr + byte) & ~cache.bitpend;
+      data |= superfxbus.read(addr + byte) & ~cache.bitpend;
     }
     add_clocks(memory_access_speed);
-    bus_write(addr + byte, data);
+    superfxbus.write(addr + byte, data);
   }
 
   cache.bitpend = 0x00;

bsnes/chip/superfx/disasm/disasm.cpp

@@ -36,8 +36,8 @@ void SuperFX::disassemble_opcode(char *output) {
   case id+ 8: case id+ 9: case id+10: case id+11: case id+12: case id+13: case id+14: case id+15
 
 #define op0 regs.pipeline
-#define op1 bus_read((regs.pbr << 16) + regs.r[15] + 0)
-#define op2 bus_read((regs.pbr << 16) + regs.r[15] + 1)
+#define op1 superfxbus.read((regs.pbr << 16) + regs.r[15] + 0)
+#define op2 superfxbus.read((regs.pbr << 16) + regs.r[15] + 1)
 
 void SuperFX::disassemble_alt0(char *output) {
   char t[256] = "";

bsnes/chip/superfx/memory/memory.cpp

@@ -1,41 +1,5 @@
 #ifdef SUPERFX_CPP
 
-uint8 SuperFX::bus_read(unsigned addr) {
-  if((addr & 0xc00000) == 0x000000) {  //$00-3f:0000-7fff, $00-3f:8000-ffff
-    while(!regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
-      add_clocks(6);
-      synchronize_cpu();
-    }
-    return cartridge.rom.read((((addr & 0x3f0000) >> 1) | (addr & 0x7fff)) & rom_mask);
-  }
-
-  if((addr & 0xe00000) == 0x400000) {  //$40-5f:0000-ffff
-    while(!regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
-      add_clocks(6);
-      synchronize_cpu();
-    }
-    return cartridge.rom.read(addr & rom_mask);
-  }
-
-  if((addr & 0xe00000) == 0x600000) {  //$60-7f:0000-ffff
-    while(!regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
-      add_clocks(6);
-      synchronize_cpu();
-    }
-    return cartridge.ram.read(addr & ram_mask);
-  }
-}
-
-void SuperFX::bus_write(unsigned addr, uint8 data) {
-  if((addr & 0xe00000) == 0x600000) {  //$60-7f:0000-ffff
-    while(!regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
-      add_clocks(6);
-      synchronize_cpu();
-    }
-    return cartridge.ram.write(addr & ram_mask, data);
-  }
-}
-
 uint8 SuperFX::op_read(uint16 addr) {
   uint16 offset = addr - regs.cbr;
   if(offset < 512) {
@@ -44,7 +8,7 @@ uint8 SuperFX::op_read(uint16 addr) {
       unsigned sp = (regs.pbr << 16) + ((regs.cbr + dp) & 0xfff0);
       for(unsigned n = 0; n < 16; n++) {
         add_clocks(memory_access_speed);
-        cache.buffer[dp++] = bus_read(sp++);
+        cache.buffer[dp++] = superfxbus.read(sp++);
       }
       cache.valid[offset >> 4] = true;
     } else {
@@ -57,12 +21,12 @@ uint8 SuperFX::op_read(uint16 addr) {
     //$[00-5f]:[0000-ffff] ROM
     rombuffer_sync();
     add_clocks(memory_access_speed);
-    return bus_read((regs.pbr << 16) + addr);
+    return superfxbus.read((regs.pbr << 16) + addr);
   } else {
     //$[60-7f]:[0000-ffff] RAM
     rambuffer_sync();
     add_clocks(memory_access_speed);
-    return bus_read((regs.pbr << 16) + addr);
+    return superfxbus.read((regs.pbr << 16) + addr);
   }
 }
 
@@ -96,9 +60,6 @@ void SuperFX::cache_mmio_write(uint16 addr, uint8 data) {
 }
 
 void SuperFX::memory_reset() {
-  rom_mask = cartridge.rom.size() - 1;
-  ram_mask = cartridge.ram.size() - 1;
-
   for(unsigned n = 0; n < 512; n++) cache.buffer[n] = 0x00;
   for(unsigned n = 0; n < 32; n++) cache.valid[n] = false;
   for(unsigned n = 0; n < 2; n++) {

bsnes/chip/superfx/memory/memory.hpp

@@ -1,8 +1,3 @@
-unsigned rom_mask;  //rom_size - 1
-unsigned ram_mask;  //ram_size - 1
-uint8 bus_read(unsigned addr);
-void bus_write(unsigned addr, uint8 data);
-
 uint8 op_read(uint16 addr);
 alwaysinline uint8 peekpipe();
 alwaysinline uint8 pipe();

bsnes/chip/superfx/mmio/mmio.cpp

@@ -1,7 +1,7 @@
 #ifdef SUPERFX_CPP
 
 uint8 SuperFX::mmio_read(unsigned addr) {
-  cpu.synchronize_coprocessors();
+  scheduler.sync_cpucop();
   addr &= 0xffff;
 
   if(addr >= 0x3100 && addr <= 0x32ff) {
@@ -53,7 +53,7 @@ uint8 SuperFX::mmio_read(unsigned addr) {
 }
 
 void SuperFX::mmio_write(unsigned addr, uint8 data) {
-  cpu.synchronize_coprocessors();
+  scheduler.sync_cpucop();
   addr &= 0xffff;
 
   if(addr >= 0x3100 && addr <= 0x32ff) {

bsnes/chip/superfx/serialization.cpp

@@ -1,8 +1,6 @@
 #ifdef SUPERFX_CPP
 
 void SuperFX::serialize(serializer &s) {
-  Processor::serialize(s);
-
   //superfx.hpp
   s.integer(clockmode);
   s.integer(instruction_counter);

bsnes/chip/superfx/superfx.cpp

@@ -1,4 +1,4 @@
-#include <snes/snes.hpp>
+#include <../base.hpp>
 
 #define SUPERFX_CPP
 namespace SNES {
@@ -13,8 +13,6 @@ namespace SNES {
 
 SuperFX superfx;
 
-void SuperFX::Enter() { superfx.enter(); }
-
 void SuperFX::enter() {
   while(true) {
     if(scheduler.sync == Scheduler::SynchronizeMode::All) {
@@ -23,7 +21,7 @@ void SuperFX::enter() {
 
     if(regs.sfr.g == 0) {
       add_clocks(6);
-      synchronize_cpu();
+      scheduler.sync_copcpu();
       continue;
     }
 
@@ -32,21 +30,18 @@ void SuperFX::enter() {
 
     if(++instruction_counter >= 128) {
       instruction_counter = 0;
-      synchronize_cpu();
+      scheduler.sync_copcpu();
     }
   }
 }
 
 void SuperFX::init() {
   initialize_opcode_table();
-  regs.r[14].on_modify = { &SuperFX::r14_modify, this };
-  regs.r[15].on_modify = { &SuperFX::r15_modify, this };
+  regs.r[14].on_modify = bind(&SuperFX::r14_modify, this);
+  regs.r[15].on_modify = bind(&SuperFX::r15_modify, this);
 }
 
-void SuperFX::load() {
-}
-
-void SuperFX::unload() {
+void SuperFX::enable() {
 }
 
 void SuperFX::power() {
@@ -55,7 +50,7 @@ void SuperFX::power() {
 }
 
 void SuperFX::reset() {
-  create(SuperFX::Enter, system.cpu_frequency());
+  superfxbus.init();
   instruction_counter = 0;
 
   for(unsigned n = 0; n < 16; n++) regs.r[n] = 0x0000;

bsnes/chip/superfx/superfx.hpp

@@ -1,19 +1,20 @@
-class SuperFX : public Coprocessor {
+#include "bus/bus.hpp"
+
+class SuperFX : public MMIO {
 public:
-  #include "bus/bus.hpp"
   #include "core/core.hpp"
   #include "memory/memory.hpp"
   #include "mmio/mmio.hpp"
   #include "timing/timing.hpp"
   #include "disasm/disasm.hpp"
 
-  static void Enter();
   void enter();
+
   void init();
-  void load();
-  void unload();
+  void enable();
   void power();
   void reset();
+
   void serialize(serializer&);
 
 private:
@@ -22,3 +23,4 @@ private:
 };
 
 extern SuperFX superfx;
+extern SuperFXBus superfxbus;

bsnes/chip/superfx/timing/timing.cpp

@@ -5,19 +5,19 @@ void SuperFX::add_clocks(unsigned clocks) {
     regs.romcl -= min(clocks, regs.romcl);
     if(regs.romcl == 0) {
       regs.sfr.r = 0;
-      regs.romdr = bus_read((regs.rombr << 16) + regs.r[14]);
+      regs.romdr = superfxbus.read((regs.rombr << 16) + regs.r[14]);
     }
   }
 
   if(regs.ramcl) {
     regs.ramcl -= min(clocks, regs.ramcl);
     if(regs.ramcl == 0) {
-      bus_write(0x700000 + (regs.rambr << 16) + regs.ramar, regs.ramdr);
+      superfxbus.write(0x700000 + (regs.rambr << 16) + regs.ramar, regs.ramdr);
     }
   }
 
-  step(clocks);
-  synchronize_cpu();
+  scheduler.addclocks_cop(clocks);
+  scheduler.sync_copcpu();
 }
 
 void SuperFX::rombuffer_sync() {
@@ -40,7 +40,7 @@ void SuperFX::rambuffer_sync() {
 
 uint8 SuperFX::rambuffer_read(uint16 addr) {
   rambuffer_sync();
-  return bus_read(0x700000 + (regs.rambr << 16) + addr);
+  return superfxbus.read(0x700000 + (regs.rambr << 16) + addr);
 }
 
 void SuperFX::rambuffer_write(uint16 addr, uint8 data) {