Update to ares v121 release.

I've released ares v121. Because it is not fully complete or stable, it is
released as source code only.

The license is now once again ISC instead of CC-BY-NC-ND.

Master System, WonderSwan, and WonderSwan Color compatibility have increased to
100%, with no remaining known bugs.

The Neo Geo Pocket is very close to 100% now with one issue remaining, where
sound effects sometimes mute in games.

Nintendo 64 compatibility has increased to above 80% thanks to corrections to
controller pak handling.

Several NES and Mega CD fixes have been added. EEPROM support has been added for
the Mega Drive.

Memory cards and paks now pre-format themselves, so you don't have to do so in-
game or in BIOS settings.

The new Neo Geo emulation is slowly improving, but it's still very preliminary
with only seven games fully playable so far.

The Nintendo 64 SM5K and PlayStation HC05 processor cores have been emulated,
but not connected yet due to a lack of information.

Added mouse input support and connected peripheral selection to the GUI, so mice
and light gun games can now be used.

There is now per-system input mapping overlays, so you can map controllers based
on the original system button names.

And lastly as promised, the SNES core has gained optional widescreen support.

Changelog (since v120):

  - Nintendo 64: added Windows ABI support to dynamic recompilers
  - PlayStation: added Windows ABI support to dynamic recompiler
  - Nintendo 64: temporarily disabled 64-bit addressing mode due to issues
  - Nintendo 64: corrected analog stick ranges and emulated octagonal
    boundaries
  - Nintendo 64: code cleanups around memory access functions
  - Nintendo 64: started to implement RDRAM broadcasting (very incomplete
    still)
  - Mega Drive: improved VDP scanline renderer timing
  - M68K: corrected clipping bug in ADD,CMP,SUB instructions
  - Nintendo 64: improved SI scanning of PIF RAM and emulated more flags
  - Nintendo 64: added very accurate controller pak initialization code
  - Nintendo 64: improved controller analog stick approximations [MerryMage]
  - Nintendo 64: added priority queue to delay SI and PI DMA transfers
  - Master System: added bit-perfect YM2413 instrument patch sets
  - Mega Drive: fixed a bug with LINEA and LINEF instructions (should not
    decrement PC)
  - Mega Drive: added EEPROM emulation
  - mia: added Mega Drive and Mega 32X EEPROM database entries
  - nall: added priority_queue::remove(T) support
  - Nintendo 64: reverted 64-bit TLB (not actually present)
  - Neo Geo: initial implementation
  - Neo Geo: many emulation improvements
  - nall: add workaround for compilers that lack __has_builtin
  - Nintendo 64: ignore A15 on controller pak reads and writes
  - Master System: implemented Codemasters, Korea, MSX, Janggun mappers
  - Master System: improved Sega mapper emulation
  - Master System: added initial emulation of port $3e
  - Master System: added support to load BIOSes
  - Master System: initialize stack pointer to 0xfffd when no BIOS loaded
    [Luke Usher]
  - Game Boy Advance: emulated BIOS swap register [MerryMage]
  - Mega Drive: cancel pending IRQs when they are disabled [Jonas Quinn]
  - Mega Drive: fixed handling of VDP field flag [Jonas Quinn]
  - Mega Drive: mask upper bit of VDP sprite Y value when in progressive
    display mode [Jonas Quinn]
  - X24C01, M24Cxx: improve emulation of EEPROM command sequences
  - Famicom: added database entries for Jajamaru Gekimaden and Mazase Top
    Pro PRG-RAM
  - M24Cx: rewrote emulation to be more complete; though still not working
    for Cxx/Cxxx sizes
  - Nintendo 64: try stopping SI polling on recv=0xfe
  - Mega Drive: improved EEPROM emulation
  - Nintendo 64: fixed CPU SCC counter rate [simer]
  - Nintendo 64: added initial emulation of the SM5K processor (not connected
    yet)
  - lucia: update frame rate from the main thread to prevent a race condition
    with GTK
  - Master System: emulated sprite zoom and fifth-sprite status flag
  - Master System: corrected VDP background emulation for mode 4 [fixes
    Codemasters games]
  - Master System: latch VDP background nametable address and scroll registers
    [fixes Desert Speedtrap]
  - Master System: mask CRAM reads to 6-bit in Master System mode [fixes Mercs]
  - Master System: refactored VDP code
  - Z80: swapped IND/INI to post-decrement B, and OUTD/OUTI to pre-decrement B
  - lucia: fixed a crash when loading Game Gear games due to stubbing out
    the BIOS
  - Nintendo 64: fixed cartridge flash memory support
  - Master System: VDP line coincidence should be initialized to $ff [fixes
    Shadow Dancer]
  - Master System: VDP sprite overflow index defaults to $1f, not $00 [fixes
    PGA Tour Golf]
  - SN76489: corrected port latching behavior and noise volume writes [fixes
    Micro Machines]
  - TMS9918: greatly refactored code
  - V9938: greatly refactored code
  - Z80: disassembler fixes
  - lucia: corrected mapping of Master System pause button [fixes Baku
    Baku Panic]
  - nall: disable -Wstringop-overflow for GCC due to compiler heuristics error
  - M68HC05: initial core implementation added
  - M68000: renamed core from M68K
  - Super Famicom: clearing $4200.d0 stops active joypad polling for the rest
    of the frame [Jonas Quinn]
  - Master System: don't evaluate sprites past active display area [fixes
    Rescue Mission]
  - Mega Drive: don't acknowledge VDP IRQs until the CPU triggers them [fixes
    Mega Lo Mania]
  - lucia: begin refactoring input mapping to allow per-system mappings and
    multiple controller types
  - Game Gear: set CPU::in() unmapped return value to MDR; fixes RoboCop 3
    [Jonas Quinn]
  - WonderSwan Color: do not mask screen tilemap base address; fixes Sorobang
    [FPGAzumSpass]
  - Mega Drive: set supervisor mode and clear trace mode for all exceptions;
    fixes Gouketsuji Ichizoku [Jonas Quinn]
  - Mega CD: format BRAM instead of leaving it uninitialized; fixes Popful Mail
    (US)
  - WonderSwan: add patch for Meitantei Conan: Nishi no Meitantei Saidai
    no Kiki!
  - Game Boy: add MBC1#M mapper database entries; fixes Bomber Man Collection,
    Genjin Collection, Momotarou Collection, and Mortal Kombat I & II
  - Neo Geo Pocket: $8118 background register exists even in the K1GE GPU;
    fixes Samurai Shodown
  - Neo Geo Pocket Color: return 0xFF acknowledge byte after flash erase
    command; fixes Puzzle Link 2 and Memories off: Pure
  - Neo Geo Pocket: clear watchdog timer counter on trigger to prevent
    infinite triggering; fixes Neo Baccarat, Neo Cherry Master Color, and
    Neo Mystery Bonus
  - TLCS900H: do not allow interrupts to run between CPDR, LDIR, LDDR
    instructions; fixes Fantastic Night Dreams Cotton
  - Neo Geo Pocket: add all remaining missing I/O registers (not emulated,
    but registers are readable and writable now)
  - Neo Geo Pocket Color: above changes also fixed in-game audio in Crush
    Roller and Dynamite Slugger
  - Mega CD: added 1M mode WRAM swap request flag; fxies AX-101, Earnest Evans,
    and Might & Magic III [TascoDLX]
  - lucia: added input mapping overlays for all remaining systems
  - lucia: added two-player support to all remaining systems
  - TLCS900H: refactored instruction decoder and disassembler using range-case
  - TLCS900H: improved emulation of (PC+d16) addressing mode (LDAR)
  - TMS9918, V9938, SMS VDP: corrected sprite zoom emulation [Jonas Quinn]
  - Neo Geo Pocket: added new debugging modules (flash ROM, I/O accesses,
    system calls)
  - Neo Geo Pocket: improved CPU interrupt logger (prints name of interrupt
    now)
  - Neo Geo Pocket: fixed a critical issue with interrupt priority levels;
    fixes many games
  - Neo Geo Pocket: added stubs for all remaining TMP95C061F I/O registers
    (not emulated yet)
  - Neo Geo Pocket: set CPU I/O port $b1.d2 reads to return 1 (fixes SNK
    Gals' Fighter)
  - Neo Geo Pocket: added stubs for undocumented CPU I/O ports $b6 and $b7
  - Super Famicom: PPU code restructuring
  - Super Famicom: added widescreen (16:9 and 21:9) support to the scanline
    renderer
  - WonderSwan: refactored I/O handlers to use switch/case instead of if tests
  - WonderSwan: rewrote PPU renderer to modularize each component (screen1,
    screen2, sprite, dac, etc)
  - WonderSwan: corrected timers to count down instead of up; fixes timing
    in many games [FPGAzumSpass]
  - WonderSwan: improved screen two window emulation [FPGAzumSpass]
  - hiro: TableView::onContext() is now TableView::onContext(TableViewCell)
    (not supported for Cocoa or Qt yet)
  - lucia: merged code to handle input assignment overlays and controller
    polling for each emulation core
  - lucia: added virtual mouse emulation and added mouse capture support
  - lucia: added support to change devices connected to controller ports
  - Neo Geo Pocket: added database workaround for underdumped Prize Game:
    PP-AA01 Pusher Program (Japan)
  - Neo Geo Pocket: fixed fast boot mode for Neo Cherry Pocket
  - nall/range: added new within() templates
  - V30MZ: emulated instruction prefetch
  - V30MZ: greatly improved instruction timings (thanks to FPGAzumSpass'
    test ROM)
  - WonderSwan: disabling an interrupt source does clear its pending status
    (fixes Digimon Tamers)
  - TLCS900H: improved prefetch handling and instruction timing (still
    imperfect)
  - TLCS900H: improved timing further (still imperfect)

.gitignore

@@ -1,2 +0,0 @@
-higan/profile/WonderSwan.sys/internal.ram
-higan/profile/WonderSwan Color.sys/internal.ram

ares/GNUmakefile

@@ -0,0 +1,97 @@
+ifeq ($(platform),windows)
+  options += -luuid -lkernel32 -luser32 -lgdi32 -lcomctl32 -lcomdlg32 -lshell32
+  options += -Wl,-enable-auto-import
+  options += -Wl,-enable-runtime-pseudo-reloc
+else ifeq ($(platform),macos)
+else ifneq ($(filter $(platform),linux bsd),)
+  options += -Wl,-export-dynamic
+  options += -lX11 -lXext
+else
+  $(error "ares is a library and cannot be built directly.")
+endif
+
+ares.objects := ares
+
+$(object.path)/ares.o: $(ares.path)/ares/ares.cpp
+
+ifeq ($(vulkan),true)
+  flags += -DVULKAN
+endif
+
+ifeq ($(profile),accuracy)
+  flags += -DPROFILE_ACCURACY
+endif
+
+ifeq ($(profile),performance)
+  flags += -DPROFILE_PERFORMANCE
+endif
+
+ifneq ($(filter $(cores),fc),)
+  include $(ares.path)/fc/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),sfc),)
+  include $(ares.path)/sfc/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),n64),)
+  include $(ares.path)/n64/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),sg),)
+  include $(ares.path)/sg/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),ms),)
+  include $(ares.path)/ms/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),md),)
+  include $(ares.path)/md/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),saturn),)
+  include $(ares.path)/saturn/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),ps1),)
+  include $(ares.path)/ps1/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),pce),)
+  include $(ares.path)/pce/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),msx),)
+  include $(ares.path)/msx/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),cv),)
+  include $(ares.path)/cv/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),gb),)
+  include $(ares.path)/gb/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),gba),)
+  include $(ares.path)/gba/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),ws),)
+  include $(ares.path)/ws/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),ng),)
+  include $(ares.path)/ng/GNUmakefile
+endif
+
+ifneq ($(filter $(cores),ngp),)
+  include $(ares.path)/ngp/GNUmakefile
+endif
+
+include $(ares.path)/component/GNUmakefile
+
+flags += $(foreach c,$(call strupper,$(cores)),-DCORE_$c)
+
+ares.objects := $(ares.objects:%=$(object.path)/%.o)

ares/Shaders/AANN.shader/AANN.fs

@@ -0,0 +1,81 @@
+#version 150
+
+//anti-aliased nearest-neighbor
+
+precision highp float;
+
+uniform sampler2D source[];
+uniform vec4 sourceSize[];
+uniform vec4 targetSize[];
+
+in Vertex {
+  vec2 texCoord;
+};
+
+out vec4 fragColor;
+
+vec4 vpow(vec4 n, float e) {
+  return vec4(pow(n.x, e), pow(n.y, e), pow(n.z, e), pow(n.w, e));
+}
+
+vec4 toLQV(vec3 c) {
+  return vec4(c.r, c.g, c.b, c.r * 0.2989 + c.g * 0.5870 + c.b * 0.1140);
+}
+
+vec3 fromLQV(vec4 c) {
+  float f = c.w / (c.r * 0.2989 + c.g * 0.5870 + c.b * 0.1140);
+  return vec3(c.rgb) * f;
+}
+
+vec3 percent(float ssize, float tsize, float coord) {
+  float minfull  = (coord * tsize - 0.5) / tsize * ssize;
+  float maxfull  = (coord * tsize + 0.5) / tsize * ssize;
+  float realfull = floor(maxfull);
+
+  if(minfull > realfull) {
+    return vec3(
+      1,
+      (realfull + 0.5) / ssize,
+      (realfull + 0.5) / ssize
+    );
+  }
+
+  return vec3(
+    (maxfull - realfull) / (maxfull - minfull),
+    (realfull - 0.5) / ssize,
+    (realfull + 0.5) / ssize
+  );
+}
+
+void main() {
+  float srgb  = 2.1;
+  float gamma = 3.0;
+
+  vec3 x = percent(sourceSize[0].x, targetSize[0].x, texCoord.x);
+  vec3 y = percent(sourceSize[0].y, targetSize[0].y, texCoord.y);
+
+  //get points to interpolate across in linear RGB
+  vec4 a = toLQV(vpow(texture(source[0], vec2(x[1], y[1])), srgb).rgb);
+  vec4 b = toLQV(vpow(texture(source[0], vec2(x[2], y[1])), srgb).rgb);
+  vec4 c = toLQV(vpow(texture(source[0], vec2(x[1], y[2])), srgb).rgb);
+  vec4 d = toLQV(vpow(texture(source[0], vec2(x[2], y[2])), srgb).rgb);
+
+  //use perceptual gamma for luminance component
+  a.w = pow(a.w, 1 / gamma);
+  b.w = pow(b.w, 1 / gamma);
+  c.w = pow(c.w, 1 / gamma);
+  d.w = pow(d.w, 1 / gamma);
+
+  //interpolate
+  vec4 gammaLQV =
+    (1.0 - x[0]) * (1.0 - y[0]) * a +
+    (0.0 + x[0]) * (1.0 - y[0]) * b +
+    (1.0 - x[0]) * (0.0 + y[0]) * c +
+    (0.0 + x[0]) * (0.0 + y[0]) * d;
+
+  //convert luminance gamma back to linear
+  gammaLQV.w = pow(gammaLQV.w, gamma);
+
+  //convert color back to sRGB
+  fragColor = vpow(vec4(fromLQV(gammaLQV), 1), 1 / srgb);
+}

ares/Shaders/AANN.shader/manifest.bml

@@ -0,0 +1,8 @@
+input
+  filter: nearest
+
+program
+  fragment: AANN.fs
+
+output
+  filter: nearest

ares/System/MSX/Keyboard/Japanese/layout.bml

@@ -0,0 +1,122 @@
+layout
+  name: Japanese
+
+  //row 0
+  key: 0 わ を
+  key: 1 ! ぬ
+  key: 2 " ふ
+  key: 3 # あ ぁ
+  key: 4 $ う ぅ
+  key: 5 % え ぇ
+  key: 6 & お ぉ
+  key: 7 ’ や ゃ
+
+  //row 1
+  key: 8 ( ゆ ゅ
+  key: 9 ) よ ょ
+  key: - = ほ
+  key: ^ ~ へ
+  key: ¥ | ー
+  key: @ ‘ "
+  key: [ { 。
+  key: ; + れ
+
+  //row 2
+  key: : * け
+  key: ] } む
+  key: , < ね `
+  key: . > る 。
+  key: / ? め .
+  key: - ろ
+  key: A ち
+  key: B こ
+
+  //row 3
+  key: C そ
+  key: D し
+  key: E い ぃ
+  key: F は
+  key: G き
+  key: H く
+  key: I に
+  key: J ま
+
+  //row 4
+  key: K の
+  key: L り
+  key: M も
+  key: N み
+  key: O ら
+  key: P せ
+  key: Q た
+  key: R す
+
+  //row 5
+  key: S と
+  key: T か
+  key: U な
+  key: V ひ
+  key: W て
+  key: X さ
+  key: Y ん
+  key: Z つ っ
+
+  //row 6
+  key: SHIFT
+  key: CTRL
+  key: GRAPH
+  key: CAPS
+  key: かな
+  key: F1 F6
+  key: F2 F7
+  key: F3 F8
+
+  //row 7
+  key: F4 F9
+  key: F5 F10
+  key: ESC
+  key: TAB
+  key: STOP
+  key: BS
+  key: SELECT
+  key: RETURN
+
+  //row 8
+  key: SPACE
+  key: CLS/HOME
+  key: INS
+  key: DEL
+  key: ←
+  key: ↑
+  key: ↓
+  key: →
+
+  //row 9
+  key: *
+  key: +
+  key: /
+  key: 0
+  key: 1
+  key: 2
+  key: 3
+  key: 4
+
+  //row 10
+  key: 5
+  key: 6
+  key: 7
+  key: 8
+  key: 9
+  key: -
+  key: ,
+  key: .
+
+  //row 11
+  key:
+  key: 実行
+  key:
+  key: 取消
+  key:
+  key:
+  key:
+  key:

ares/System/MSX2/Keyboard/Japanese/layout.bml

@@ -0,0 +1,122 @@
+layout
+  name: Japanese
+
+  //row 0
+  key: 0 わ を
+  key: 1 ! ぬ
+  key: 2 " ふ
+  key: 3 # あ ぁ
+  key: 4 $ う ぅ
+  key: 5 % え ぇ
+  key: 6 & お ぉ
+  key: 7 ’ や ゃ
+
+  //row 1
+  key: 8 ( ゆ ゅ
+  key: 9 ) よ ょ
+  key: - = ほ
+  key: ^ ~ へ
+  key: ¥ | ー
+  key: @ ‘ "
+  key: [ { 。
+  key: ; + れ
+
+  //row 2
+  key: : * け
+  key: ] } む
+  key: , < ね `
+  key: . > る 。
+  key: / ? め .
+  key: - ろ
+  key: A ち
+  key: B こ
+
+  //row 3
+  key: C そ
+  key: D し
+  key: E い ぃ
+  key: F は
+  key: G き
+  key: H く
+  key: I に
+  key: J ま
+
+  //row 4
+  key: K の
+  key: L り
+  key: M も
+  key: N み
+  key: O ら
+  key: P せ
+  key: Q た
+  key: R す
+
+  //row 5
+  key: S と
+  key: T か
+  key: U な
+  key: V ひ
+  key: W て
+  key: X さ
+  key: Y ん
+  key: Z つ っ
+
+  //row 6
+  key: SHIFT
+  key: CTRL
+  key: GRAPH
+  key: CAPS
+  key: かな
+  key: F1 F6
+  key: F2 F7
+  key: F3 F8
+
+  //row 7
+  key: F4 F9
+  key: F5 F10
+  key: ESC
+  key: TAB
+  key: STOP
+  key: BS
+  key: SELECT
+  key: RETURN
+
+  //row 8
+  key: SPACE
+  key: CLS/HOME
+  key: INS
+  key: DEL
+  key: ←
+  key: ↑
+  key: ↓
+  key: →
+
+  //row 9
+  key: *
+  key: +
+  key: /
+  key: 0
+  key: 1
+  key: 2
+  key: 3
+  key: 4
+
+  //row 10
+  key: 5
+  key: 6
+  key: 7
+  key: 8
+  key: 9
+  key: -
+  key: ,
+  key: .
+
+  //row 11
+  key:
+  key: 実行
+  key:
+  key: 取消
+  key:
+  key:
+  key:
+  key:

ares/System/Super Famicom/boards.bml

@@ -0,0 +1,970 @@
+database
+  revision: 2020-11-09
+
+//Boards (Production)
+
+database
+  revision: 2020-01-21
+
+board: BANDAI-PT-923
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  slot type=SufamiTurbo
+    rom
+      map address=20-3f,a0-bf:8000-ffff mask=0x8000
+    ram
+      map address=60-6f,e0-ef:0000-ffff
+  slot type=SufamiTurbo
+    rom
+      map address=40-5f,c0-df:0000-ffff mask=0x8000
+    ram
+      map address=70-7d,f0-ff:0000-ffff
+
+board: BSC-1A5B9P-01
+  memory type=RAM content=Save
+    map address=10-17:5000-5fff mask=0xf000
+  processor identifier=MCC
+    map address=00-0f:5000-5fff
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=40-7d,c0-ff:0000-ffff
+      map address=20-3f,a0-bf:6000-7fff
+      memory type=ROM content=Program
+      memory type=RAM content=Download
+      slot type=BSMemory
+
+board: BSC-1A5M-02
+  memory type=ROM content=Program
+    map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
+    map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
+    map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
+    map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+  slot type=BSMemory
+    map address=c0-ef:0000-ffff
+
+board: BSC-1A7M-(01,10)
+  memory type=ROM content=Program
+    map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
+    map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
+    map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
+    map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+  slot type=BSMemory
+    map address=c0-ef:0000-ffff
+
+board: BSC-1J3M-01
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff
+    map address=40-5f,c0-df:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  slot type=BSMemory
+    map address=20-3f,a0-bf:8000-ffff
+    map address=60-7d,e0-ff:0000-ffff
+
+board: BSC-1J5M-01
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff
+    map address=40-5f,c0-df:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  slot type=BSMemory
+    map address=20-3f,a0-bf:8000-ffff
+    map address=60-7d,e0-ff:0000-ffff
+
+board: BSC-1L3B-01
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+      slot type=BSMemory
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: BSC-1L5B-01
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+      slot type=BSMemory
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: SGB-R-10
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+  processor identifier=ICD revision=2
+    map address=00-3f,80-bf:6000-67ff,7000-7fff
+    memory type=ROM content=Boot architecture=SM83
+    slot type=GameBoy
+
+board: SHVC-1A0N-(01,02,10,20,30)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+
+board: SHVC-1A1B-(04,05,06)
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff
+
+board: SHVC-1A1M-(01,10,11,20)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-1A3B-(11,12,13)
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff
+
+board: SHVC-1A3B-20
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-1A3M-(10,20,21,30)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-1A5B-(02,04)
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff
+
+board: SHVC-1A5M-(01,11,20)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-1B0N-(02,03,10)
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  processor architecture=uPD7725
+    map address=30-3f,b0-bf:8000-ffff mask=0x3fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: SHVC-1B5B-02
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff
+  processor architecture=uPD7725
+    map address=20-3f,a0-bf:8000-ffff mask=0x3fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: SHVC-1C0N
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-1f,80-9f:8000-ffff mask=0x8000
+    memory type=RAM content=Save
+      map address=60-7d,e0-ff:0000-ffff
+
+board: SHVC-1C0N5S-01
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-1f,80-9f:8000-ffff mask=0x8000
+    memory type=RAM content=Save
+      map address=60-7d,e0-ff:0000-ffff
+
+board: SHVC-1CA0N5S-01
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+      map address=40-5f,c0-df:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71,f0-f1:0000-ffff
+
+board: SHVC-1CA0N6S-01
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+      map address=40-5f,c0-df:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71,f0-f1:0000-ffff
+
+board: SHVC-1CA6B-01
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+      map address=40-5f,c0-df:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71,f0-f1:0000-ffff
+
+board: SHVC-1CB0N7S-01
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f:8000-ffff mask=0x8000
+      map address=40-5f:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71:0000-ffff
+
+board: SHVC-1CB5B-(01,20)
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f:8000-ffff mask=0x8000
+      map address=40-5f:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71:0000-ffff
+
+board: SHVC-1CB7B-01
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f:8000-ffff mask=0x8000
+      map address=40-5f:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71:0000-ffff
+
+board: SHVC-1DC0N-01
+  processor architecture=HG51BS169
+    map address=00-3f,80-bf:6c00-6fff,7c00-7fff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+    memory type=RAM content=Save
+      map address=70-77:0000-7fff
+    memory type=ROM content=Data architecture=HG51BS169
+    memory type=RAM content=Data architecture=HG51BS169
+      map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
+    oscillator
+
+board: SHVC-1DS0B-20
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  processor architecture=uPD96050
+    map address=60-67,e0-e7:0000-3fff
+    memory type=ROM content=Program architecture=uPD96050
+    memory type=ROM content=Data architecture=uPD96050
+    memory type=RAM content=Data architecture=uPD96050
+      map address=68-6f,e8-ef:0000-7fff mask=0x8000
+    oscillator
+
+board: SHVC-1J0N-(01,10,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+
+board: SHVC-1J1M-(11,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: SHVC-1J3B-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: SHVC-1J3M-(01,11,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: SHVC-1J5M-(01,11,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: SHVC-1K0N-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  processor architecture=uPD7725
+    map address=00-1f,80-9f:6000-7fff mask=0xfff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: SHVC-1K1B-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  processor architecture=uPD7725
+    map address=00-1f,80-9f:6000-7fff mask=0xfff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: SHVC-1K1X-10
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  processor architecture=uPD7725
+    map address=00-1f,80-9f:6000-7fff mask=0xfff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: SHVC-1L0N3S-01
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: SHVC-1L3B-(02,11)
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: SHVC-1L5B-(11,20)
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: SHVC-1N0N-(01,10)
+  processor identifier=SDD1
+    map address=00-3f,80-bf:4800-480f
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+
+board: SHVC-2A0N-01#A
+  memory type=ROM content=Program
+    map address=00-2f,80-af:8000-ffff mask=0x8000
+    map address=40-6f,c0-ef:0000-ffff mask=0x8000
+
+board: SHVC-2A0N-(01,10,11,20)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+
+board: SHVC-2A1M-01
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-2A3B-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-2A3M-01#A
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-2A3M-(01,11,20)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-2A5M-01
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-2B3B-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+  processor architecture=uPD7725
+    map address=60-6f,e0-ef:0000-7fff mask=0x3fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: SHVC-2DC0N-01
+  processor architecture=HG51BS169
+    map address=00-3f,80-bf:6c00-6fff,7c00-7fff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+    memory type=RAM content=Save
+      map address=70-77:0000-7fff
+    memory type=ROM content=Data architecture=HG51BS169
+    memory type=RAM content=Data architecture=HG51BS169
+      map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
+    oscillator
+
+board: SHVC-2E3M-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  processor identifier=OBC1
+    map address=00-3f,80-bf:6000-7fff mask=0xe000
+    map address=70-71,f0-f1:6000-7fff,e000-ffff mask=0xe000
+    memory type=RAM content=Save
+
+board: SHVC-2J0N-(01,10,11,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+
+board: SHVC-2J3M-(01,11,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=10-1f,30-3f,90-9f,b0-bf:6000-7fff mask=0xe000
+
+board: SHVC-2J5M-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=10-1f,30-3f,90-9f,b0-bf:6000-7fff mask=0xe000
+
+board: SHVC-3J0N-01
+  memory type=ROM content=Program
+    map address=00-2f,80-af:8000-ffff
+    map address=40-6f,c0-ef:0000-ffff
+
+board: SHVC-BA0N-(01,10)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+
+board: SHVC-BA1M-01
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-BA3M-(01,10)
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: SHVC-BJ0N-(01,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+
+board: SHVC-BJ1M-(10,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: SHVC-BJ3M-(10,20)
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: SHVC-LDH3C-01
+  processor identifier=SPC7110
+    map address=00-3f,80-bf:4800-483f
+    map address=50,58:0000-ffff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x800000
+      map address=c0-ff:0000-ffff mask=0xc00000
+      memory type=ROM content=Program
+      memory type=ROM content=Data
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff mask=0xe000
+  rtc manufacturer=Epson
+    map address=00-3f,80-bf:4840-4842
+    memory type=RTC content=Time manufacturer=Epson
+
+board: SHVC-LJ3M-01
+  memory type=ROM content=Program
+    map address=00-3f:8000-ffff base=0x400000
+    map address=40-7d:0000-ffff base=0x400000
+    map address=80-bf:8000-ffff mask=0xc00000
+    map address=c0-ff:0000-ffff mask=0xc00000
+  memory type=RAM content=Save
+    map address=80-bf:6000-7fff mask=0xe000
+
+board: SHVC-LN3B-01
+  memory type=RAM content=Save
+    map address=00-3f,80-bf:6000-7fff mask=0xe000
+    map address=70-73:0000-ffff
+  processor identifier=SDD1
+    map address=00-3f,80-bf:4800-480f
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+
+board: SHVC-SGB2-01
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+  processor identifier=ICD revision=2
+    map address=00-3f,80-bf:6000-67ff,7000-7fff
+    memory type=ROM content=Boot architecture=SM83
+    oscillator
+    slot type=GameBoy
+
+board: SHVC-YA0N-01
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+
+board: SHVC-YJ0N-01
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+
+//Boards (Generic)
+
+database
+  revision: 2020-11-09
+
+board: ARM-LOROM-RAM
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-6f,c0-ef:0000-7fff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff
+  processor architecture=ARM6
+    map address=00-3f,80-bf:3800-38ff
+    memory type=ROM content=Program architecture=ARM6
+    memory type=ROM content=Data architecture=ARM6
+    memory type=RAM content=Data architecture=ARM6
+    oscillator
+
+board: BS-HIROM-RAM
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff
+    map address=40-5f,c0-df:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  slot type=BSMemory
+    map address=20-3f,a0-bf:8000-ffff
+    map address=60-7d,e0-ff:0000-ffff
+
+board: BS-LOROM-RAM
+  memory type=ROM content=Program
+    map address=00-1f:8000-ffff mask=0xe08000 base=0x000000
+    map address=20-3f:8000-ffff mask=0xe08000 base=0x100000
+    map address=80-9f:8000-ffff mask=0xe08000 base=0x200000
+    map address=a0-bf:8000-ffff mask=0xe08000 base=0x100000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+  slot type=BSMemory
+    map address=c0-ef:0000-ffff
+
+board: BS-MCC-RAM
+  memory type=RAM content=Save
+    map address=10-17:5000-5fff mask=0xf000
+  processor identifier=MCC
+    map address=00-0f:5000-5fff
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=40-7d,c0-ff:0000-ffff
+      map address=20-3f,a0-bf:6000-7fff
+      memory type=ROM content=Program
+      memory type=RAM content=Download
+      slot type=BSMemory
+
+board: BS-SA1-RAM
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+      slot type=BSMemory
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: EVENT-CC92
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+  processor manufacturer=NEC architecture=uPD78214
+    identifier: Campus Challenge '92
+    map address=c0,e0:0000
+    mcu
+      map address=00-1f,80-9f:8000-ffff
+      memory type=ROM content=Program
+      memory type=ROM content=Level-1
+      memory type=ROM content=Level-2
+      memory type=ROM content=Level-3
+    dip
+  processor manufacturer=NEC architecture=uPD7725
+    map address=20-3f,a0-bf:8000-ffff mask=0x7fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: EVENT-PF94
+  memory type=RAM content=Save
+    map address=30-3f,b0-bf:6000-7fff mask=0xe000
+  processor manufacturer=NEC architecture=uPD78214
+    identifier: PowerFest '94
+    map address=10,20:6000
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+      memory type=ROM content=Level-1
+      memory type=ROM content=Level-2
+      memory type=ROM content=Level-3
+    dip
+  processor manufacturer=NEC architecture=uPD7725
+    map address=00-0f,80-8f:6000-7fff mask=0xfff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: EXHIROM
+  memory type=ROM content=Program
+    map address=00-3f:8000-ffff base=0x400000
+    map address=40-7d:0000-ffff base=0x400000
+    map address=80-bf:8000-ffff mask=0xc00000
+    map address=c0-ff:0000-ffff mask=0xc00000
+
+board: EXHIROM-RAM
+  memory type=ROM content=Program
+    map address=00-3f:8000-ffff base=0x400000
+    map address=40-7d:0000-ffff base=0x400000
+    map address=80-bf:8000-ffff mask=0xc00000
+    map address=c0-ff:0000-ffff mask=0xc00000
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: EXHIROM-RAM-SHARPRTC
+  memory type=ROM content=Program
+    map address=00-3f:8000-ffff base=0x400000
+    map address=40-7d:0000-ffff base=0x400000
+    map address=80-bf:8000-ffff mask=0xc00000
+    map address=c0-ff:0000-ffff mask=0xc00000
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  rtc manufacturer=Sharp
+    map address=00-3f,80-bf:2800-2801
+    memory type=RTC content=Time manufacturer=Sharp
+
+board: EXLOROM
+  memory type=ROM content=Program
+    map address=00-7d:8000-ffff mask=0x808000 base=0x400000
+    map address=80-ff:8000-ffff mask=0x808000 base=0x000000
+
+board: EXLOROM-RAM
+  memory type=ROM content=Program
+    map address=00-7d:8000-ffff mask=0x808000 base=0x400000
+    map address=80-ff:8000-ffff mask=0x808000 base=0x000000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: EXNEC-LOROM
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  processor architecture=uPD96050
+    map address=60-67,e0-e7:0000-3fff
+    memory type=ROM content=Program architecture=uPD96050
+    memory type=ROM content=Data architecture=uPD96050
+    memory type=RAM content=Data architecture=uPD96050
+      map address=68-6f,e8-ef:0000-7fff mask=0x8000
+    oscillator
+
+board: EXSPC7110-RAM-EPSONRTC
+  memory type=ROM content=Expansion
+    map address=40-4f:0000-ffff
+  processor identifier=SPC7110
+    map address=00-3f,80-bf:4800-483f
+    map address=50,58:0000-ffff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x800000
+      map address=c0-ff:0000-ffff mask=0xc00000
+      memory type=ROM content=Program
+      memory type=ROM content=Data
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff mask=0xe000
+  rtc manufacturer=Epson
+    map address=00-3f,80-bf:4840-4842
+    memory type=RTC content=Time manufacturer=Epson
+
+board: GB-LOROM
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+    map address=40-7d,c0-ff:0000-7fff mask=0x8000
+  processor identifier=ICD revision=2
+    map address=00-3f,80-bf:6000-67ff,7000-7fff
+    memory type=ROM content=Boot architecture=SM83
+    oscillator
+    slot type=GameBoy
+
+board: GSU-RAM
+  processor architecture=GSU
+    map address=00-3f,80-bf:3000-34ff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+      map address=40-5f,c0-df:0000-ffff
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=70-71,f0-f1:0000-ffff
+
+board: HIROM
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+
+board: HIROM-RAM
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+
+board: HITACHI-LOROM
+  processor architecture=HG51BS169
+    map address=00-3f,80-bf:6c00-6fff,7c00-7fff
+    memory type=ROM content=Program
+      map address=00-3f,80-bf:8000-ffff mask=0x8000
+    memory type=RAM content=Save
+      map address=70-77:0000-7fff
+    memory type=ROM content=Data architecture=HG51BS169
+    memory type=RAM content=Data architecture=HG51BS169
+      map address=00-3f,80-bf:6000-6bff,7000-7bff mask=0xf000
+    oscillator
+
+board: LOROM
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+
+board: LOROM-RAM
+  memory type=ROM content=Program
+    map address=00-7d,80-ff:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+
+board: LOROM-RAM#A
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff mask=0x8000
+
+board: NEC-HIROM
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  processor architecture=uPD7725
+    map address=00-1f,80-9f:6000-7fff mask=0xfff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: NEC-HIROM-RAM
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff
+    map address=40-7d,c0-ff:0000-ffff
+  memory type=RAM content=Save
+    map address=20-3f,a0-bf:6000-7fff mask=0xe000
+  processor architecture=uPD7725
+    map address=00-1f,80-9f:6000-7fff mask=0xfff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: NEC-LOROM
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  processor architecture=uPD7725
+    map address=30-3f,b0-bf:8000-ffff mask=0x3fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: NEC-LOROM-RAM
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-7fff mask=0x8000
+  processor architecture=uPD7725
+    map address=60-6f,e0-ef:0000-7fff mask=0x3fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: NEC-LOROM-RAM#A
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  memory type=RAM content=Save
+    map address=70-7d,f0-ff:0000-ffff
+  processor architecture=uPD7725
+    map address=20-3f,a0-bf:8000-ffff mask=0x3fff
+    memory type=ROM content=Program architecture=uPD7725
+    memory type=ROM content=Data architecture=uPD7725
+    memory type=RAM content=Data architecture=uPD7725
+    oscillator
+
+board: OBC1-LOROM-RAM
+  memory type=ROM content=Program
+    map address=00-3f,80-bf:8000-ffff mask=0x8000
+  processor identifier=OBC1
+    map address=00-3f,80-bf:6000-7fff mask=0xe000
+    map address=70-71,f0-f1:6000-7fff,e000-ffff mask=0xe000
+    memory type=RAM content=Save
+
+board: SA1
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: SA1-RAM
+  processor architecture=W65C816S
+    map address=00-3f,80-bf:2200-23ff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x408000
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff size=0x2000
+      map address=40-4f:0000-ffff
+    memory type=RAM content=Internal
+      map address=00-3f,80-bf:3000-37ff size=0x800
+
+board: SDD1
+  processor identifier=SDD1
+    map address=00-3f,80-bf:4800-480f
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+
+board: SDD1-RAM
+  memory type=RAM content=Save
+    map address=00-3f,80-bf:6000-7fff mask=0xe000
+    map address=70-73:0000-ffff mask=0x8000
+  processor identifier=SDD1
+    map address=00-3f,80-bf:4800-480f
+    mcu
+      map address=00-3f,80-bf:8000-ffff
+      map address=c0-ff:0000-ffff
+      memory type=ROM content=Program
+
+board: SPC7110-RAM
+  processor identifier=SPC7110
+    map address=00-3f,80-bf:4800-483f
+    map address=50,58:0000-ffff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x800000
+      map address=c0-ff:0000-ffff mask=0xc00000
+      memory type=ROM content=Program
+      memory type=ROM content=Data
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff mask=0xe000
+
+board: SPC7110-RAM-EPSONRTC
+  processor identifier=SPC7110
+    map address=00-3f,80-bf:4800-483f
+    map address=50,58:0000-ffff
+    mcu
+      map address=00-3f,80-bf:8000-ffff mask=0x800000
+      map address=c0-ff:0000-ffff mask=0xc00000
+      memory type=ROM content=Program
+      memory type=ROM content=Data
+    memory type=RAM content=Save
+      map address=00-3f,80-bf:6000-7fff mask=0xe000
+  rtc manufacturer=Epson
+    map address=00-3f,80-bf:4840-4842
+    memory type=RTC content=Time manufacturer=Epson
+
+board: ST-LOROM
+  memory type=ROM content=Program
+    map address=00-1f,80-9f:8000-ffff mask=0x8000
+  slot type=SufamiTurbo
+    rom
+      map address=20-3f,a0-bf:8000-ffff mask=0x8000
+    ram
+      map address=60-6f,e0-ef:0000-ffff
+  slot type=SufamiTurbo
+    rom
+      map address=40-5f,c0-df:0000-ffff mask=0x8000
+    ram
+      map address=70-7d,f0-ff:0000-ffff
+

ares/ares/ares.cpp

@@ -0,0 +1,11 @@
+#include <ares/ares.hpp>
+#include <ares/debug/debug.cpp>
+#include <ares/node/node.cpp>
+#include <ares/resource/resource.cpp>
+
+namespace ares {
+
+Platform* platform = nullptr;
+bool _runAhead = false;
+
+}

ares/ares/ares.hpp

@@ -0,0 +1,79 @@
+#pragma once
+
+#include <libco/libco.h>
+
+#include <nall/platform.hpp>
+#include <nall/adaptive-array.hpp>
+#include <nall/any.hpp>
+#include <nall/array.hpp>
+#include <nall/bump-allocator.hpp>
+#include <nall/chrono.hpp>
+#include <nall/directory.hpp>
+#include <nall/dl.hpp>
+#include <nall/endian.hpp>
+#include <nall/image.hpp>
+#include <nall/literals.hpp>
+#include <nall/priority-queue.hpp>
+#include <nall/queue.hpp>
+#include <nall/random.hpp>
+#include <nall/serializer.hpp>
+#include <nall/set.hpp>
+#include <nall/shared-pointer.hpp>
+#include <nall/string.hpp>
+#include <nall/terminal.hpp>
+#include <nall/thread.hpp>
+#include <nall/traits.hpp>
+#include <nall/unique-pointer.hpp>
+#include <nall/variant.hpp>
+#include <nall/vector.hpp>
+#include <nall/vfs.hpp>
+#include <nall/cd.hpp>
+#include <nall/dsp/iir/one-pole.hpp>
+#include <nall/dsp/iir/biquad.hpp>
+#include <nall/dsp/resampler/cubic.hpp>
+#include <nall/hash/crc32.hpp>
+#include <nall/hash/sha256.hpp>
+using namespace nall;
+
+namespace ares {
+  static const string Name       = "ares";
+  static const string Version    = "121";
+  static const string Copyright  = "Near";
+  static const string License    = "ISC";
+  static const string LicenseURI = "https://opensource.org/licenses/ISC";
+  static const string Website    = "ares.dev";
+  static const string WebsiteURI = "https://ares.dev";
+
+  //incremented only when serialization format changes
+  static const u32    SerializerSignature = 0x31545342;  //"BST1" (little-endian)
+  static const string SerializerVersion   = "121";
+
+  namespace VFS {
+    using Pak = shared_pointer<vfs::directory>;
+    using File = shared_pointer<vfs::file>;
+  }
+
+  namespace Video {
+    static constexpr bool Threaded = true;
+  }
+
+  namespace Constants {
+    namespace Colorburst {
+      static constexpr f64 NTSC = 315.0 / 88.0 * 1'000'000.0;
+      static constexpr f64 PAL  = 283.75 * 15'625.0 + 25.0;
+    }
+  }
+
+  extern bool _runAhead;
+  inline auto runAhead() -> bool { return _runAhead; }
+  inline auto setRunAhead(bool runAhead) -> void { _runAhead = runAhead; }
+}
+
+#include <ares/types.hpp>
+#include <ares/random.hpp>
+#include <ares/debug/debug.hpp>
+#include <ares/node/node.hpp>
+#include <ares/platform.hpp>
+#include <ares/memory/readable.hpp>
+#include <ares/memory/writable.hpp>
+#include <ares/resource/resource.hpp>

ares/ares/debug/debug.cpp

@@ -0,0 +1,45 @@
+namespace ares {
+
+Debug _debug;
+
+auto Debug::reset() -> void {
+  _totalNotices = 0;
+  _unhandledNotices.reset();
+  _unimplementedNotices.reset();
+  _unusualNotices.reset();
+  _unverifiedNotices.reset();
+}
+
+auto Debug::_unhandled(const string& text) -> void {
+  if(_unhandledNotices.find(text)) return;
+  if(_totalNotices++ > 256) return;
+  _unhandledNotices.append(text);
+
+  print(terminal::color::yellow("[unhandled] "), text, "\n");
+}
+
+auto Debug::_unimplemented(const string& text) -> void {
+  if(_unimplementedNotices.find(text)) return;
+  if(_totalNotices++ > 256) return;
+  _unimplementedNotices.append(text);
+
+  print(terminal::color::magenta("[unimplemented] "), text, "\n");
+}
+
+auto Debug::_unusual(const string& text) -> void {
+  if(_unusualNotices.find(text)) return;
+  if(_totalNotices++ > 256) return;
+  _unusualNotices.append(text);
+
+  print(terminal::color::cyan("[unusual] "), text, "\n");
+}
+
+auto Debug::_unverified(const string& text) -> void {
+  if(_unverifiedNotices.find(text)) return;
+  if(_totalNotices++ > 256) return;
+  _unverifiedNotices.append(text);
+
+  print(terminal::color::gray("[unverified] "), text, "\n");
+}
+
+}

ares/ares/debug/debug.hpp

@@ -0,0 +1,39 @@
+namespace ares {
+
+struct Debug {
+  auto reset() -> void;
+
+  template<typename... P> auto unhandled(P&&... p) -> void {
+    return _unhandled({forward<P>(p)...});
+  }
+
+  template<typename... P> auto unimplemented(P&&... p) -> void {
+    return _unimplemented({forward<P>(p)...});
+  }
+
+  template<typename... P> auto unusual(P&&... p) -> void {
+    return _unusual({forward<P>(p)...});
+  }
+
+  template<typename... P> auto unverified(P&&... p) -> void {
+    return _unverified({forward<P>(p)...});
+  }
+
+private:
+  auto _unhandled(const string&) -> void;
+  auto _unimplemented(const string&) -> void;
+  auto _unusual(const string&) -> void;
+  auto _unverified(const string&) -> void;
+
+  u64 _totalNotices = 0;
+  vector<string> _unhandledNotices;
+  vector<string> _unimplementedNotices;
+  vector<string> _unusualNotices;
+  vector<string> _unverifiedNotices;
+};
+
+extern Debug _debug;
+
+}
+
+#define debug(function, ...) if constexpr(1) ares::_debug.function(__VA_ARGS__)

ares/ares/inline.hpp

@@ -0,0 +1,4 @@
+#include <ares/scheduler/thread.hpp>
+#include <ares/scheduler/scheduler.hpp>
+#include <ares/scheduler/thread.cpp>
+#include <ares/scheduler/scheduler.cpp>

ares/ares/memory/memory.hpp

@@ -0,0 +1,30 @@
+#pragma once
+
+namespace ares::Memory {
+
+inline auto mirror(u32 address, u32 size) -> u32 {
+  if(size == 0) return 0;
+  u32 base = 0;
+  u32 mask = 1 << 31;
+  while(address >= size) {
+    while(!(address & mask)) mask >>= 1;
+    address -= mask;
+    if(size > mask) {
+      size -= mask;
+      base += mask;
+    }
+    mask >>= 1;
+  }
+  return base + address;
+}
+
+inline auto reduce(u32 address, u32 mask) -> u32 {
+  while(mask) {
+    u32 bits = (mask & -mask) - 1;
+    address = address >> 1 & ~bits | address & bits;
+    mask = (mask & mask - 1) >> 1;
+  }
+  return address;
+}
+
+}

ares/ares/memory/readable.hpp

@@ -0,0 +1,73 @@
+#pragma once
+
+#include <ares/memory/memory.hpp>
+
+namespace ares::Memory {
+
+template<typename T>
+struct Readable {
+  ~Readable() { reset(); }
+
+  auto reset() -> void {
+    delete[] self.data;
+    self.data = nullptr;
+    self.size = 0;
+    self.mask = 0;
+  }
+
+  auto allocate(u32 size, T fill = (T)~0ull) -> void {
+    if(!size) return reset();
+    delete[] self.data;
+    self.size = size;
+    self.mask = bit::round(self.size) - 1;
+    self.data = new T[self.mask + 1];
+    memory::fill<T>(self.data, self.mask + 1, fill);
+  }
+
+  auto fill(T fill = ~0ull) -> void {
+    for(u32 address : range(self.size)) {
+      self.data[address] = fill;
+    }
+  }
+
+  auto load(VFS::File fp) -> void {
+    if(!self.size) allocate(fp->size());
+    fp->read({self.data, min(fp->size(), self.size * sizeof(T))});
+    for(u32 address = self.size; address <= self.mask; address++) {
+      self.data[address] = self.data[mirror(address, self.size)];
+    }
+  }
+
+  auto save(VFS::File fp) -> void {
+    fp->write({self.data, min(fp->size(), self.size * sizeof(T))});
+  }
+
+  explicit operator bool() const { return (bool)self.data; }
+  auto data() const -> const T* { return self.data; }
+  auto size() const -> u32 { return self.size; }
+  auto mask() const -> u32 { return self.mask; }
+
+  auto operator[](u32 address) const -> T { return self.data[address & self.mask]; }
+  auto read(u32 address) const -> T { return self.data[address & self.mask]; }
+  auto write(u32 address, T data) const -> void {}
+  auto program(u32 address, T data) const -> void { self.data[address & self.mask] = data; }
+
+  auto begin() -> T* { return &self.data[0]; }
+  auto end() -> T* { return &self.data[self.size]; }
+
+  auto begin() const -> const T* { return &self.data[0]; }
+  auto end() const -> const T* { return &self.data[self.size]; }
+
+  auto serialize(serializer& s) -> void {
+    s(array_span<T>{self.data, self.size});
+  }
+
+//private:
+  struct {
+    T* data = nullptr;
+    u32 size = 0;
+    u32 mask = 0;
+  } self;
+};
+
+}

ares/ares/memory/writable.hpp

@@ -0,0 +1,75 @@
+#pragma once
+
+#include <ares/memory/memory.hpp>
+
+namespace ares::Memory {
+
+template<typename T>
+struct Writable {
+  ~Writable() { reset(); }
+
+  auto reset() -> void {
+    delete[] self.data;
+    self.data = nullptr;
+    self.size = 0;
+    self.mask = 0;
+  }
+
+  auto allocate(u32 size, T fill = (T)~0ull) -> void {
+    if(!size) return reset();
+    delete[] self.data;
+    self.size = size;
+    self.mask = bit::round(self.size) - 1;
+    self.data = new T[self.mask + 1];
+    memory::fill<T>(self.data, self.mask + 1, fill);
+  }
+
+  auto fill(T fill = ~0ull) -> void {
+    for(u32 address : range(self.size)) {
+      self.data[address] = fill;
+    }
+  }
+
+  auto load(VFS::File fp) -> void {
+    if(!self.size) allocate(fp->size());
+    fp->read({self.data, min(fp->size(), self.size * sizeof(T))});
+    for(u32 address = self.size; address <= self.mask; address++) {
+      self.data[address] = self.data[mirror(address, self.size)];
+    }
+  }
+
+  auto save(VFS::File fp) -> void {
+    fp->write({self.data, min(fp->size(), self.size * sizeof(T))});
+  }
+
+  explicit operator bool() const { return (bool)self.data; }
+  auto data() -> T* { return self.data; }
+  auto data() const -> const T* { return self.data; }
+  auto size() const -> u32 { return self.size; }
+  auto mask() const -> u32 { return self.mask; }
+
+  auto operator[](u32 address) -> T& { return self.data[address & self.mask]; }
+  auto operator[](u32 address) const -> T { return self.data[address & self.mask]; }
+  auto read(u32 address) const -> T { return self.data[address & self.mask]; }
+  auto write(u32 address, T data) -> void { self.data[address & self.mask] = data; }
+  auto program(u32 address, T data) -> void { self.data[address & self.mask] = data; }
+
+  auto begin() -> T* { return &self.data[0]; }
+  auto end() -> T* { return &self.data[self.size]; }
+
+  auto begin() const -> const T* { return &self.data[0]; }
+  auto end() const -> const T* { return &self.data[self.size]; }
+
+  auto serialize(serializer& s) -> void {
+    s(array_span<T>{self.data, self.size});
+  }
+
+private:
+  struct {
+    T* data = nullptr;
+    u32 size = 0;
+    u32 mask = 0;
+  } self;
+};
+
+}

ares/ares/node/attribute.hpp

@@ -0,0 +1,8 @@
+struct Attribute {
+  Attribute(const string& name, const any& value = {}) : name(name), value(value) {}
+  auto operator==(const Attribute& source) const -> bool { return name == source.name; }
+  auto operator< (const Attribute& source) const -> bool { return name <  source.name; }
+
+  string name;
+  any value;
+};

ares/ares/node/audio/audio.hpp

@@ -0,0 +1,4 @@
+struct Audio : Object {
+  DeclareClass(Audio, "audio")
+  using Object::Object;
+};

ares/ares/node/audio/stream.cpp

@@ -0,0 +1,131 @@
+auto Stream::setChannels(u32 channels) -> void {
+  _channels.reset();
+  _channels.resize(channels);
+}
+
+auto Stream::setFrequency(f64 frequency) -> void {
+  _frequency = frequency;
+  setResamplerFrequency(_resamplerFrequency);
+}
+
+auto Stream::setResamplerFrequency(f64 resamplerFrequency) -> void {
+  _resamplerFrequency = resamplerFrequency;
+
+  for(auto& channel : _channels) {
+    channel.nyquist.reset();
+    channel.resampler.reset(_frequency, _resamplerFrequency);
+  }
+
+  if(_frequency >= _resamplerFrequency * 2) {
+    //add a low-pass filter to prevent aliasing during resampling
+    f64 cutoffFrequency = min(25000.0, _resamplerFrequency / 2.0 - 2000.0);
+    for(auto& channel : _channels) {
+      u32 passes = 3;
+      for(u32 pass : range(passes)) {
+        DSP::IIR::Biquad filter;
+        f64 q = DSP::IIR::Biquad::butterworth(passes * 2, pass);
+        filter.reset(DSP::IIR::Biquad::Type::LowPass, cutoffFrequency, _frequency, q);
+        channel.nyquist.append(filter);
+      }
+    }
+  }
+}
+
+auto Stream::setMuted(bool muted) -> void {
+  _muted = muted;
+}
+
+auto Stream::resetFilters() -> void {
+  for(auto& channel : _channels) {
+    channel.filters.reset();
+  }
+}
+
+auto Stream::addLowPassFilter(f64 cutoffFrequency, u32 order, u32 passes) -> void {
+  for(auto& channel : _channels) {
+    for(u32 pass : range(passes)) {
+      if(order == 1) {
+        Filter filter{Filter::Mode::OnePole, Filter::Type::LowPass, Filter::Order::First};
+        filter.onePole.reset(DSP::IIR::OnePole::Type::LowPass, cutoffFrequency, _frequency);
+        channel.filters.append(filter);
+      }
+      if(order == 2) {
+        Filter filter{Filter::Mode::Biquad, Filter::Type::LowPass, Filter::Order::Second};
+        f64 q = DSP::IIR::Biquad::butterworth(passes * 2, pass);
+        filter.biquad.reset(DSP::IIR::Biquad::Type::LowPass, cutoffFrequency, _frequency, q);
+        channel.filters.append(filter);
+      }
+    }
+  }
+}
+
+auto Stream::addHighPassFilter(f64 cutoffFrequency, u32 order, u32 passes) -> void {
+  for(auto& channel : _channels) {
+    for(u32 pass : range(passes)) {
+      if(order == 1) {
+        Filter filter{Filter::Mode::OnePole, Filter::Type::HighPass, Filter::Order::First};
+        filter.onePole.reset(DSP::IIR::OnePole::Type::HighPass, cutoffFrequency, _frequency);
+        channel.filters.append(filter);
+      }
+      if(order == 2) {
+        Filter filter{Filter::Mode::Biquad, Filter::Type::HighPass, Filter::Order::Second};
+        f64 q = DSP::IIR::Biquad::butterworth(passes * 2, pass);
+        filter.biquad.reset(DSP::IIR::Biquad::Type::HighPass, cutoffFrequency, _frequency, q);
+        channel.filters.append(filter);
+      }
+    }
+  }
+}
+
+auto Stream::addLowShelfFilter(f64 cutoffFrequency, u32 order, f64 gain, f64 slope) -> void {
+  for(auto& channel : _channels) {
+    if(order == 2) {
+      Filter filter{Filter::Mode::Biquad, Filter::Type::LowShelf, Filter::Order::Second};
+      f64 q = DSP::IIR::Biquad::shelf(gain, slope);
+      filter.biquad.reset(DSP::IIR::Biquad::Type::LowShelf, cutoffFrequency, _frequency, q);
+      channel.filters.append(filter);
+    }
+  }
+}
+
+auto Stream::addHighShelfFilter(f64 cutoffFrequency, u32 order, f64 gain, f64 slope) -> void {
+  for(auto& channel : _channels) {
+    if(order == 2) {
+      Filter filter{Filter::Mode::Biquad, Filter::Type::HighShelf, Filter::Order::Second};
+      f64 q = DSP::IIR::Biquad::shelf(gain, slope);
+      filter.biquad.reset(DSP::IIR::Biquad::Type::HighShelf, cutoffFrequency, _frequency, q);
+      channel.filters.append(filter);
+    }
+  }
+}
+
+auto Stream::pending() const -> bool {
+  return _channels && _channels[0].resampler.pending();
+}
+
+auto Stream::read(f64 samples[]) -> u32 {
+  for(u32 c : range(_channels.size())) {
+    samples[c] = _channels[c].resampler.read() * !muted();
+  }
+  return _channels.size();
+}
+
+auto Stream::write(const f64 samples[]) -> void {
+  for(u32 c : range(_channels.size())) {
+    f64 sample = samples[c] + 1e-25;  //constant offset used to suppress denormals
+    for(auto& filter : _channels[c].filters) {
+      switch(filter.mode) {
+      case Filter::Mode::OnePole: sample = filter.onePole.process(sample); break;
+      case Filter::Mode::Biquad: sample = filter.biquad.process(sample); break;
+      }
+    }
+    for(auto& filter : _channels[c].nyquist) {
+      sample = filter.process(sample);
+    }
+    _channels[c].resampler.write(sample);
+  }
+
+  //if there are samples pending, then alert the frontend to possibly process them.
+  //this will generally happen when every audio stream has pending samples to be mixed.
+  if(pending()) platform->audio(shared());
+}

ares/ares/node/audio/stream.hpp

@@ -0,0 +1,49 @@
+struct Stream : Audio {
+  DeclareClass(Stream, "audio.stream")
+  using Audio::Audio;
+
+  auto channels() const -> u32 { return _channels.size(); }
+  auto frequency() const -> f64 { return _frequency; }
+  auto resamplerFrequency() const -> f64 { return _resamplerFrequency; }
+  auto muted() const -> bool { return _muted; }
+
+  auto setChannels(u32 channels) -> void;
+  auto setFrequency(f64 frequency) -> void;
+  auto setResamplerFrequency(f64 resamplerFrequency) -> void;
+  auto setMuted(bool muted) -> void;
+
+  auto resetFilters() -> void;
+  auto addLowPassFilter(f64 cutoffFrequency, u32 order, u32 passes = 1) -> void;
+  auto addHighPassFilter(f64 cutoffFrequency, u32 order, u32 passes = 1) -> void;
+  auto addLowShelfFilter(f64 cutoffFrequency, u32 order, f64 gain, f64 slope) -> void;
+  auto addHighShelfFilter(f64 cutoffFrequency, u32 order, f64 gain, f64 slope) -> void;
+
+  auto pending() const -> bool;
+  auto read(f64 samples[]) -> u32;
+  auto write(const f64 samples[]) -> void;
+
+  template<typename... P>
+  auto frame(P&&... p) -> void {
+    if(runAhead()) return;
+    f64 samples[sizeof...(p)] = {forward<P>(p)...};
+    write(samples);
+  }
+
+protected:
+  struct Filter {
+    enum class Mode : u32 { OnePole, Biquad } mode;
+    enum class Type : u32 { None, LowPass, HighPass, LowShelf, HighShelf } type;
+    enum class Order : u32 { None, First, Second } order;
+    DSP::IIR::OnePole onePole;
+    DSP::IIR::Biquad biquad;
+  };
+  struct Channel {
+    vector<Filter> filters;
+    vector<DSP::IIR::Biquad> nyquist;
+    DSP::Resampler::Cubic resampler;
+  };
+  vector<Channel> _channels;
+  f64 _frequency = 48000.0;
+  f64 _resamplerFrequency = 48000.0;
+  bool _muted = false;
+};

ares/ares/node/class.hpp

@@ -0,0 +1,34 @@
+//horrible implementation of run-time introspection:
+//allow converting a unique class string to a derived Node type.
+
+struct Class {
+  struct Instance {
+    const string identifier;
+    const function<Node::Object ()> create;
+  };
+
+  static auto classes() -> vector<Instance>& {
+    static vector<Instance> classes;
+    return classes;
+  }
+
+  template<typename T> static auto register() -> void {
+    if(!classes().find([&](auto instance) { return instance.identifier == T::identifier; })) {
+      classes().append({T::identifier, &T::create});
+    } else {
+      throw;
+    }
+  }
+
+  static auto create(string identifier) -> Node::Object {
+    if(auto index = classes().find([&](auto instance) { return instance.identifier == identifier; })) {
+      return classes()[*index].create();
+    }
+    if(identifier == "Object") throw;  //should never occur: detects unregistered classes
+    return create("Object");
+  }
+
+  template<typename T> struct Register {
+    Register() { Class::register<T>(); }
+  };
+};

ares/ares/node/component/component.hpp

@@ -0,0 +1,4 @@
+struct Component : Object {
+  DeclareClass(Component, "component");
+  using Object::Object;
+};

ares/ares/node/component/real-time-clock.hpp

@@ -0,0 +1,30 @@
+struct RealTimeClock : Component {
+  DeclareClass(RealTimeClock, "component.real-time-clock")
+  using Component::Component;
+
+  auto update() -> void { if(_update) return _update(); }
+  auto timestamp() const -> u64 { return _timestamp; }
+
+  auto setUpdate(function<void ()> update) -> void { _update = update; }
+  auto setTimestamp(u64 timestamp) -> void { _timestamp = timestamp; }
+
+  auto synchronize(u64 timestamp = 0) -> void {
+    if(!timestamp) timestamp = chrono::timestamp();
+    _timestamp = timestamp;
+    update();
+  }
+
+  auto serialize(string& output, string depth) -> void override {
+    Component::serialize(output, depth);
+    output.append(depth, "  timestamp: ", _timestamp, "\n");
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Component::unserialize(node);
+    _timestamp = node["timestamp"].natural();
+  }
+
+protected:
+  function<void ()> _update;
+  u64 _timestamp;
+};

ares/ares/node/debugger/debugger.hpp

@@ -0,0 +1,4 @@
+struct Debugger : Object {
+  DeclareClass(Debugger, "debugger")
+  using Object::Object;
+};

ares/ares/node/debugger/graphics.hpp

@@ -0,0 +1,26 @@
+struct Graphics : Debugger {
+  DeclareClass(Graphics, "debugger.graphics")
+
+  Graphics(string name = {}) : Debugger(name) {
+  }
+
+  auto width() const -> u32 { return _width; }
+  auto height() const -> u32 { return _height; }
+  auto capture() const -> vector<u32> { if(_capture) return _capture(); return {}; }
+
+  auto setSize(u32 width, u32 height) -> void { _width = width, _height = height; }
+  auto setCapture(function<vector<u32> ()> capture) -> void { _capture = capture; }
+
+  auto serialize(string& output, string depth) -> void override {
+    Debugger::serialize(output, depth);
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Debugger::unserialize(node);
+  }
+
+protected:
+  u32 _width = 0;
+  u32 _height = 0;
+  function<vector<u32> ()> _capture;
+};

ares/ares/node/debugger/memory.hpp

@@ -0,0 +1,27 @@
+struct Memory : Debugger {
+  DeclareClass(Memory, "debugger.memory")
+
+  Memory(string name = {}) : Debugger(name) {
+  }
+
+  auto size() const -> u32 { return _size; }
+  auto read(u32 address) const -> n8 { if(_read) return _read(address); return 0; }
+  auto write(u32 address, u8 data) const -> void { if(_write) return _write(address, data); }
+
+  auto setSize(u32 size) -> void { _size = size; }
+  auto setRead(function<u8 (u32)> read) -> void { _read = read; }
+  auto setWrite(function<void (u32, u8)> write) -> void { _write = write; }
+
+  auto serialize(string& output, string depth) -> void override {
+    Debugger::serialize(output, depth);
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Debugger::unserialize(node);
+  }
+
+protected:
+  u32 _size = 0;
+  function<u8 (u32)> _read;
+  function<void (u32, u8)> _write;
+};

ares/ares/node/debugger/properties.hpp

@@ -0,0 +1,21 @@
+struct Properties : Debugger {
+  DeclareClass(Properties, "debugger.properties")
+
+  Properties(string name = {}) : Debugger(name) {
+  }
+
+  auto query() const -> string { if(_query) return _query(); return {}; }
+
+  auto setQuery(function<string ()> query) -> void { _query = query; }
+
+  auto serialize(string& output, string depth) -> void override {
+    Debugger::serialize(output, depth);
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Debugger::unserialize(node);
+  }
+
+protected:
+  function<string ()> _query;
+};

ares/ares/node/debugger/tracer/instruction.hpp

@@ -0,0 +1,125 @@
+struct Instruction : Tracer {
+  DeclareClass(Instruction, "debugger.tracer.instruction")
+
+  Instruction(string name = {}, string component = {}) : Tracer(name, component) {
+    setMask(_mask);
+    setDepth(_depth);
+  }
+
+  auto addressBits() const -> u32 { return _addressBits; }
+  auto addressMask() const -> u32 { return _addressMask; }
+  auto mask() const -> bool { return _mask; }
+  auto depth() const -> u32 { return _depth; }
+
+  auto setAddressBits(u32 addressBits, u32 addressMask = 0) -> void {
+    _addressBits = addressBits;
+    _addressMask = addressMask;
+  }
+
+  auto setMask(bool mask) -> void {
+    _mask = mask;
+  }
+
+  auto setDepth(u32 depth) -> void {
+    _depth = depth;
+    _history.reset();
+    _history.resize(depth);
+    for(auto& history : _history) history = ~0;
+  }
+
+  auto address(u32 address) -> bool {
+    address &= (1u << _addressBits) - 1;  //mask upper bits of address
+    _address = address;
+    address >>= _addressMask;  //clip unneeded alignment bits (to reduce _masks size)
+
+    if(_mask && updateMasks()) {
+      if(_masks[address >> 3] & 1 << (address & 7)) return false;  //do not trace twice
+      _masks[address >> 3] |= 1 << (address & 7);
+    }
+
+    if(_depth) {
+      for(auto history : _history) {
+        if(_address == history) {
+          _omitted++;
+          return false;  //do not trace again if recently traced
+        }
+      }
+      for(auto index : range(_depth - 1)) {
+        _history[index] = _history[index + 1];
+      }
+      _history.last() = _address;
+    }
+
+    return true;
+  }
+
+  //mark an already-executed address as not executed yet for trace masking.
+  //call when writing to executable RAM to support self-modifying code.
+  auto invalidate(u32 address) -> void {
+    if(unlikely(_mask && updateMasks())) {
+      address &= (1u << _addressBits) - 1;
+      address >>= _addressMask;
+      _masks[address >> 3] &= ~(1 << (address & 7));
+    }
+  }
+
+  auto notify(const string& instruction, const string& context, const string& extra = {}) -> void {
+    if(!enabled()) return;
+
+    if(_omitted) {
+      PlatformLog({
+        "[Omitted: ", _omitted, "]\n"}
+      );
+      _omitted = 0;
+    }
+
+    string output{
+      _component, "  ",
+      hex(_address, _addressBits + 3 >> 2), "  ",
+      instruction, "  ",
+      context, "  ",
+      extra
+    };
+    PlatformLog({output.strip(), "\n"});
+  }
+
+  auto serialize(string& output, string depth) -> void override {
+    Tracer::serialize(output, depth);
+    output.append(depth, "  addressBits: ", _addressBits, "\n");
+    output.append(depth, "  addressMask: ", _addressMask, "\n");
+    output.append(depth, "  mask: ", _mask, "\n");
+    output.append(depth, "  depth: ", _depth, "\n");
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Tracer::unserialize(node);
+    _addressBits = node["addressBits"].natural();
+    _addressMask = node["addressMask"].natural();
+    _mask = node["mask"].boolean();
+    _depth = node["depth"].natural();
+
+    setMask(_mask);
+    setDepth(_depth);
+  }
+
+protected:
+  auto updateMasks() -> bool {
+    auto size = 1ull << _addressBits >> _addressMask >> 3;
+    if(!_mask || !size) return _masks.reset(), false;
+    if(_masks.size() == size) return true;
+    _masks.reset();
+    _masks.resize(size);
+    return true;
+  }
+
+  u32  _addressBits = 32;
+  u32  _addressMask = 0;
+  bool _mask = false;
+  u32  _depth = 4;
+
+//unserialized:
+  n64 _address = 0;
+  n64 _omitted = 0;
+  vector<u32> _history;
+  vector<u08> _masks;
+};

ares/ares/node/debugger/tracer/notification.hpp

@@ -0,0 +1,18 @@
+struct Notification : Tracer {
+  DeclareClass(Notification, "debugger.tracer.notification")
+
+  Notification(string name = {}, string component = {}) : Tracer(name, component) {
+  }
+
+  auto notify(const string& message = {}) -> void {
+    if(!enabled()) return;
+
+    if(message) {
+      PlatformLog({_component, " ", _name, ": ", message, "\n"});
+    } else {
+      PlatformLog({_component, " ", _name, "\n"});
+    }
+  }
+
+protected:
+};

ares/ares/node/debugger/tracer/tracer.hpp

@@ -0,0 +1,29 @@
+struct Tracer : Debugger {
+  DeclareClass(Tracer, "debugger.tracer")
+
+  Tracer(string name = {}, string component = {}) : Debugger(name) {
+    _component = component;
+  }
+
+  auto component() const -> string { return _component; }
+  auto enabled() const -> bool { return _enabled; }
+
+  auto setComponent(string component) -> void { _component = component; }
+  auto setEnabled(bool enabled) -> void { _enabled = enabled; }
+
+  auto serialize(string& output, string depth) -> void override {
+    Debugger::serialize(output, depth);
+    output.append(depth, "  component: ", _component, "\n");
+    output.append(depth, "  enabled: ", _enabled, "\n");
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Debugger::unserialize(node);
+    _component = node["component"].string();
+    _enabled = node["enabled"].boolean();
+  }
+
+protected:
+  string _component;
+  bool _enabled = false;
+};

ares/ares/node/input/axis.hpp

@@ -0,0 +1,12 @@
+struct Axis : Input {
+  DeclareClass(Axis, "input.axis")
+  using Input::Input;
+
+  auto value() const -> s64 { return _value; }
+  auto setValue(s64 value) -> void { _value = value; }
+
+protected:
+  s64 _value = 0;
+  s64 _minimum = -32768;
+  s64 _maximum = +32767;
+};

ares/ares/node/input/button.hpp

@@ -0,0 +1,10 @@
+struct Button : Input {
+  DeclareClass(Button, "input.button")
+  using Input::Input;
+
+  auto value() const -> bool { return _value; }
+  auto setValue(bool value) -> void { _value = value; }
+
+protected:
+  bool _value = 0;
+};

ares/ares/node/input/input.hpp

@@ -0,0 +1,4 @@
+struct Input : Object {
+  DeclareClass(Input, "input")
+  using Object::Object;
+};

ares/ares/node/input/rumble.hpp

@@ -0,0 +1,10 @@
+struct Rumble : Input {
+  DeclareClass(Rumble, "input.rumble")
+  using Input::Input;
+
+  auto enable() const -> bool { return _enable; }
+  auto setEnable(bool enable) -> void { _enable = enable; }
+
+protected:
+  bool _enable = 0;
+};

ares/ares/node/input/trigger.hpp

@@ -0,0 +1,12 @@
+struct Trigger : Input {
+  DeclareClass(Trigger, "input.trigger")
+  using Input::Input;
+
+  auto value() const -> s64 { return _value; }
+  auto setValue(s64 value) -> void { _value = value; }
+
+protected:
+  s64 _value = 0;
+  s64 _minimum =      0;
+  s64 _maximum = +32767;
+};

ares/ares/node/node.cpp

@@ -0,0 +1,9 @@
+namespace ares::Core {
+  namespace Video {
+    #include <ares/node/video/sprite.cpp>
+    #include <ares/node/video/screen.cpp>
+  }
+  namespace Audio {
+    #include <ares/node/audio/stream.cpp>
+  }
+}

ares/ares/node/node.hpp

@@ -0,0 +1,185 @@
+namespace ares::Core {
+  struct Object;
+  struct System;
+  struct Peripheral;
+  struct Port;
+  namespace Component {
+    struct Component;
+    struct RealTimeClock;
+  }
+  namespace Video {
+    struct Video;
+    struct Sprite;
+    struct Screen;
+  }
+  namespace Audio {
+    struct Audio;
+    struct Stream;
+  }
+  namespace Input {
+    struct Input;
+    struct Button;
+    struct Axis;
+    struct Trigger;
+    struct Rumble;
+  }
+  namespace Setting {
+    struct Setting;
+    struct Boolean;
+    struct Natural;
+    struct Integer;
+    struct Real;
+    struct String;
+  }
+  namespace Debugger {
+    struct Debugger;
+    struct Memory;
+    struct Graphics;
+    struct Properties;
+    namespace Tracer {
+      struct Tracer;
+      struct Notification;
+      struct Instruction;
+    }
+  }
+}
+
+namespace ares::Node {
+  using Object           = shared_pointer<Core::Object>;
+  using System           = shared_pointer<Core::System>;
+  using Peripheral       = shared_pointer<Core::Peripheral>;
+  using Port             = shared_pointer<Core::Port>;
+  namespace Component {
+    using Component      = shared_pointer<Core::Component::Component>;
+    using RealTimeClock  = shared_pointer<Core::Component::RealTimeClock>;
+  }
+  namespace Video {
+    using Video          = shared_pointer<Core::Video::Video>;
+    using Sprite         = shared_pointer<Core::Video::Sprite>;
+    using Screen         = shared_pointer<Core::Video::Screen>;
+  }
+  namespace Audio {
+    using Audio          = shared_pointer<Core::Audio::Audio>;
+    using Stream         = shared_pointer<Core::Audio::Stream>;
+  }
+  namespace Input {
+    using Input          = shared_pointer<Core::Input::Input>;
+    using Button         = shared_pointer<Core::Input::Button>;
+    using Axis           = shared_pointer<Core::Input::Axis>;
+    using Trigger        = shared_pointer<Core::Input::Trigger>;
+    using Rumble         = shared_pointer<Core::Input::Rumble>;
+  }
+  namespace Setting {
+    using Setting        = shared_pointer<Core::Setting::Setting>;
+    using Boolean        = shared_pointer<Core::Setting::Boolean>;
+    using Natural        = shared_pointer<Core::Setting::Natural>;
+    using Integer        = shared_pointer<Core::Setting::Integer>;
+    using Real           = shared_pointer<Core::Setting::Real>;
+    using String         = shared_pointer<Core::Setting::String>;
+  }
+  namespace Debugger {
+    using Debugger       = shared_pointer<Core::Debugger::Debugger>;
+    using Memory         = shared_pointer<Core::Debugger::Memory>;
+    using Graphics       = shared_pointer<Core::Debugger::Graphics>;
+    using Properties     = shared_pointer<Core::Debugger::Properties>;
+    namespace Tracer {
+      using Tracer       = shared_pointer<Core::Debugger::Tracer::Tracer>;
+      using Notification = shared_pointer<Core::Debugger::Tracer::Notification>;
+      using Instruction  = shared_pointer<Core::Debugger::Tracer::Instruction>;
+    }
+  }
+}
+
+namespace ares::Core {
+  // <ares/platform.hpp> forward declarations
+  static auto PlatformAttach(Node::Object) -> void;
+  static auto PlatformDetach(Node::Object) -> void;
+  static auto PlatformLog(string_view) -> void;
+
+  #include <ares/node/attribute.hpp>
+  #include <ares/node/class.hpp>
+  #include <ares/node/object.hpp>
+  #include <ares/node/system.hpp>
+  #include <ares/node/peripheral.hpp>
+  #include <ares/node/port.hpp>
+  namespace Component {
+    #include <ares/node/component/component.hpp>
+    #include <ares/node/component/real-time-clock.hpp>
+  }
+  namespace Video {
+    #include <ares/node/video/video.hpp>
+    #include <ares/node/video/sprite.hpp>
+    #include <ares/node/video/screen.hpp>
+  }
+  namespace Audio {
+    #include <ares/node/audio/audio.hpp>
+    #include <ares/node/audio/stream.hpp>
+  }
+  namespace Input {
+    #include <ares/node/input/input.hpp>
+    #include <ares/node/input/button.hpp>
+    #include <ares/node/input/axis.hpp>
+    #include <ares/node/input/trigger.hpp>
+    #include <ares/node/input/rumble.hpp>
+  }
+  namespace Setting {
+    #include <ares/node/setting/setting.hpp>
+    #include <ares/node/setting/boolean.hpp>
+    #include <ares/node/setting/natural.hpp>
+    #include <ares/node/setting/integer.hpp>
+    #include <ares/node/setting/real.hpp>
+    #include <ares/node/setting/string.hpp>
+  }
+  namespace Debugger {
+    #include <ares/node/debugger/debugger.hpp>
+    #include <ares/node/debugger/memory.hpp>
+    #include <ares/node/debugger/graphics.hpp>
+    #include <ares/node/debugger/properties.hpp>
+    namespace Tracer {
+      #include <ares/node/debugger/tracer/tracer.hpp>
+      #include <ares/node/debugger/tracer/notification.hpp>
+      #include <ares/node/debugger/tracer/instruction.hpp>
+    }
+  }
+}
+
+namespace ares::Node {
+  static inline auto create(string identifier) -> Object {
+    return Core::Class::create(identifier);
+  }
+
+  static inline auto serialize(Object node) -> string {
+    if(!node) return {};
+    string result;
+    node->serialize(result, {});
+    return result;
+  }
+
+  static inline auto unserialize(string markup) -> Object {
+    auto document = BML::unserialize(markup);
+    if(!document) return {};
+    auto node = Core::Class::create(document["node"].string());
+    node->unserialize(document["node"]);
+    return node;
+  }
+
+  static inline auto parent(Object child) -> Object {
+    if(!child || !child->parent()) return {};
+    if(auto parent = child->parent().acquire()) return parent;
+    return {};
+  }
+
+  template<typename T>
+  static inline auto find(Object from, string name) -> Object {
+    if(!from) return {};
+    if(auto object = from->find<T>(name)) return object;
+    return {};
+  }
+
+  template<typename T>
+  static inline auto enumerate(Object from) -> vector<T> {
+    vector<T> objects;
+    if(from) from->enumerate<T>(objects);
+    return objects;
+  }
+}

ares/ares/node/object.hpp

@@ -0,0 +1,235 @@
+//identifier is static, allowing template<typename T> to access via T::identifier
+//identity() is virtual, allowing T* to access via T->identity()
+
+#define DeclareClass(Type, Name) \
+  static inline const string identifier = Name; \
+  static auto create() -> Node::Object { return new Type; } \
+  auto identity() const -> string override { return Name; } \
+  private: static inline Class::Register<Type> register; public: \
+
+struct Object : shared_pointer_this<Object> {
+  static inline const string identifier = "Object";
+  static auto create() -> Node::Object { return new Object; }
+  virtual auto identity() const -> string { return "Object"; }
+  private: static inline Class::Register<Object> register; public:
+//DeclareClass(Object, "object")
+
+  Object(string name = {}) : _name(name) {}
+  virtual ~Object() = default;
+
+  auto name() const -> string { return _name; }
+  auto parent() const -> shared_pointer_weak<Object> { return _parent; }
+
+  auto setName(string_view name) -> void { _name = name; }
+
+  auto prepend(Node::Object node) -> Node::Object {
+    if(auto found = find(node)) return found;
+    _nodes.prepend(node);
+    node->_parent = shared();
+    PlatformAttach(node);
+    return node;
+  }
+
+  template<typename T, typename... P>
+  auto prepend(P&&... p) -> Node::Object {
+    using Type = typename T::type;
+    return prepend(shared_pointer<Type>::create(forward<P>(p)...));
+  }
+
+  auto append(Node::Object node) -> Node::Object {
+    if(auto found = find(node)) return found;
+    _nodes.append(node);
+    node->_parent = shared();
+    PlatformAttach(node);
+    return node;
+  }
+
+  template<typename T, typename... P>
+  auto append(P&&... p) -> Node::Object {
+    using Type = typename T::type;
+    return append(shared_pointer<Type>::create(forward<P>(p)...));
+  }
+
+  auto remove(Node::Object node) -> void {
+    if(auto index = _nodes.find(node)) {
+      PlatformDetach(node);
+      node->reset();
+      node->_parent.reset();
+      _nodes.remove(*index);
+    }
+  }
+
+  auto reset() -> void {
+    for(auto& node : _nodes) {
+      PlatformDetach(node);
+      node->reset();
+      node->_parent.reset();
+    }
+    _nodes.reset();
+  }
+
+  template<typename T>
+  auto cast() -> shared_pointer<typename T::type> {
+    if(dynamic_cast<typename T::type*>(this)) return shared();
+    return {};
+  }
+
+  template<typename T>
+  auto is() -> bool {
+    return (bool)cast<T>();
+  }
+
+  template<typename T>
+  auto find() -> vector<shared_pointer<typename T::type>> {
+    vector<shared_pointer<typename T::type>> result;
+    if(dynamic_cast<typename T::type*>(this)) {
+      if(auto instance = shared()) result.append(instance);
+    }
+    for(auto& node : _nodes) result.append(node->find<T>());
+    return result;
+  }
+
+  template<typename T>
+  auto find(u32 index) -> shared_pointer<typename T::type> {
+    auto result = find<T>();
+    if(index < result.size()) return result[index];
+    return {};
+  }
+
+  auto find(Node::Object source) -> Node::Object {
+    if(!source) return {};
+    for(auto& node : _nodes) {
+      if(node->identity() == source->identity() && node->_name == source->_name) return node;
+    }
+    return {};
+  }
+
+  template<typename T = Node::Object>
+  auto find(string name) -> T {
+    using Type = typename T::type;
+    auto path = name.split("/");
+    name = path.takeFirst();
+    for(auto& node : _nodes) {
+      if(node->_name != name) continue;
+      if(path) return node->find<T>(path.merge("/"));
+      if(node->identity() == Type::identifier) return node;
+    }
+    return {};
+  }
+
+  template<typename T = Node::Object>
+  auto scan(string name) -> T {
+    using Type = typename T::type;
+    for(auto& node : _nodes) {
+      if(node->identity() == Type::identifier && node->_name == name) return node;
+      if(auto result = node->scan<T>(name)) return result;
+    }
+    return {};
+  }
+
+  template<typename T>
+  auto enumerate(vector<T>& objects) -> void {
+    using Type = typename T::type;
+    if(auto instance = cast<T>()) objects.append(instance);
+    for(auto& node : _nodes) node->enumerate<T>(objects);
+  }
+
+  auto pak() -> VFS::Pak {
+    return _pak;
+  }
+
+  auto setPak(VFS::Pak pak) -> bool {
+    _pak = pak;
+    return (bool)_pak;
+  }
+
+  template<typename T = string>
+  auto attribute(const string& name) const -> T {
+    if(auto attribute = _attributes.find(name)) {
+      if(attribute->value.is<T>()) return attribute->value.get<T>();
+    }
+    return {};
+  }
+
+  template<typename T = string>
+  auto hasAttribute(const string& name) const -> bool {
+    if(auto attribute = _attributes.find(name)) {
+      if(attribute->value.is<T>()) return true;
+    }
+    return false;
+  }
+
+  template<typename T = string, typename U = string>
+  auto setAttribute(const string& name, const U& value = {}) -> void {
+    if constexpr(is_same_v<T, string> && !is_same_v<U, string>) return setAttribute(name, string{value});
+    if(auto attribute = _attributes.find(name)) {
+      if((const T&)value) attribute->value = (const T&)value;
+      else _attributes.remove(*attribute);
+    } else {
+      if((const T&)value) _attributes.insert({name, (const T&)value});
+    }
+  }
+
+  virtual auto load(Node::Object source) -> bool {
+    if(!source || identity() != source->identity() || _name != source->_name) return false;
+    _attributes = source->_attributes;
+    return true;
+  }
+
+  auto save() -> string {
+    string markup;
+    serialize(markup, {});
+    return markup;
+  }
+
+  virtual auto serialize(string& output, string depth) -> void {
+    output.append(depth, "node: ", identity(), "\n");
+    output.append(depth, "  name: ", _name, "\n");
+    for(auto& attribute : _attributes) {
+      if(!attribute.value.is<string>()) continue;
+      output.append(depth, "  attribute\n");
+      output.append(depth, "    name: ", attribute.name, "\n");
+      output.append(depth, "    value: ", attribute.value.get<string>(), "\n");
+    }
+    depth.append("  ");
+    for(auto& node : _nodes) {
+      node->serialize(output, depth);
+    }
+  }
+
+  virtual auto unserialize(Markup::Node markup) -> void {
+    if(!markup) return;
+    _name = markup["name"].string();
+    _attributes.reset();
+    for(auto& attribute : markup.find("attribute")) {
+      _attributes.insert({attribute["name"].string(), attribute["value"].string()});
+    }
+    for(auto& leaf : markup.find("node")) {
+      auto node = Class::create(leaf.string());
+      append(node);
+      node->unserialize(leaf);
+    }
+  }
+
+  virtual auto copy(Node::Object source) -> void {
+    _attributes = source->_attributes;
+    for(auto& from : source->_nodes) {
+      for(auto& to : _nodes) {
+        if(from->identity() != to->identity()) continue;
+        if(from->name() != to->name()) continue;
+        to->copy(from);
+        break;
+      }
+    }
+  }
+
+  auto begin() { return _nodes.begin(); }
+  auto end() { return _nodes.end(); }
+
+protected:
+  string _name;
+  VFS::Pak _pak;
+  set<Attribute> _attributes;
+  shared_pointer_weak<Object> _parent;
+  vector<Node::Object> _nodes;
+};

ares/ares/node/peripheral.hpp

@@ -0,0 +1,4 @@
+struct Peripheral : Object {
+  DeclareClass(Peripheral, "peripheral")
+  using Object::Object;
+};

ares/ares/node/port.hpp

@@ -0,0 +1,74 @@
+struct Port : Object {
+  DeclareClass(Port, "port")
+  using Object::Object;
+
+  auto type() const -> string { return _type; }
+  auto family() const -> string { return _family; }
+  auto hotSwappable() const -> bool { return _hotSwappable; }
+  auto supported() const -> vector<string> { return _supported; }
+
+  auto setAllocate(function<Node::Peripheral (string)> allocate) -> void { _allocate = allocate; }
+  auto setConnect(function<void ()> connect) -> void { _connect = connect; }
+  auto setDisconnect(function<void ()> disconnect) -> void { _disconnect = disconnect; }
+  auto setType(string type) -> void { _type = type; }
+  auto setFamily(string family) -> void { _family = family; }
+  auto setHotSwappable(bool hotSwappable) -> void { _hotSwappable = hotSwappable; }
+  auto setSupported(vector<string> supported) -> void { _supported = supported; }
+
+  auto connected() -> Node::Peripheral {
+    return find<Node::Peripheral>(0);
+  }
+
+  auto allocate(string name = {}) -> Node::Peripheral {
+    disconnect();
+    if(_allocate) return _allocate(name);
+    return {};
+  }
+
+  auto connect() -> void {
+    if(_connect) _connect();
+  }
+
+  auto disconnect() -> void {
+    if(auto peripheral = connected()) {
+      if(_disconnect) _disconnect();
+      remove(peripheral);
+    }
+  }
+
+  auto serialize(string& output, string depth) -> void override {
+    Object::serialize(output, depth);
+    output.append(depth, "  type: ", _type, "\n");
+    output.append(depth, "  family: ", _family, "\n");
+    output.append(depth, "  hotSwappable: ", _hotSwappable, "\n");
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Object::unserialize(node);
+    _type = node["type"].string();
+    _family = node["family"].string();
+    _hotSwappable = node["hotSwappable"].boolean();
+  }
+
+  auto copy(Node::Object object) -> void override {
+    if(auto source = object->cast<Node::Port>()) {
+      Object::copy(source);
+      if(auto peripheral = source->find<Node::Peripheral>(0)) {
+        if(auto node = allocate(peripheral->name())) {
+          node->copy(peripheral);
+          connect();
+          node->copy(peripheral);
+        }
+      }
+    }
+  }
+
+protected:
+  function<Node::Peripheral (string)> _allocate;
+  function<void ()> _connect;
+  function<void ()> _disconnect;
+  string _type;
+  string _family;
+  bool _hotSwappable = false;
+  vector<string> _supported;
+};

ares/ares/node/setting/boolean.hpp

@@ -0,0 +1,36 @@
+struct Boolean : Setting {
+  DeclareClass(Boolean, "setting.boolean")
+
+  Boolean(string name = {}, bool value = {}, function<void (bool)> modify = {}) : Setting(name) {
+    _currentValue = value;
+    _latchedValue = value;
+    _modify = modify;
+  }
+
+  auto modify(bool value) const -> void { if(_modify) return _modify(value); }
+  auto value() const -> bool { return _currentValue; }
+  auto latch() const -> bool { return _latchedValue; }
+
+  auto setModify(function<void (bool)> modify) { _modify = modify; }
+
+  auto setValue(bool value) -> void {
+    _currentValue = value;
+    if(_dynamic) setLatch();
+  }
+
+  auto setLatch() -> void override {
+    if(_latchedValue == _currentValue) return;
+    _latchedValue = _currentValue;
+    modify(_latchedValue);
+  }
+
+  auto readValue() const -> string override { return value(); }
+  auto readLatch() const -> string override { return latch(); }
+  auto readAllowedValues() const -> vector<string> override { return {"false", "true"}; }
+  auto writeValue(string value) -> void override { setValue(value.boolean()); }
+
+protected:
+  function<void (bool)> _modify;
+  bool _currentValue = {};
+  bool _latchedValue = {};
+};

ares/ares/node/setting/integer.hpp

@@ -0,0 +1,47 @@
+struct Integer : Setting {
+  DeclareClass(Integer, "setting.integer")
+
+  Integer(string name = {}, s64 value = {}, function<void (s64)> modify = {}) : Setting(name) {
+    _currentValue = value;
+    _latchedValue = value;
+    _modify = modify;
+  }
+
+  auto modify(s64 value) const -> void { if(_modify) return _modify(value); }
+  auto value() const -> s64 { return _currentValue; }
+  auto latch() const -> s64 { return _latchedValue; }
+
+  auto setModify(function<void (s64)> modify) { _modify = modify; }
+
+  auto setValue(s64 value) -> void {
+    if(_allowedValues && !_allowedValues.find(value)) return;
+    _currentValue = value;
+    if(_dynamic) setLatch();
+  }
+
+  auto setLatch() -> void override {
+    if(_latchedValue == _currentValue) return;
+    _latchedValue = _currentValue;
+    modify(_latchedValue);
+  }
+
+  auto setAllowedValues(vector<s64> allowedValues) -> void {
+    _allowedValues = allowedValues;
+    if(_allowedValues && !_allowedValues.find(_currentValue)) setValue(_allowedValues.first());
+  }
+
+  auto readValue() const -> string override { return value(); }
+  auto readLatch() const -> string override { return latch(); }
+  auto readAllowedValues() const -> vector<string> override {
+    vector<string> values;
+    for(auto value : _allowedValues) values.append(value);
+    return values;
+  }
+  auto writeValue(string value) -> void override { setValue(value.integer()); }
+
+protected:
+  function<void (s64)> _modify;
+  s64 _currentValue = {};
+  s64 _latchedValue = {};
+  vector<s64> _allowedValues;
+};

ares/ares/node/setting/natural.hpp

@@ -0,0 +1,47 @@
+struct Natural : Setting {
+  DeclareClass(Natural, "setting.natural")
+
+  Natural(string name = {}, u64 value = {}, function<void (u64)> modify = {}) : Setting(name) {
+    _currentValue = value;
+    _latchedValue = value;
+    _modify = modify;
+  }
+
+  auto modify(u64 value) const -> void { if(_modify) return _modify(value); }
+  auto value() const -> u64 { return _currentValue; }
+  auto latch() const -> u64 { return _latchedValue; }
+
+  auto setModify(function<void (u64)> modify) { _modify = modify; }
+
+  auto setValue(u64 value) -> void {
+    if(_allowedValues && !_allowedValues.find(value)) return;
+    _currentValue = value;
+    if(_dynamic) setLatch();
+  }
+
+  auto setLatch() -> void override {
+    if(_latchedValue == _currentValue) return;
+    _latchedValue = _currentValue;
+    modify(_latchedValue);
+  }
+
+  auto setAllowedValues(vector<u64> allowedValues) -> void {
+    _allowedValues = allowedValues;
+    if(_allowedValues && !_allowedValues.find(_currentValue)) setValue(_allowedValues.first());
+  }
+
+  auto readValue() const -> string override { return value(); }
+  auto readLatch() const -> string override { return latch(); }
+  auto readAllowedValues() const -> vector<string> override {
+    vector<string> values;
+    for(auto value : _allowedValues) values.append(value);
+    return values;
+  }
+  auto writeValue(string value) -> void override { setValue(value.natural()); }
+
+protected:
+  function<void (u64)> _modify;
+  u64 _currentValue = {};
+  u64 _latchedValue = {};
+  vector<u64> _allowedValues;
+};

ares/ares/node/setting/real.hpp

@@ -0,0 +1,47 @@
+struct Real : Setting {
+  DeclareClass(Real, "setting.real")
+
+  Real(string name = {}, f64 value = {}, function<void (f64)> modify = {}) : Setting(name) {
+    _currentValue = value;
+    _latchedValue = value;
+    _modify = modify;
+  }
+
+  auto modify(f64 value) const -> void { if(_modify) return _modify(value); }
+  auto value() const -> f64 { return _currentValue; }
+  auto latch() const -> f64 { return _latchedValue; }
+
+  auto setModify(function<void (f64)> modify) { _modify = modify; }
+
+  auto setValue(f64 value) -> void {
+    if(_allowedValues && !_allowedValues.find(value)) return;
+    _currentValue = value;
+    if(_dynamic) setLatch();
+  }
+
+  auto setLatch() -> void override {
+    if(_latchedValue == _currentValue) return;
+    _latchedValue = _currentValue;
+    modify(_latchedValue);
+  }
+
+  auto setAllowedValues(vector<f64> allowedValues) -> void {
+    _allowedValues = allowedValues;
+    if(_allowedValues && !_allowedValues.find(_currentValue)) setValue(_allowedValues.first());
+  }
+
+  auto readValue() const -> string override { return value(); }
+  auto readLatch() const -> string override { return latch(); }
+  auto readAllowedValues() const -> vector<string> override {
+    vector<string> values;
+    for(auto value : _allowedValues) values.append(value);
+    return values;
+  }
+  auto writeValue(string value) -> void override { setValue(value.real()); }
+
+protected:
+  function<void (f64)> _modify;
+  f64 _currentValue = {};
+  f64 _latchedValue = {};
+  vector<f64> _allowedValues;
+};

ares/ares/node/setting/setting.hpp

@@ -0,0 +1,46 @@
+struct Setting : Object {
+  DeclareClass(Setting, "setting")
+  using Object::Object;
+
+  auto dynamic() const -> bool { return _dynamic; }
+
+  auto setDynamic(bool dynamic) -> void {
+    _dynamic = dynamic;
+  }
+
+  virtual auto setLatch() -> void {}
+
+  virtual auto readValue() const -> string { return {}; }
+  virtual auto readLatch() const -> string { return {}; }
+  virtual auto readAllowedValues() const -> vector<string> { return {}; }
+  virtual auto writeValue(string value) -> void {}
+
+  auto load(Node::Object source) -> bool override {
+    if(!Object::load(source)) return false;
+    if(auto setting = source->cast<shared_pointer<Setting>>()) writeValue(setting->readValue());
+    return true;
+  }
+
+  auto copy(Node::Object object) -> void override {
+    if(auto source = object->cast<Node::Setting::Setting>()) {
+      Object::copy(source);
+      writeValue(source->readValue());
+      setLatch();
+    }
+  }
+
+  auto serialize(string& output, string depth) -> void override {
+    Object::serialize(output, depth);
+    output.append(depth, "  dynamic: ", _dynamic, "\n");
+    output.append(depth, "  value: ", readValue(), "\n");
+  }
+
+  auto unserialize(Markup::Node node) -> void override {
+    Object::unserialize(node);
+    _dynamic = node["dynamic"].boolean();
+    writeValue(node["value"].string());
+  }
+
+protected:
+  bool _dynamic = false;
+};

ares/ares/node/setting/string.hpp

@@ -0,0 +1,43 @@
+struct String : Setting {
+  DeclareClass(String, "setting.string")
+
+  String(string name = {}, string value = {}, function<void (string)> modify = {}) : Setting(name) {
+    _currentValue = value;
+    _latchedValue = value;
+    _modify = modify;
+  }
+
+  auto modify(string value) const -> void { if(_modify) return _modify(value); }
+  auto value() const -> string { return _currentValue; }
+  auto latch() const -> string { return _latchedValue; }
+
+  auto setModify(function<void (string)> modify) { _modify = modify; }
+
+  auto setValue(string value) -> void {
+    if(_allowedValues && !_allowedValues.find(value)) return;
+    _currentValue = value;
+    if(_dynamic) setLatch();
+  }
+
+  auto setLatch() -> void override {
+    if(_latchedValue == _currentValue) return;
+    _latchedValue = _currentValue;
+    modify(_latchedValue);
+  }
+
+  auto setAllowedValues(vector<string> allowedValues) -> void {
+    _allowedValues = allowedValues;
+    if(_allowedValues && !_allowedValues.find(_currentValue)) setValue(_allowedValues.first());
+  }
+
+  auto readValue() const -> string override { return value(); }
+  auto readLatch() const -> string override { return latch(); }
+  auto readAllowedValues() const -> vector<string> override { return _allowedValues; }
+  auto writeValue(string value) -> void override { setValue(value); }
+
+protected:
+  function<void (string)> _modify;
+  string _currentValue = {};
+  string _latchedValue = {};
+  vector<string> _allowedValues;
+};