Ares checked each of the two input arguments to three-ops functions
separately, but this is not correct. Conditions causing unimplemented
operation on either input (sNAN, subnormal) take precedence on
conditions causing invalid operation on either input (qNAN).
After this fix, Ares passes n64-systemtest COP1 stress test.
Adds a cheat editor to Tools->Cheats when a game is loaded.
The cheat editor should work for all systems except N64 and PS1: support for these will come later.
The code has currently only been tested for MS, MD and SFC but it is assumed all the other systems are also functioning; the code paths are the same.
Code format is standard patch codes in the format X:Y where X is a memory address and Y is a value to place there; most emulators also support this format.
You can use multiple codes in a single cheat by separating codes with a + sign.
Cheats that require memory comparisons are not currently supported, only replacements
Cheats are saved alongside the roms, eg "Game.sfc" will create "Game.cheats.bml".
607158516 Improve serialize interface
dd73cb873 Implement serialization interface
5d2d7cd59 Improve PPC branch support
8b8b6b442 Improve ARM32 branch support
2cfed9ce4 Improve x86, ARM-T2 branch support
6c75e773c Improve riscv branch support
dfeb8cf68 Add extraction macros for operands
dc52b334e Fix typo (#229)
7a821cd71 Add LoongArch float to integer conversion special cases (#226)
cbde0bea6 regex: allow building with a C++ compiler (#224)
40680870e Fix masked shift on arm32
a0643952a Fix sljit_get_register_index on x86-32
80bdff333 Support temporary registers in sljit_get_register_index
4629814f8 riscv: fix getput_arg and load_addr_to_reg (#223)
a26427a6e define float to integer conversion special cases
42128180d build: make code mostly ANSI C89 compatible (#221)
57c212f58 loongarch: fix FTBFS when building pcre2test as part of PCRE2 (#220)
3faacd431 Optimize certain fop1 operations on x86
4f33321c1 Move float/call/simd tests to separate files
230429241 Add another temp register on s390x
fbf9c47f3 Support access to temporary registers
8c5c50463 Implement simd on s390x
02e76fb14 s390x: fix FTBFS with clang (#219)
0bd5147fc Implement simd2 operations
git-subtree-dir: thirdparty/sljit
git-subtree-split: 6071585164d9a38a8890cfd2722ca9d8492528bb
Not required anymore, possibly for a long time. IPL3 does that, plus
this creates correctness issues with open source IPL3 which *doesn't*
initialize those memory locations.
Addresses a few cases where the current horizontal sprite mosaic
implementation is incorrect:
- Transparent pixels should be affected by horizontal sprite mosaic
effects
- If the latched pixel does not have the sprite mosaic effect enabled,
the next pixel should always be latched
- Mosaic offset should not be reset to 0 at the start of a new
horizontal mosaic effect
Accounting for these cases improves visual accuracy of sprite mosaic
effects. This is easily visible in test cases such as
[sprite-hmosaic.gba](https://github.com/nba-emu/hw-test/tree/master/ppu/sprite-hmosaic),
and [Tonc's mosaic demo](https://www.coranac.com/projects/#tonc)
(mos_demo.gba, from tonc-bin.zip v1.4.2).
I've lately discovered that misaligned PI DMA is also affected by RDRAM
writes that must cross RDRAM row boundaries (2048 bytes). It is obvious
in retrospect that the DMA implementation cannot generate a write burst
across different rows, so its internal buffering must be segmented on
RDRAM row boundaries.
The PI DMA testsuite has been updated to cover this edge case as well:
https://github.com/rasky/n64_pi_dma_test
Ares now passes the updated testsuite in full (timing aside, which is
close but not perfect).
This updates most pre-32bit systems to have hardware accurate borders and
aspect ratio where known, reasonable estimates are used where not known.
This also means that PAL games will use the correct PAL aspect rather than
using the NTSC pixel aspect ratio.
All TMS9918 VDP based consoles are thought to be be correct, as are Master
System, Mega Drive, and NES, while SNES and PC-Engine are (educated)
estimates.
The overscan option has been reworked to crop all non-desirable edges of the
screen, including borders and areas that often contain garbage data, previously
this option only cropped the bottom 16 lines of active display.
The reworked overscan is not yet implemented for Atari 2600, PC-Engine, N64 or
PlayStation.
According to NanoBoyAdvance author fleroviux, the prefetch buffer should
be reset on any ROM accesses from the CPU or DMA. This PR implements
this behaviour for CPU ROM accesses. This allows ares to pass 1760/2020
of the timing tests in the mGBA test suite (up from 1608/2020).
Allowing DMA ROM accesses to clear the prefetch buffer seems to worsen
timings at the moment, possibly due to some other timing issues that
also come into effect in these situations. I've left comments to make a
note of the issue, so that resetting the prefetch buffer on ROM accesses
from DMA can be implemented once it becomes beneficial to do so.
The readme references `libsdl2-0.0` which does not exist:
https://packages.ubuntu.com/search?suite=default§ion=all&arch=any&keywords=libsdl2-0.0&searchon=names
I'm not sure it's even useful mentioning `libsdl2-2.0-0` since
`libsdl2-dev` depends on it. Maybe for distributing ares you would then
know people have to install `libsdl2-2.0-0` I guess
Also added a note that SDL2 input allows using a controller on *nix as I
haven't seen that documented anywhere
And I fixed a random makefile indentation issue that messed with my
head.
* Fix the firmware search path not being saved or loaded from the
settings file.
* Fix `FirmwareSettings::findFirmware` not using the right casing when
locating the firmware directory.
Contains three main changes:
* In `Path::program()`, account for the macOS app bundle, so that
portable config support works with the app bundle.
* Create a new function `Path::resources()` for the resources path,
since `Path::program()` can no longer trivially be used to construct the
bundle resources path (no guarantee what the .app is named). On macOS
this returns the path to "ares.app/Contents/Resources", on other
platforms (in case they use it in the future) it just returns the same
as `Path::program()`.
* Fix an issue where, if Ares is stored in a sub-directory of the
desktop, the path settings UI will display paths next to the program as
relative to the desktop instead of relative to the program directory.
When performing a DMA with source and destination addresses both in
cartridge memory, the first write should use sequential access timings.
Implementing this in ares gives more accurate timings for ROM to ROM
DMAs than the previous approach, which instead removed the 2-cycle DMA
starting delay in these cases.
ISViewer is currently gated by the homebrew mode flag. It seems like
this is not ideal for rom hackers because they would still need a way to
log but homebrew mode is too verbose for them and hide the ISViewer
messages in streams of actual problems in game code that they don't
intend to fix. So restore ISViewer functionality without homebrew mode.
This closes the socket server after each successful connection so that
new connections are immediately refused. Before, given that the server
socket was always in listen mode, one additional connection could always
be estabilished at the TCP level, even though the server wouldn't accept
it right away.
Currently, when a client disconnects, the server in Ares fails to notice
and to call the onDisconnect hook, which in turns cause the server to
stop responding (it won't accept a new client, and will never receive
more data from the disconnected one).
This commit fixes it by correctly handling the recv() return code to
detect peer disconnections (return value 0) and any other kind of error
(return value < 0).
Commercial GBA games contain strings in the ROM that correspond to a
save type (e.g. SRAM, flash memory, EEPROM), followed by 3 digits. These
strings are used by ares to detect what save type to use. However, when
running [jsmolka's SRAM and flash memory save
tests](https://github.com/jsmolka/gba-tests/tree/master/save), ares does
not detect a save type, since the programs lack the 3 digits at the end
of the save type string. This PR ignores the trailing digits during save
type detection, since it's likely that many other homebrew programs are
affected by the same issue ([GBATEK even advises developers to not add
digits when including save type
strings](https://problemkaputt.de/gbatek-gba-cart-backup-ids.htm)).
Depending on which cycle they read values from registers, instructions
will read a different PC value. This is handled in ares by adding an
offset to the program counter (r15) value in affected cases. This PR
applies the offset in a few instructions that are affected by this
behaviour, but were previously not covered.
ARM and Thumb mode variants of the ldmia and stmia instructions use a
shared pattern of sequential and nonsequential memory accesses. The
correct pattern was already implemented in ARM mode, and this PR applies
the same pattern to Thumb mode, making the timings of these instructions
more accurate.
### Description
Adds SDL (properly) to Mac builds.
This time, it has been added as a fully fledged optional dependency in
`thirdparty`, à la MoltenVK, and built from source before ares. We build
from source because brew installations are both single-architecture and
not fully portable.
The .dylib is copied inside the app bundle when linking, at the same
stage as MoltenVK.
The initialization of `ares.dylibs` has been moved from ares's Makefile
to the `desktop-ui` Makefile so that it's initialized when building
ruby, which it wasn't previously.
The SDL build is also added to CI, with the same caching methods as used
for MVK.
### Relevant Details
`HEAD` points at SDL 2.28.5 currently, which is the most recent stable
release. This should probably be periodically incremented as
appropriate.
~~SDL is currently built with the macOS deployment target of 10.13.
While SDL's minimum supported macOS version is 10.11, ares CI is using
Xcode 14.2, which has a minimum deployment target of 10.13. I am
currently testing to see if I can get the deployment target lower
without breaking other parts of ares's CI.~~ resolved, per below; SDL
supporting 10.11 is built + bundled.
### Testing
This has been tested to build properly locally and via GitHub CI. The
.dylib is packaged inside the bundle correctly and SDL functions
correctly in my testing, even if the user does not have SDL installed
elsewhere on their system.
This is seeking tests from other Mac users, especially on older
operating systems, to verify that SDL works correctly there.
Co-authored-by: jcm <[email protected]>
Added the minimum macOS version key, but kept it at 10.9 which is what
macOS currently reports it as.
Now that the key is here, it will be easier to update it in the future.
Also added the copyright line attributing the ares team and
contributors.
Some issues I noticed while playing with this on macOS. Took a bit of a
deep dive and attempted to fix them up:
- changing the tracer settings did not seem to change what was logged.
seems to be the row isn't selected when the `onToggle` callback is
called. solution was to instead use the toggled `cell` to get the row
its in. this caused some C++ template issues but removing the `auto`
fixes them all (the alternative being adding `template` to a few method
calls, I should add I'm not a C++ programmer so from my limited
understanding this was the best solution)
- text in text fields were invisible. this was due to
`setForegroundColor` in the macOS backend not properly handling a
0,0,0,0 color. changed to perform the ternary on the `Color` rather than
the `NSColor` (`SystemColor` did not support the ternary)
merry christmas :)
Currently, the n64 core is limited to ROMs whose size is 63.9375 MiB
(also known as 64 MiB - 64 KiB). The reason is twofold: first, only 64
MiB are actually mapped in the PI bus; second, the last 64 KiB are
shadowed by the ISViewer debugging device.
ISViewer addresses sit in the last 64 KiB of the 64th MiB, so when the
ROM is larger than that (for instance, it is exactly 64 MiB), we should
simply disable ISViewer. In the long run, there will be a better
debugging solution which doesn't sit in the PI address space anyway.
Moreover, N64 supports basically ROM of unlimited size, there is no 64
MiB limit. This commit also allows that by simply mapping the whole ROM
into the PI address bus, whatever the actual size is.
When doing PIF HLE emulation, we run the HLE state machine just once per
frame. This is OK in general, but there can be a few situations where
this can cause PIF to miss one command from CPU. For instance, a ROM
might send the PIF boot termination command (0x8) and then shortly after
issue a SI DMA to identify controllers. If the two happen within the
same frame, our HLE emulation would miss the boot termination command.
This commit updates the HLE state machine also after each write to PIF
RAM.
Originally found by vmicka72, so credits to them. Documented as issue:
https://github.com/ares-emulator/ares/issues/1275 and confirmed by
TascoDLX.
Since it is easy and straightforward, no sense in letting it hang
around.
Some unmapped I/O registers on the GBA always return 0 when read. This
pull request implements the required behaviour on six registers that
previously used open bus behaviour instead, allowing ares to pass all
remaining I/O read tests in the mGBA test suite.
Added "Xin1" mapper for the ColecoVision, this mapper supports:
- 31-in-1 (v1.1) ( 2013 )
- 63-in-1 (v1.0) ( 2013/0 1)
Both carts are by "Buzz and ZX-81", and i tested all games for both
multis and they all at least boot perfectly fine
And the "MegaCart" mapper, this mapper automaticly triggers for any rom
over 32k that isnt known to be another mapper (like the "xin1" mapper).
it all should be well with all homebrew games that requite the MegaCart
hardware.
If anyone knows of any other ColecoVision carts like these let me know
and I'll try to add them.
---------
Co-authored-by: Luke Usher <[email protected]>
General fixes:
- model data lines separately from output data latches
- update data lines after control register writes
- distinguish between driven and floating data lines
- remove redundant data latch state from devices
- separate host input polling from data line synthesis
6 button/fighting pad fixes:
- reset timeout only on TH 0->1 transitions
- remain in last phase until timeout (don't wrap)
- read back C/B button state along with M/X/Y/Z
Mega mouse:
- remove erroneous thread synchronize on attach which could crash ares
Affected titles:
- Decap Attack (MD)
- Trouble Shooter/Battle Mania (MD)
- WWF Raw (32X)
### Description
Up to this point, SDL as an input library has not been present in macOS
builds. The plumbing was already in place for macOS to make use of SDL,
but SDL was not actually linked. This PR rectifies that. Seemingly
unnecessary references to the IOKit joypad are also removed from
`sdl.cpp`.
To facilitate adding SDL to ruby for macOS, a stubbed out macOS mouse
driver, `gcmouse.cpp`, has been added, to avoid needing to make numerous
modifications to `sdl.cpp` to work around mouse-related code.
### Motivation
The legacy macOS input uses raw values from IOKit, which are not
available for all supported controllers, and where present, are
uncalibrated and generally not ideal. SDL's input support is much more
advanced comparatively, properly handling and interpolating input from a
wide variety of controllers where raw IOKit input values aren't
sufficient. This should resolve a number of situations where ares won't
recognize input from controllers connected to macOS machines, among
other macOS input-related issues.
### Discussion
I am not super well-acquainted with ares's code and build system, and
it's entirely probable that I missed something here or went about this
not-quite-correctly; I did so as straightforwardly as possible and may
have missed something, for example fallbacks if SDL is not present at
build-time; I am not sure if this is currently handled. I encourage any
and all edits from maintainers if I broke something or went about
something incorrectly.
### Testing?
Tested locally on my Apple Silicon machine on macOS Sonoma. SDL can now
be selected and used successfully as an input driver for all supported
connected controllers.
Co-authored-by: jcm <[email protected]>
As a bonus, use the Unicode ellipsis character in the ares UI on all
platforms instead of just macOS. In addition to looking nicer, it will
make regressions in this area very obvious.
Allow ares to be more easily built against external dependencies on
Windows outside of MSYS2 and using the MSVC ABI.
For example, dependencies can now acquired via vcpkg by installing the
relevant packages (pkgconf, gtk3, qt5, sdl2) and setting up the
environment appropriately before building.
```
CMD:
set PKG_CONFIG=C:\src\vcpkg\installed\x64-windows\tools\pkgconf\pkgconf.exe
set PKG_CONFIG_PATH=C:\src\vcpkg\installed\x64-windows\lib\pkgconfig
Bash:
export PKG_CONFIG=/c/src/vcpkg/installed/x64-windows/tools/pkgconf/pkgconf.exe
export PKG_CONFIG_PATH=/c/src/vcpkg/installed/x64-windows/lib/pkgconfig
```
Changes:
- hiro: fix building against gtk/qt with cl
- build: improve pkg-config detection and use with cl
- nall: support dynamic crt with clang-msvc/cl
Doom Resurrection patch version 3.0 (currently at version 3.1) added
support for the Mega Mouse, as well as making use of Mega CD hardware if
available. When I added mouse support for the Mega CD, the patch for
Doom Resurrection was at version 2.2, and since there was no licensed
32X software that supported the Mega Mouse I declined to add support at
the time. But leave it to homebrew, especially one as comprehensive as
this patch to add support.
This adds Mega Mouse support for both the 32X and 32X/CD combo, so it is
now available for all Mega * consoles.
To make sure to intercept all possible errors, the check are now
performed by the RDRAM module, whenever a RDRAM read/write behind a
cacheline happens.
CPU writes to cache is now tracking dirtyness at the byte level rather
than whole cacheline level, so that hardware accessing memory does not
trigger a false positive for false-shared variables. An initial round of
testing has shown that the check would trigger far too much otherwise.
Error reporting is also much improved to provide more context to analyze
the issue, including tracking the PC at which the hardware DMA was
triggered.
For RSP DMA, we do even more: instead of reporting an issue when area of
a cached memory is DMA into RSP DMEM/IMEM, we actually just mark those
memory locations as tainted, and emit the warning only if RSP later
reads them. This is necessary because it is extremely common for RSP
ucode to read data beyond the actual buffers it cares about, even though
that data is then never accesses.
Some of the warnings issues by Ares have been analyzed on Super Mario 64
and Zelda OOT and in both cases they have been confirmed to as real bugs
in cache management made by the game.
For instance, in Mario 64, the programmers forgot to invalidate the
cache before loading data for the initial Mario head animation, as
reported by Ares now:
```
[unusual] PI DMA writing to RDRAM address 0x390650 which is cached (missing cache invalidation?)
Cacheline was loaded at CPU PC: 0xffffffff80183b38
PI DMA started at CPU PC: 0xffffffff80328558
```
The game just happens to work because after loading, the game does
something else and manages to get the cache invalidated by touching
other locations, but otherwise it would be a real bug.
As another example, in Zelda OOT, we get these warnings at boot:
```
[unusual] AI reading from RDRAM address 190820 which is modified in the cache (missing cache writeback?)
Cacheline was loaded at CPU PC: ffffffff800b54fc
Cacheline was last written at CPU PC: ffffffff800b5528
[unusual] RSP reading from DMEM address fe0 which contains a value which is not cache coherent
Current RSP PC: d10
The value read was previously written by RSP DMA from RDRAM address 00199e40
RSP DMA started at RSP PC: abc
The relative CPU cacheline was dirty (missing cache writeback?)
Cacheline was loaded at CPU PC: ffffffff800b5244
Cacheline was last written at CPU PC: ffffffff800b5264
```
These warnings appear to be real bugs in the audio library. Quoting
Thar0:
```
* AudioHeap_ClearCurrentAiBuffer/AudioHeap_ResetStep wipe the AI buffers with CPU writes and
then don't write back the cache, and I guess an AI DMA is either in progress or starts before it can
be properly flushed. On boot this shouldn't matter as gAudioHeap is BSS and is already zero, but
if the driver is reset later it might cause some minor issues?
* The RSP cache coherency problems is from loading filters in AudioHeap_LoadLowPassFilter.
The heap allocator returns a pointer to which the CPU writes the filter data.. but the allocator
writes back the cache before the CPU writes the data 😂
```
Moreover, this PR also implements all the known SysAD-related CPU
freezes that cause the console to crash. We now pass the
[n64-systemcrash](https://github.com/rasky/n64-systemcrash) testsuite in
full.
Improvements to fds irq generation logic, to match description at
https://www.nesdev.org/wiki/Family_Computer_Disk_System#Timer_IRQ_control_($4022)
- Fixed "i/o enable" register address
- Correctly acknowledge interrupts in writes to $4022 / $4023
- Improve irq generation logic
The changes are based on the discusion on this thread:
https://forums.nesdev.org/viewtopic.php?t=16507
With this pr ares passes all 21 tests on FdsIrqTestsV7 (many failed
before), which can be downloaded at
https://forums.nesdev.org/download/file.php?id=10240
In addition to passing the tests this pr also fixes Kaettekita Mario
Bros. (Japan): this game has 3 random opening animations before
requesting to switch to side B, two of these openings will display a
glitchy screen with old irq logic. This can be tested by just resetting
if the game shows the animation that works.
Instead of directly specializing std traits classes (which would result
in undefined behavior) define our own traits classes that inherit from
the std types.
This allows us to remove a hack in the serializer class and paves the
way for building ares with Qt on Windows.
- remove -stdlib=libc++ as it caused warnings when applied to C files
and has been the default on macOS for something like a decade
- add -Wno-deprecated-declarations to the command line to silence
warnings about things like sprintf in thirdparty
This option is usually enabled by default by GCC/Clang with -O1 and
above. This is not true on some targets like macOS/arm64, and there we
are better off deferring to the compiler anyway.
This became an issue because Xcode 15 shipped with a new linker that, at
least when LTO is enabled, appears to mess up metadata that is used to
unwind the stack during exception handling. Without a frame pointer to
fall back on, unwinding fails completely and causes ares to terminate.
In addition to approximating the correct values in SI STATUS fields,
this commit also fixes a bug: I/O writes to PIF RAM do trigger an
interrupt just like DMA does.
Disable "fast fail" so jobs will run to completion even if others fail.
The workflow as a whole will still fail, but the jobs that succeed will
produce downloadable artifacts.
Secondly, allow the "macOS: Import Certificate" step to fail on forks.
This allows CI to function on forks without any other setup, though the
produced macOS builds won't run actually run unless you re-sign them.
We frequently get issue reports in GitHub and Discord about driver
settings not being saved. This is due to the fact that changes to
drivers requires using the Apply (formerly Reload) button for changes to
stick, which is different than other options in the settings window.
With this change, the Apply button is grayed out until a different
driver is selected, hopefully making it more obvious that the buttons
need to be used. A small note was also added at the bottom explicitly
stating that they Apply buttons must be used in order to switch/change
updates to driver selection.
From the MSVC docs: "You can use the /permissive- compiler option to
specify standards-conforming compiler behavior. This option disables
permissive behaviors, and sets the /Zc compiler options for strict
conformance."
While generally a positive thing, this does make MSVC stricter than
GCC/Clang in some cases. A couple of things popped out:
- nall::multiFactorImage had a busted constructor. I fixed this and did
some other cleanup while I was at it.
- nall::string has an implicit conversion operator to const char*. This
is honestly really ugly and creates ambiguity and allows for all kinds
of surprising silent conversions. Unfortunately, fixing that (by making
it explicit) will require touching hundreds of lines of code so I opted
not to deal with it now. Instead I fixed the much smaller number of
ambigous cases relating to string literals.
As noted in the Chromium source, the value for
NSTreatUnknownArgumentsAsOpen needs to be of type string despite being a
boolean setting.
If the type is boolean, AppKit throws an exception (which is caught),
but if unwinding fails (observed on some arm64 systems in certain build
configurations when ares is compiled with LTO and -fomit-frame-pointer)
it terminates the whole application.
I've confirmed the behavior the original commit was designed to correct
is still fixed with this change.
MMC3 and MMC6 share the same mapper in the iNES format. To disambiguate
MMC6 from the MMC3 mapper the NES 2.0 submapper 004:1 should be used:
https://www.nesdev.org/wiki/MMC6
Code for using the MMC6 was actually commented in mia/medium/famicom.cpp
up to commit bed4ce3659, where it was deleted. This commit
reintroduces this code to use it with the NES 2.0 submapper 004:1. This
adds compatibility with the games "StarTropics" and "Zoda's Revenge:
StarTropics II".
Fix two issues caused by disc swap timers:
1. Crash on exit in certain build configurations
2. Crash on system unload shortly after disc swap
Because these timers were simply members of Emulator derived classes
(which are in turn owned by a global variable), they were being
destructed after main() along with other static lifetime objects. This
was problematic because hiro also has global state that the timer
implementation depends on, at least on Windows. Whether this manifested
in a crash depended on a few factors, object destruction order among
them (which is at the mercy of the linker).
The second crash would reliably reproduce simply by initiating a disc
swap and unloading the emulated system (such as by closing the emulator)
within the next 3 seconds.
The following applies only to macOS when JIT page protection is enforced
(namely on Apple silicon).
A sequence of jitprotect(false) calls must now be followed by an equal
number of jitprotect(true) calls to restore executable protection. A
further assumption is that nesting always starts with (false), which is
only logical because you have to write something before you have
anything to execute. This is explicitly checked in debug builds.
The N64 and PS1 recompilers have needed this since commit 8ed4af8 in
order to handle the path taken on recompiler cache flushes. It's subtle,
but emit() will evict all pools and so the second call to pool() from
block() will reallocate the pool and unexpectedly toggle the protection
out from under it.
Technically the SH2 recompiler has needed this since commit 241f0e9
(from 8 months ago!) but that same commit made cache flushes practically
nonexistent, so it's likely not impacting the retail title library.
The CPU will freeze until power-off if a cached access is performed to a
non RDRAM area. This obviously never happens with games, but it is a not
so uncommon error when doing very low level development on the system.
This patch emulates the freeze for the data cache, and for the
instruction cache when using the interpreter. Implementation for
instruction cache and recompiler is left as a followup.
To prevent undue performance losses, the extra codegen only occurs when
tracing is enabled. To support toggling tracing on/off during execution,
the recompiler cache is flushed on setting changes.
Flushing the recompiler cache has its own side effects, but that's
already an issue, and it seemed the least bad way to isolate the impact
of this feature.
Add ability to enable/disable N64 4MB expansion pak.
Similarly to the video settings window, I've added a Nintendo 64
specific section in the options window, which was mostly empty. Existing
options fall under a generic "Emulator Options" section. Seems like a
reasonable place to add a few console specific options.
Addresses issue: https://github.com/ares-emulator/ares/issues/939
Currently, we detect the CIC to emulate by calculating a CRC32 over IPL3
bootcode in ROM, and keeping a database of the known IPL3s. This works
because right now there are only a handful of IPL3 variants (exactly one
per CIC).
In preparation for libdragon releasing an open source IPL3 that could
evolve and be forked an unbounded number of times, we must stop keeping
a database of IPL3s.
This commit changes strategy: it simulates the IPL2 checksum hash over
IPL3 (which is exactly what a real N64 does at boot) and verifies if the
checksum matches that expected by any of the known CIC variants. This
works because open source IPL3 variants must anyway have a checksum that
collides with that of CICs (which must be obtained via a second preimage
attack, bruteforced on GPUs), otherwise they would not work on real
hardware nor on Ares itself (which correctly simulates the boot sequence
and would refuse to boot an "unsigned" IPL3).
Level 2 warnings are considered "significant" and turning them on
revealed one issue that could, in the future, have affected MSVC-ABI
builds using either CL or Clang.
MSVC's C++ name mangling distinguishes between classes and structs, and
throughout the ares codebase there were friend declarations using
"class" to refer to types that were defined with "struct".
I don't see any value in retaining this inconsistency, especially
considering that ares otherwise avoids the "class" keyword (though I
spotted a few uses that crept in from recent commits).
Implements port 0x60 bit 1 and 3, a newly-discovered way to change the
cartridge SRAM and I/O bus speed. Also fixes a regression, and adjusts
the ROM bus speed to match a test ROM.
~~Marked as draft as validation on ASWAN ("mono" system) is required.~~
Nobody stepped up for 3 months, so, ehh. It's still more accurate than
it was.
Level 1 warnings are considered "severe" and, unsurprisingly, turning
them on revealed some true bugs.
- file-buffer.hpp: What should have been a zero extend followed by a
complement was instead a complement followed by a zero extend,
inadvertently truncating the file seek offset to 32 bits.
- file-map.cpp: What should have been a nullptr check after
CreateFileMapping() was instead a check for INVALID_HANDLE_VALUE. The
warning pointing me toward this was not technically about the misuse but
rather the redefinition of INVALID_HANDLE_VALUE in nall. I've removed
this and any reference to INVALID_HANDLE_VALUE except for error checks
immediately after calls to the few APIs that return it.
The WASAPI driver in ruby is a bit of an oddball. It has a fixed length
circular queue for samples, and before this commit there was no logic to
prevent queuing more than the requested "latency" number of samples or
even to prevent the queue from overflowing entirely.
In practice this wasn't much of an issue when audio or video
synchronization were enabled and therefore bounding the rate of audio
generation. It did not, however, play nice with the fast-forward
feature, and it caused a noticeable pause after returning to normal
speed as the queue drained from whatever level of fullness it had
wrapped around to (effectively random but averaging over half a second).
Now the length of the sample queue is (mostly) bounded to the "latency"
parameter which is more consistent with the other drivers.
Fixes#958
- add more details to the dd time.rtc format as comments for readability
- fix dd rtc skipping december entirely (wrong comparison)
- I feel really dumb for this one.
- add validity checks on every rtc second tick to avoid glitchy rtc time
& date
- This also avoids the user to be able to skip the time & date error
into a glitchy rtc by simply restarting.
- add validity check on load if the time is valid or not, if not valid,
destroy the rtc info to get the user to input new rtc info
This effect runs on the CPU, which is expensive for HD content and
incredibly so for UHD content. It doesn't make much sense to apply to
non-SD content, in any case.
Currently this only affects the N64 core in HD and UHD modes.
c1cbaf09e x86: avoid clobbering ebx register during CPU detection (#217)
62c91605a cpuid on x86 clobbers memory
856fce15d loongarch: sljit_emit_atomic_load/store implementation using LoongArch V1.10 (#216)
44cee7aa5 allocator: add support for PowerPC in Apple (#214)
e09319736 Improve Windows compatiblity
112fd4119 Add AVX detection
2713dda05 config: use standard interface to detect macOS version (#213)
029327875 Fix addc and subc on arm32
6a718f07d Improve simd lane mov on x86
292bf2e63 The bug is in the generation of a call relative instruction (because this is PIC code). Call relative of 0 will run the next instruction. So call relative is relative to the next instruction, not the current instruction. (#208)
b6f010324 s390x: make sljit_generated_code_size() accurate (#209)
e2c460881 Improve simd lane replicate on x86
73e84319c arm: small improvements for atomics with LSE (#210)
0436b57a6 Improve sljit_emit_simd_extend
ff4c77263 mips: improve FPU detection also for MIPS64 (#205)
6d1376f84 Improve x86 code generation
a443763e4 build: clear warnings with gcc12 and improve Makefile (#191)
d78063a88 ppc: correctly implement SLJIT_REV in 64bit little endian (#193)
git-subtree-dir: thirdparty/sljit
git-subtree-split: c1cbaf09e995d4d2ab87a85b2ed6a27f4e123754
This incorrectly implies that we support the old .smd rom format that used to be standard prior to .bin/.md;
This format is an interleaved format designed for the Super Magic Drive copier and ares does not support it
To prevent confusing users who may sill have legacy .smd files around, I'm removing the extension from mia.
This adds:
- 64DD Disk Swapping for both 64DD standalone games and N64 Combo games
(only if a disk is loaded).
- Safety checks to prevent corruptions.
- Change manufacture timestamp and line to differenciate different disk
files from each other to avoid confusion
Adds D64 file format support, which is the official master 64DD data
file format, which is basically NDD but a lot of the useless data
trimmed out and disk formatting data kept to a minimum.
Works in this way:
- Adds *.d64 file extension to the list.
- Redo code that uses clearer variables to keep track of recognized 64DD
disk file format.
- Add a file size check to do a proper format recognition and avoid
errors.
- Additional data validity checks.
- D64 conversion to the internal disk format (I refer to it as MAME
format) by reusing the same algorithm as NDD while ignoring blocks of
data that are not present.
More information:
https://www.nesdev.org/wiki/Expansion_Port_Sound_Module
While this is a homebrew device, it has already shipped to consumers in
this manner.
TODO (I'm not sure how to fix these issues myself):
- [x] Switching from EPSM back to another peripheral (None or Family
Keyboard) unloads not just the additional EPSM-provided audio streams,
but seems to break *all* audio from the NES core.
- [x] NES 2.0 cartridges can declare that they wish to have the EPSM
peripheral installed by default (Extended Console Type 0x04), but I'm
not sure how to hook this nicely from the pak data to the expansion port
node.
- [ ] Missing serialization, but this affects the Family Keyboard to
some limited extent already, so...
Not urgent at all. It has shipped to consumers, but the amount of
software using it is still lacking.
---------
Co-authored-by: Luke Usher <[email protected]>
This PR adds a new general setting called "homebrew mode", that can be
used as an umbrella setting for all kind of developer-related aids in
the emulator. This will also allow resource intensives checks to be
added (eg: N64 RDP command list validation).
For now, we hook this to the N64 core only in two ways:
* ISVIewer emulation is now only performed in homebrew mode. This is
obviously not resource intensive, but it would have naturally been an
homebrew mode feature, if it existed at the time. Normally, games should
behave exactly like on a real N64, where there is no ISViewer peripheral
plugged in into the PI bus.
* A new cache coherency check is added to PI DMA. If a DMA is performed
to/from RDRAM locations for which the CPU holds a valid cacheline, a
warning is emitted to the console as the game is probably buggy.
Slightly unrelated, a commit also adds a new "DCache" memory viewer, to
see the memory from the point of view of the CPU (so with data cache
taken into account). This is useful to ROM hackers which don't care
about the physical RDRAM contents but rather the memory contents as
written by the CPU.
The latest macOS runner updated the version of python to 3.12.0.
This removes the deprecated distutils core module, requiring the "setuptools" package to be installed to provide it.
distutils is a dependency of MoltenVK.
>Regarding PLB, it looks like it reads from $200 and snes9x, mesen,
bsnes, and the official CPU manual all got it wrong.
Reproduced and verified on real hardware via
https://github.com/gilyon/snes-tests
This implementation was based on our Z80 implementation and as such, has the following quirks:
1. Z80 style opcode mnemonics rather than intel style
2. Has an internal WZ register than a real 8080 lacks
3. May not have fully accurate timing
Despite this, it passes every test in this harness and is correctly detected by CPUTEST.COM as an 8080 rather than a Z80.
The remaining quirks can be addressed as needed
1. Bus refreshes needed a clean up and readjustment. Timings were
compared against US Model 1 VA3 via Ti_'s test_inst_speed rom. Yellow
values are ok, as they normally skew lower due to refresh. Some reds
still remain (of the regular instruction tests) that appear to be off by
1.
2. Basic implementation of delays incurred on both main 68k and z80.
Delay values are tuned according to Ti_'s misc_test rom tests ("Z80
DELAY ON ROM READ", "M68K DELAY ON Z80 ROM READ"). Hardware tests
indicate that z80 delay may skew lower towards 170, while m68k delay
typically sticks to 460. This change puts ares at ~178 z80 delay & ~461
68k delay. Fixes#255.
3. Trivial readjustment of m68000 interrupt timing. Approx'd autovector
delay changed to 14 cycles, which happens to be the median of the
expected range (10-18).
Commit history shows that these were initially added to get audio working in OverDrive 2, but now it works better without them.
Having these additional delays present caused audio to stop working late in overdrive 2's execution, most likely due to causing extended delays and confusing timing sensitive code.
While fixing the observed behavior in games, it also fixed things that are known to be broken on hardware; needs further work.
This reverts commit 785edf60c8.
Compatible with the current MAME romset at time of writing.
This system only has three games:
- Champion Boxing [cboxing]
- Champion Pro Wrestling [chwrestl]
- Doki Doki Penguin Land [dokidoki]
Known Issues:
- No support for configuring DIP switches
- Champion Pro Wrestling [chwrestl] is not working due to encryption
A file is regarded as a Famicom Disk System Bios when
1. It is 8KiB in size, AND
2. it contains the Famicom License DRM/Trademark security string at offset 0xd37
Before this change, the OPN2 thread had to play catch-up, generating a
bunch of samples and potentially overflowing the resampler queue in the
audio stream, as observed in Shining Force.
macOS 14 (Sonoma)'s Game Mode offers some small benefits for ares,
including lower latency for bluetooth peripherals and potential minor
performance gains. The system has various ways of detecting that an
application is a game and enabling game mode, but ares does not
currently engage it. Adding the "Games" app category key value pair to
the bundle .plist is one way of hinting to macOS that Game Mode should
be enaged. In my testing, adding this key to ares's bundle .plist
successfully activates Game Mode when ares is fullscreened.
Co-authored-by: jcm <[email protected]>
sljit performs a single (potentially) oversized executable memory
allocation before generating code. Instead of reserving the requested
amount of space, we can reserve only the used amount and eliminate some
dead space between code blocks.
In some cases sljit may write extra data beyond the generated code.
Because of this, it is no longer safe to assume the remainder of the
code cache is zero initialized. In practice, this assumption only
affected pools which can easily zeroed on demand. This also saves time
on code cache flushes, as we no longer zero the entire cache at once.
- align static code cache to 64 KiB (up from 4 KiB)
- remove dependency on alignas() and associated build workaround
- check for mprotect() failure and fall back on dynamic allocation
- perform dynamic allocation (if needed) at top of main on all platforms
Commit 9422ea5905 introduced support for
resetting the 32x SH2 CPUs from the MD 68k CPU, and it also created a
couple of new issues.
1. SH2::power() tries to allocate from a fixed bump allocator, but that
allocator is only reset from M32X::power(), which is not called in
response to a reset register write. In practice this meant we were
falling back on dynamic allocation, creating performance issues when the
allocation is distant from the ares executable.
2. The code cache could be released out from under a running SH2 libco
thread we switched away from to run the 68k thread.
This change fixes#1 and partially addresses #2, but it doesn't address
the issue of an already executing SH2 code block resuming where it left
off after a reset. I don't currently have a test for this case, so I'll
leave it for a later change.
sljit performs a single (potentially) oversized executable memory
allocation before generating code. Instead of reserving the requested
amount of space, we can reserve only the used amount and eliminate some
dead space between code blocks.
This PR may necessitate more third-party verification than usual. It
also allows for detection of the correct MMC5 board based on NES 2.0
header alone.
bc844c90a Implement vex prefix encoding on x86
3551015c7 mips: enable SLJIT_HAVE_REV for SLJIT_MIPS_REV >= 2 (#203)
3dcdb2575 mips: allow detection of StatusFR with prctl() (#202)
03d40019b mips: fix little endian (#197)
8dcad370c loongarch: implement sljit_emit_fop2r() (#201)
90df876ec mips: correctly detect valid FPU and support StatusFR=1 in 32bit (#200)
5628f9065 Implement full f32 register access on arm32 and mips32
2e0a7b9b7 Double the range available for register indicies
ce85ea911 mips: fix SLJIT_COPYSIGN in 32bit (#199)
2d177ccdc mips: fix sljit_emit_fcopy() for 32bit (#198)
0aed5d4dd s390x: sanitize warnings with clang 15 (#192)
831ea3ec4 mips: fix implementation of sljit_emit_fset64 in 32bit mips (BE) (#196)
abda1b90f mips: add missing ADJUST_LOCAL_OFFSET for sljit_emit_select (#195)
bf5e9a145 atomic: avoid unused checks if not implemented (#194)
c4dc1c8a7 Implement sign extraction on x86, arm
1eaeac321 arm: fix unaligned REG_PAIR thumb2 operations (#190)
63de0d9f6 arm: restrict NEON/VFPv3 code in sljit_emit_fset{32,64} (#189)
108a4b410 arm: restore emulation for SLJIT_CTZ in armv6 (#187)
abe5001d8 arm: use armv6 compatible instructions for thumb2 in atomic (#186)
0821be0b6 simd: prevent SIGILL with armv6 (#184)
be7b02a41 Better simd checking in the tests
299ae4ae7 Implement element extension on x86, arm
976e5d813 Be explicit about OS version (#179)
351d9afc7 x86: really detect SSE41 (#181)
8a3c0d1d8 x86: correctly detect SSE41 (#180)
dfff60447 Implement simd zero before lane set on x86, arm
0e4cbc9a8 Rename SLJIT_INT_REGISTER to SLJIT_GP_REGISTER
12d36226e simd: avoid unused parameter warnings (#178)
5c15decbf Implement sign extended lane store on x86, arm
44d8136d1 Implement lane replication on x86, arm
31556f80e Implement lane replication on x86, arm
750987e45 Implement simd mov reg on x86, arm
d17bf952d Implement simd source duplication on x86, arm
d9c74c990 Remove MEM prefix from several simd constants
a2c65c3c7 Implement simd lane transfer on x86, arm
38d96705b Fix incorrect branch offset calculation (#177)
87f9e7791 Rework sljit_get_register_index
git-subtree-dir: thirdparty/sljit
git-subtree-split: bc844c90ac79e7d56c04182e010c6aa8e5957b24
Fix various recently introduced build issues.
Some background for the string indexing thing: using operator[] to index
nall::string causes some ambiguous overload errors in 32-bit builds.
This isn't the first time it's come up, but since it's so easy to work
around (using operator() instead) I haven't bothered to try to fix it.
This PR adds a generic GDB server to ares with the ability to be used by
all systems.
For now only the N64 systems was implemented here.
Most documentation on how the server/TCP socket works can be found in
comments.
A detailed documentation for ares developers on how to add this to other
systems is included in the `Readme.md` file.
The feature itself was also already tested by a few people on both linux
and windows (with WSL) and seems to be stable now.
The data is still loaded sequentially and accesses will block until the
data at a given address is available. In the worst case (an immediate
read at the end of the last track) things are no faster than before, but
it still feels better because the UI responds immediately to the user's
load request.
This could be further refined by skipping ahead to serve incoming reads.
Up until 67d1647d6e, clang was the assumed
compiler on macOS and BSD, and g++ was the default everywhere else.
After that commit, we defaulted to clang on all platforms if it was
found in the user's path. It has since become clear that while a number
of Linux users have clang in their path, many have not installed
critical packages necessary to build C++ software and are completely
unaware of this state of affairs or which packages need installing.
To simplify matters, we will revert to the default of g++ on systems
other than Windows, macOS, and BSD. Additionally, the `verbose` target
will now print the compiler in use, as this is pretty relevant
information for diagnosing build issues.
This allows for firmware to be set from a user selectable firmware directory at the click of a single "Scan" button on the firmware configuration screen.
1. Fix timing relationship between cpu and tia,
2. Implement latching of current playfield pixel
3. include "current cycle on this scanline" counts in cpu trace output
Instead of assuming pkg-config is available with bash, test for its
presence. This allows the build to function if using bash without
pkg-config or using cmd with pkg-config.
Instead of assuming the sdl2-config is available if pkg-config indicates
that SDL2 is present, just use pkg-config directly to acquire the
compile and link arguments. Again, this allows the build to work with
cmd (since sdl2-config is a bash script) and if your copy of SDL2 just
didn't come with sdl2-config (for example, from vcpkg).
On Windows and Linux, ares uses a buffer in the bss section for the
recompiler code cache. On macOS this buffer must be dynamically
allocated for security reasons. The distance between the code cache and
the rest of the ares executable has a large influence on performance on
all platforms because there are microarchitecural thresholds beyond
which branches will never be correctly predicted by the CPU.
To make performance more consistent on macOS, we can make this dynamic
allocation sooner, at the top of main(), before the address space has
become too cluttered with allocations made by other code.
In addition to detecting the pattern `beq 0,0,<pc>` for idle loops,
detect the pattern `j <pc>`.
From a selection of about 60 games, about half used beq, a quarter used
jump, and a quarter had nontrivial idle loops.
Additionally, this commit returns the step time for idle loop
acceleration to 64 CPU cycles (128 system cycles). This was accidentally
halved in commit ffcce5823c.
Some instructions should complete faster for simple inputs (notably
mul), but this is not yet implemented. The extra cycle delay imposed by
the next instruction depending on the output of the previous is also not
implemented, as there is currently no framework for emulating pipeline
effects in the main CPU.
aa71425db Improve info provided about simd
b5f214edb Implement simd load/store on x86, arm
dd683ab67 build: add barebones cmake for Windows (#123)
13d577046 Implement copysign on ppc, mips
9637d82c9 loongarch: implement copysign (#176)
7c78ea2e1 Implement copysign on s390x
9764568d0 Implement copysign on x86, arm, riscv
d2363accc s390x: fix atomic store emulation when offset in higher int (#175)
18fc38fe3 config: allow CPU specific configurations (#174)
818706a80 loongarch: fixes and other cleanup for portability (#171)
db433181a add base support for LoongArch 64bit (#170)
git-subtree-dir: thirdparty/sljit
git-subtree-split: aa71425db565916d1ebaef107df295d66626e963
- Beetle Adventure Racing (J): Replace "NBB" with "NB8" (fix substitution).
- J.League Live 64: Replace "NLJ" with "NJL" (fix transposition).
- Quake 64: Replace "NKQ" with "NQK" (fix transposition).
- Star Fox 64: Remove "NFP" variant. This was printed on the box/manual
in some regions but only "NFX" appears in the ROM.
Implement vector unit (VU) timing including dual issue with the SU.
Tested against real hardware with a random instruction stream generator.
Known limitations:
- Invalid/missing instruction timings not implemented.
- CFC2/CTC2 dual issue restrictions not implemented.
- Some corner-case dual issue restrictions (e.g. LTV + VNOP) not implemented.
On real hardware, VU instructions with a DE operand are sometimes prevented
from dual issuing with vector loads under seemingly erroneous conditions.
The previous formula was a decent approximation, but it looks like 6105
antipiracy protection requires a better one (in addition to better RSP
timings that already went in).
Fixes#129 (Jet Force Gemini and Mickey Speedway USA)
Implement pipeline stall conditions for the RSP's scalar unit (SU).
Tested against real hardware with a random instruction stream generator.
Vector unit (VU) timing, including dual issue with the SU, is not yet
implemented.
When an interlaced output is made by the game, an N64 emulator right now only allows "Bob" deinterlacing, this commit also adds a "Weave" deinterlace option
like all of these computers, loading cassette tape games is awkward,
requiring the user to know what format data the tape contains.
The following basic commands are used to load cassette tapes:
Binary Data: `BLOAD"CAS:",R`
Tokenized Basic: `CLOAD`
ASCII `RUN"CAS:"`
This introduces a faster version of tlb.Load which omits exception and debug checks in
instructionEpilogue; as it is assumed these checks are handled sufficiently by the recompiler
instruction fetch phase before execution.
Additionally, this also introduces a simple cache that caches the virtual to physical mapping
for a single 4k page; this prevents per-instruction lookups within recompiled block; and is
cleared when the TLB is written to, so should never become stale.
It is too slow to be usable with the rest of ares,
Now that macOS can run Parallel-RDP with MoltenVK, there is little reason
to keep this around.
We can just say that Vulkan is *required* for the N64 core going forward.
This reduces the total number of function calls made in each loop of system->run()
n64: add fast variant of devirtualize; fix remaining task from PR #1069
to scale according to cardinalMax, rename startCardinalMax and others for better clarity, and reformulate startCardinalMax based on new response equation.
54bfb871c Merge pull request #99 from scribam/dr_libs
5cd76b97e Revert "deps: add dr_libs as a header-only library"
903f2f5cc Merge pull request #93 from scribam/deps
1ccead153 deps: add dr_libs as a header-only library
3c6e0e47a deps: add zlib-1.2.13
8e04476eb deps: remove zlib 1.2.11 and zlib 1.2.12
468490000 Merge pull request #97 from scribam/github-workflows
b2996c832 Add basic GitHub Actions
688759416 Merge pull request #96 from scribam/malloc
10c340c5a Check mem alloc failures triggered by invalid chd
37a5c0f3c Merge pull request #94 from scribam/auxv
026969b6d Merge pull request #95 from scribam/division
179f02553 Avoid division by zero
5f3927dc3 Declare hardware capabilities for the Nintendo Switch and PlayStation Vita
fec8ab942 Merge pull request #89 from jpd002/huff_codec
4ddae00e5 Merge pull request #91 from flyinghead/master
de740535f Avoid huffman tree buffer overrun in huffman_import_tree_rle
571507743 Add support for 'huff' codec.
git-subtree-dir: thirdparty/libchdr
git-subtree-split: 54bfb871ccae31903b95a8feb7f2bf7121f304be
51538f102 documentation: refactor registers and function signatures (#169)
47ed75d0b Improve copy between float and general regs on x86-32
91798631a Fix uint to float conversion on x86, ppc, mips
6a8dc94e0 Implement unsigned to float conversion on ppc, mips
61736a11a Implement unsigned to float conversion on s390x
ec6d52516 Implement unsigned to float conversion on x86, arm, riscv
f368bb254 arm64: use MOV instead of ORR for readability (#166)
07a556181 arm64: implement atomics using CAS for CPUs with LSE (#164)
1a4d5f229 Improve atomic operation constraints (#165)
b7fed8e11 x86: correctly detect mode32 for atomic_store (#163)
a0e16b14f arm64: avoid undefined behaviour with signed shifts (#161)
7f2886127 Implement operations on s390x
c54325fee Improve atomic instructions
3499aba93 Set armv6 as the minimum arm version
53d5a2252 Implement set f32/f64 on x86, arm, riscv, ppc, mips
03bb5347f Improve atomic operations
b91921e24 Increase max stack to 1 Mbyte
af4ca5da5 Add atomic instructions (#157)
e37ec3253 macos: allow runtime detection if target is older than BigSur (#127)
5ed7e00a1 Remove functions for unsupported architecture
fa1881b57 Implement operations on s390x
cf5a17b77 Implement fselect operation on x86
e5c75cd73 Implement rev.u32 and rev.s32 on x86, arm, riscv, ppc, mips
d1f287bec Implement select, rev.u16 and rev.s16 on s390x
7efd60de8 Implement rev.u16 and rev.s16 on x86, arm, riscv, ppc, mips
63e307e4a Implement select operation on x86, arm, riscv, ppc, mips
3cc2b0fb2 Improve floating point comparison
git-subtree-dir: thirdparty/sljit
git-subtree-split: 51538f102dd342a6246e98acafc00ceebbab4618
Although Nintendo made many different cartridge circuit boards with different
memory mappings, ROMs do not indicate which specific board they are intended
to work with. Super Famicom emulators traditionally group mutually-compatible
mappings together and use heuristics to guess which family of mappings the
game expects.
There's one family of mappings that maps ROM data to the top half ($8000-$FFFF)
of memory banks in the Super Famicom address space. For historical reasons,
this family is called "LoROM" and has three main variants:
1. ROM only, mapped to the top half of every possible bank.
The boards database calls this "LOROM".
2. ROM mapped to the top half of every possible bank,
RAM mapped to the bottom half of banks 70-7d,f0-ff.
The boards database calls this "LOROM-RAM"
3. ROM mapped to the top half of low-numbered banks,
RAM mapped to both halves of banks 70-7d,f0-ff.
The boards database calls this "LOROM-RAM#A"
The largest official game that used variant 3 was 1MiB, so a common heuristic
is "if the ROM is 2MiB or less, use variant 3, otherwise use variant 2".
2MiB is used as the threshold instead of 1MiB, perhaps so somebody can expand a
commercial ROM that uses variant 3 without having to rework it to suit a
different mapping.
Since v107 or so, higan (and by extension, ares) has implemented variant 3 by
mapping ROM to banks 00-3f,80-bf, which exactly fits a 2MiB ROM. However,
other emulators like Mesen, snes9x and higan v106 implement it by mapping ROM
to banks 00-6f,80-ef, all the space that is left after the RAM is mapped.
This doesn't affect any verified games in the `Super Famicom.bml` database,
since those have specific, accurate memory maps. It also won't affect
well-written games that only read from memory addresses they have populated.
However, homebrew games and ROM hacks that have never existed on a real circuit
board depend on these heuristics across all devices that read Super Famicom
ROMs, including software emulators, flash-carts, and FPGA implementations, so
ares should match what other emulators do.
Adds support for patching ROMs on the fly with a corresponding IPS patch
file. Functions in a similar manner to the pre-existing BPS support. If
a *.ips file is found with the same name as the ROM, it attempts to
apply the patch. If both a BPS and IPS file are found, the BPS patch
takes priority. This patch implements the IPS format as described here:
https://zerosoft.zophar.net/ips.php
SWL/SWR do not raise address errors (it's their whole reason of
being), but they can still raise TLB misses if they access an unmapped
memory area. In that case, the COP0 BADVADDR register is expected to
contain *exactly* the address passed to them.
This happened to be true (by luck) for SWL but not for SWR: SWR in fact
needs to write *before* the address passed to it, so the opcode itself
was adjusting the address before calling the memory function.
Fixed by passing the misaligned address to CPU::write and telling it
to skip address errors. It's not pretty: the code in CPU::write/read is
a bit of a mess and it would require some refactoring but that's for
another day.
Verified on real hardware by adding a new test to n64-systemtest, which
is has been submitted upstream (https://github.com/lemmy-64/n64-systemtest/pull/50).
Interrupts are deferred when the CPU is in a branch delay slot. If the
recompiler repeatedly exits the code cache in a delay slot (much more
likely with "min cycles between syncs" optimization active) then
interrupts will be deferred indefinitely.
This is now avoided by resetting the "cycles until sync" count when
interrupts are deferred due to a branch delay slot.
An alternate and possibly more robust solution would be to single step
the next instruction with the interpreter. One side effect would be the
generation of more compiled blocks.
VR4300 icache/dcache use both the virtual address and the physical
address: the former one is used to select the cacheline (just like
the key to a hashtable), while the latter is used to check that the
cacheline contains the correct line of memory and not another one
that happens to have the same hash key.
So any access to the cache requires both addresses. This commit makes
this explicit, and make sure to call the functions correctly.
The only exception where we leave a FIXME is the icache.step call
in the recompiler, as we can't possibly devirtualize the PC for each
opcode. This will have to be fixed in another way.
With PC Engine, ares always emulates the presence of CD-ROM drive so
games can use its backup RAM for save data. However, it was not properly
loading the backup RAM file when loading a non-CD game, causing the file
to be subsequently filled with FFs on save.
The BIOS format procedure detects the size of backup RAM by sweeping
bank $f7 while writing zero and reading back the result. It stops when
the read back value is nonzero, proving that the 2 KiB backup RAM is not
intended to be mirrored across the 8 KiB address range. With this
corrected in ares the BIOS writes the correct header indicating the end
of the backup RAM is at 0x8800 rather than 0xA000.
This adds a hotkey that can be used to reset the active system.
Although this is similar to the existing "Reload Current Game" hotkey, it does have a functional difference, since a soft reset can result in the state of a system being slightly different than a cold boot. It also does not result in resizing the emulator window and is slightly faster due to not needing to reload various resources.
When using nall as a header-only library it was possible to opt out of
nall taking over main() by simply not including main.hpp. There was no
mechanism to opt out when building nall as a separate translation unit
because nall.cpp unconditionally pulled in main.cpp. Now, users of nall
must specifically opt in by including main.cpp in their build (though
header-only users still only need to include main.hpp).
- Update dirty bit field on invalidate so overlapping blocks can be lazily evicted
- Track "generation" to allow entire cached memory area to be lazily evicted
- Invalidate appropriate cache line/memory area on cache purge
Using lld is required to support advanced scenarios like incremental
ThinLTO and PDB symbol output. macOS has its own linker (ld64) and we
can continue to use that there.
If the iNES 2.0 header specifies NTSC timing, ares should not emulate a
PAL console even if the user region setting is "prefer Europe".
This change also embeds the iNES header in manifests to simplify user
bug reporting.
While I am happy we did the work to support this, having multiple
build systems does make it harder for contributions to be made
We can restore msbuild CI tests once (if) we eventually switch
to cmake.
Apply -march tuning for x86 (not just x86-64) and correctly pass
the ThinLTO cache path through the non-CL Clang frontend on Windows.
The move to CMake can't come soon enough.
With ThinLTO and an incremental LTO cache, incremental link time (with
LTO, of course) goes down from tens of seconds to less than a second.
For whatever reason, ThinLTO needs libco's co_swap_function to have
external linkage. Who am I to argue?
When booting the MD core from a CD a board is allocated on demand in
Cartridge::power(), and this is critical for Mega CD 32X games to
function. However, it also puts the cartridge into an inconsistent state
in which allocate() was never called and therefore catridge.node is
null, causing disconnect() and save() to be short-circuited. This means
the board never gets cleaned up, which also means it never gets
recreated in power() on subsequent loads. One consequence is that
loading a MCD game followed by a MCD 32X game will cause the 32X to not
actually be connected.
Given that all of these system configurations contain a cartridge slot,
it follows that one should always be allocated. This implies
cartridge.node will always be non-null so it cannot be used to determine
if a cartridge is actually connected. This change corrects one such
usage.
Avoid hard dependency on __int128 type suppport. For extended
multiplication, use MSVC intrinsics as an alternative when possible.
If neither are supported, fall back on the u128 type defined in
nall/arithmetic.hpp (which incidentally also works when building as
32-bit).
MSVC applies the same narrowing rules to these as it does to list
initializers, and while I don't know if that's justified by the standard
it's easy to avoid narrowing conversions. In this case, basically every
other core already defines System::frequency as a double so the a26 core
was the odd one out.
MSVC doesn't seem to support string literal concatenation in a
__declspec attribute, but that's fine because we only care about adding
to the .text section. It also requires an explicit pragma to define the
.text section before it can be referenced. Clang is fine with or without
these changes.
MSVC wants these to compile certain experessions, and while I'm not 100%
sure if it technically should require them, I see no reason for these
classes not to have any.
Narrowing conversions in initialization lists are disallowed by the
standard, but nall was supressing this diagnostic (which is actually
an error by default). MSVC doesn't let you supress errors so easily, so
we'd do well to abide by the standard and perform explicit casts as
needed. For nall::shared_pointer::create() we can simply avoid the
uniform initialization syntax to bypass these extra rules, which is the
same strategy taken by implementations of std::make_shared().
Variable length arrays are a C language feature (one of many, actually)
that does not exist in any version of the C++ standard. GCC supports
them in C++ with improvised semantics defined by no standards body, and
Clang follows suit for compatiblity with GCC.
Now a setting can be changed from command line using --setting.
The list of settings can be dumped with --dump-all-settings, so that
it is easy to find out how a certain setting is exactly spelled.
Previously, terminal (console) support on Windows required opting in at
compile time. Now, the runtime behavior is largely the same regardless
of how ares is compiled.
- ares will attach to the terminal of the parent process (if present) by
default and redirect any unset stdio streams.
- If the --terminal argument is provided, ares will always create a new
terminal window and stdio will be redirected to it.
- Otherwise, if stdio handles were already valid on launch they will be
left alone (to support redirection to/from files).
By default, builds are "local", meaning they are optimized specifically
for the host machine. For non-local builds such as our CI builds, we
enforce a minimum CPU spec to allow the compiler to use instructions
beyond the base AMD64 ISA. ares may also make use of SSE4 instructions
via intrinsics in the N64 core. On AMD64, the capabilities of the host
CPU are now checked at runtime and an error message will be displayed to
inform users if their machine does not meet the CPU requirements of that
build.
- Because clangarm64 is now a default enabled package source, there is
no need to edit pacman.conf.
- Because there is no need to edit pacman.conf, there is no need to sync
the package database.
- Because there is no need to sync the package database, there is no
need to update the initial set of installed packages to prevent
version mismatches.
- Install the "clang" package in favor of the "toolchain" package group
as none of the extra packages are needed by ares.
The other audio drivers in ares read exactly two samples from the buffer
passed to output(), but the WASAPI driver was reading the number of
channels supported by the device. ares only ever passes in two samples
so ruby was reading beyond the extent of the array. This caused garbage
to be piped through and resulted in silence on certain systems and build
configurations (likely because of NaNs).
This was only needed for parallel-rdp and that's been fixed upstream
which is now causing redefinition warnings. It's still defined by nall
headers so most of ares is unaffected either way.
When in a delay slot, instructions that modify PC should immediately
trigger an illegal slot instruction exception. This exception is not
predicated on the branch condition (in the case of BF/S or BT/S) of the
instruction in the slot. Furthermore, it should trigger before any side
effects of the instruction are observed.
Raise the timeout to make Start Wars: Shadows of the Empire boot again.
Also improve simulation of CPU halt; the real PIF does toggle the NMI
line but it does so extremely quickly. We don't emulate PIF that often,
so it's more accurate to simply keep the NMI line asserted forever,
as the final effect on the CPU is the same.
The multiplier scale settings are now radio buttons, allowing the
user to see which option is selected.
Available scale sizes are no longer bound by the current monitor
size, avoiding the situation where a selected option disappears
when moving a portable configuration to a different computer,
instead, the actual resizing code prevents the window from growing
larger than the display size.
The window resizing logic now avoids un-maximizing the window, if
the user has manually done so, even when adaptive sizing is
enabled.
Scale options have been renamed to better describe their function
and two new scaling modes have been added:
"Center" has been renamed to "Scale (Integer)"
"Scale" has been renamed to "Scale (Best Fit)"
New setting: "Pixel Perfect" which will always display a 1x scale
image in the center of the display, regardless of the window size
New setting: "Scale (Fixed)" which will always display an image
matching the users selected scale factor (1x, 2x, etc) regardless
of screen size.
This reverts pull-request #945 as it made ares rather frustrating
to use in non-1x situations for most users.
A more robust scaling solution will be worked on soon.
Allow Turok to boot again. This probably points to a problem in our
CPU timings, but the boot timeout number is made up anyway and doesn't
really help anyone to keep it short, so bump it.
Thanks to kev4cards for the analysis
Controller paks only accept writes in range 0-7FFF (without mirroring),
and return 0 when reading out of range.
Rumble paks return the ID only in range 0x8000-???? (TBC)
and accept writes only in range 0xC000-???? (TBC).
Fixes Milo's Astro Lanes saves, and Goldeneye initial rumbling.
Selecting "nothing" for a controller port from the UI only consistently
blocked input from the host, and it did not reliably do the extra work
required to actually disconnect the controller from the perspective of
the emulated device.
This was handled only by the MD and N64 cores, but now all cores are
standardized on the disconnection method originally implemented for MD.
4f7d8ec545 Improve code generation on x86
09cad66bc0 Change tmp1 to ebx on x86-32
2de5e04919 Allow negated comparison
5040a3caa1 Test84 fix
1811f1dcea Rework sljit_emit_shift_into on s390x
ba08667852 Rework sljit_emit_shift_into on x86, arm, ppc, riscv, mips
95d2d320ed Add define for masked shifts
dc79333621 Implement fcopy on ppc, mips
c9e58a4806 Implement fcopy on s390x
03f68fea46 Implement fcopy on x86, arm, riscv
ac6c7b307f Implement byte reverse on ppc
f4d1b06e9d Implement byte reverse on s390x
5ed842e093 Implement byte reverse on x68, arm, mips, riscv
fba2206b40 freebsd: implement system specific execallocator (#155)
0a0ab41d03 test: update test15 for 4 arguments (#149)
1942237bda config: really improve autodetection for arm (#153)
7de0fee9a7 Move allocators to separate files (#151)
7de1a4356d On x86_32, check for virtual registers in conversions to and from floating point (#152)
c2f9c138a6 riscv: disable FPU when using soft-float ABI (#147)
3b89155a25 config: improve autodetection for ARM (#145)
0a313731b9 Implement new features on s390x
26213dadc4 Introduce op_dst
faecd2b12f Implement sljit_get_return_address
8b491d0ade Replace not with xor
88e0dcf360 Add allocator data getters
git-subtree-dir: thirdparty/sljit
git-subtree-split: 4f7d8ec545f58ebe93a08f137fcb9a6dd2bb170f
This very boring commit should basically produce no changes. It just
make sure all devices can now step the CPU while the I/O is in
progress, if needed.
Numbers are based on this test ROM:
https://github.com/rasky/n64-systembench
There are still many other cases to handle but this should provide
the initial framework for further experimentation with PIF timings.
Fix a regression introduced by my last change. The pattern of checking
ready() at the top doesn't work for clear() because it's called from
iniatialize(). This was obscured by the fact that other code calls
clear() again after initialization *unless* you are loading a ROM
directly from the command line.
The WASAPI driver should now gracefully handle machines that don't have
any available output devices. The XAudio2 driver probably still won't,
but more importantly it won't crash machines that don't have a specific
DirectX redist from 2008 (!). It needs a rework but for now I'm leaving
it a little better than I found it.
The rom viewer debug window is a casualty of moving
to the board system, but as NES/Master System and
others with multiple board types don't have it,
it's not a big loss.
NOTE: This requires 'non merged' type roms, with all files related to
the game in a single zip file, ares does NOT resolve parent/child
relationships between roms.
This is a little bit hacky, because the debugging code in libdragon
is not compatible with actual IS-Viewer hardware, so we emulate
a 'quirky' version that satisfies both libraries.
This emulates the ZX Spectrum 48k and 128k models and should be fairly accurate
although imperfect; it is considered experimental for now. Save States are not
fully implemented, you may wish to avoid using them for this core.
No controller interface is currently exposed, meaning games must be played with
the keyboard at this time. It is planned to support the Kempston interface,
while supported by the underlying core, the UI interface for attaching expansion
port devices has not yet been implemented.
You must map a "Keyboard Capture" hotkey to allow ares to emulate the keyboard.
Ares maps most ZX Spectrum keys 1:1 with the same key on the host keyboard.
CAPS SHIFT is mapped to Left Shift, and Symbol shift is mapped to Left Control.
For special characters, it may be beneficial to look up the ZX Spectrum
keyboard layout. For the 48K it is necessary, as BASIC uses hot keys
rather than typed commands, for example, to load a game on the 48k,you must
type `J <symbol shift> PP` and then hit enter, which results in `LOAD ""`
being entered on the screen.
For the ZX Spectrum 128k, you can just use the Tape Loader menu option.
The emulator only implements support for raw WAV dumps right now; this is
because the TZX format is over-complicated, and I did wish to implement it at
this time.
There are many tools available for converting TZX to WAV, for all platforms,
so this isn't really seen as a blocking issue.
Enable these warnings in nall so they apply to all of ares and annotate
legitimate fallthrough with C++17 standard [[fallthrough]] attribute.
This type of mistake is just too easy to make.
Add support for American Video Entertainment's NINA-001 board which was
used only by the unlicensed NES port of Impossible Mission II developed
by Novotrade.
iNES mapper 34 is assigned to two unrelated boards, so detection must
rely on the NES 2.0 header or use the CHR ROM size as a heuristic.
The -mconsole and -mwindows flags don't seem to do much of anything when
Clang isn't targeting MinGW. On the other hand, directly overriding the
subsystem with a linker flag results in a bunch of unresolved symbols.
However, if the right entry point exists (either WinMain or main),
some apparent magic goes on under the hood to ensure that everything
links as expected, so we can just take advantage of that.
context.physMask is only used for TLBs. In directly-mapped memory
segments (either cached or uncached), the virtual-to-physical conversion
uses a hardcoded mask that depends on the exact address space segment,
and is not contextful. In 32-bit, segments only use 29 bits of the
virtual address. In 64-bit, some segments (xkphys*) use the full 32 bits.
Besides 64-bit direct-mapped segments correctness, this also fixes
the devirtualize function that is used as part of the CACHE/LL/SC
opcodes, which were misbehaving when used with a uncached segment
(0xa000'0000) in 32-bit mode. This might actually affect also games.
This change makes it possible to build ares using Clang without
MinGW-w64. All that is required is a copy of Visual Studio (or Build
Tools for Visual Studio) and Clang (also available through the VS
installer) along with GNU Make.
To build, just open an x64 Native Tools command prompt and run
`make compiler=clang++` as usual.
Begin the process of splitting nall into separate translation units.
It can now be used in two ways:
1) as a header-only library by defining NALL_HEADER_ONLY
2) by compiling nall/nall.cpp
sourcery has been updated to demonstrate the header-only use and
everything else now builds nall.cpp.
So far the only things moved into .cpp files are implementations that
call Windows APIs. This allows most of ares to build without including
windows.h and enables the removal of the abomination that was
windows/guard.hpp. The things that actually need windows.h (hiro, ruby)
must avoid using names reserved by Windows headers, but the rest of ares
is free to use names like "far", "boolean", and "interface" with
reckless abandon.
This work is done in preparation for building against MSVC and Windows
SDK headers/libraries an an alternative to MinGW-w64.
I know we play with this a lot; but it is the difference between barely scraping 50-55fps on 32x core to getting constant 60-70fps on my machine.
This does increase compilation time with GCC, clang fares a lot better.
This brings a significant performance increase to the NES/FC core with no accuracy or maintainability impact;
This is possible only because they share the same base clock, and always step at the same rate.
4b8798e4d2 config: simplify use of external allocator (#143)
d598b86d81 Add tcc to the list of compilers using AT&T syntax (#142)
c8e664c73b Fix x86 inline asm register clobbers (#141)
b65c854289 Add conditional exit for clz/ctz on riscv, mips
f55425dac8 riscv: typo in detect_jump_type (#140)
0148e65576 Implement ctz and improve clz on riscv, mips
e8eb434b2e Implement ctz on s390x
51d3c96183 arm: add missing check sljit_emit_mem_update in aarch64 (#139)
cd2a31e199 Implement ctz on x86, arm, and ppc
c0286016cf Improve rotate on mips, riscv
fded9f7823 Implement rotate on s390x
35764edc9e Implement rotate on mips, riscv
ea49b3f52e Implement rotate on x86, arm, and ppc
da180ae7e1 Implement sljit_emit_shift_into on s390x
05f5980620 Implement sljit_emit_shift_into on ppc, mips, riscv
84c0bc3614 Implement sljit_emit_shift_into on x86 and arm
8da3b39558 Label odd numbered tests (#134)
06e13ac7cc Label even numbered tests (#133)
1501371fad Split emit_mem to emit_mem and emit_mem_update
89965887cc Implement return_to on mips, ppc, riscv
e21f485cb4 Implement return_to on s390x
a122423a40 Implement return_to on x86, ARM
4672d4f6cb Improve cmov on s390x
06e9864247 Change SLJIT_32 flag passing to cmov
29af0267ce Update documentation
190313fcc2 Fix spelling of 'subtract' (#132)
4325440b0b Support floating point return
ba0f935c9a Implement recent features on s390x
12e6cb055b Implement always masked shift
f22f976060 Support memory moving of register pairs on riscv, mips, and ppc
git-subtree-dir: thirdparty/sljit
git-subtree-split: 4b8798e4d2fe8f8e8fb82b28e2dda9d71a00b27f
* The NEC V30MZ does not ignore the immediate operand in AAD/AAM calls.
This is contrary to NEC V20/V30 behaviour, as well as many existing
emulators. It is, broadly speaking, important to remember that the
V30MZ is much closer to "an 80186-compatible CPU with much better
opcode timings" than "a V20/V30 derivative". A test ROM is provided
for this.
* The sprite base location register's access to 0x4000-0x7FFF memory
is gated by the color mode bit, not by the 4bpp mode bit. A test
ROM is provided for this.
* The PPU can address 1024 tiles in 2bpp color mode, simply by
following the consecutive addresses (so 0x2000-0x5FFF total). This
has been verified independently.
* The planar(), packed(), depth() and grayscale() functions have been
reworked to accurately reflect what the hardware does. This has been
verified independently.
Currently, analog inputs are bound when crossing the threshold in either
direction halfway between zero and full positive/negative. This logic
doesn't work for triggers that are mapped to the full range of an axis
(as opposed to half the range) which makes them impossible to bind
correctly unless they are initially half pulled when pressing the assign
button. I'm not convinced there is much utility in binding any axis on
motion toward the center position, so this change triggers binding only
on motion away from the center.
Converting a negative floating-point value to an unsigned integer is
undefined behavior and just happens to do the desired thing when
compiling for x86-64. Convert to a signed integer first to avoid UB and
guarantee the expected result on arm64.
Using the host carry flag is a bit tricky because on ARM64 (and most
other non-x86 architectures) the meaning of the flag is inverted for
subtraction. There were some helpers in the recompiler to deal with this
but they performed explicit architecture checks which ran counter to the
goals of a generic recompiler.
Reading back the carry flag is now handled directly by sljit. This
feature had been removed from sljit but was recently added back. It
internally tracks whether the setting operation was an add or a subtract
so that x86 semantics are observed on all architectures.
Loading the carry flag is now handled with an explicit add or subtract
that matches the subsequent usage. This results in expected behavior on
all architectures.
Reinstate preprocessor guards for SSE code. Constexpr if statements
don't really work because the compiler still requires declarations for
the SSE types and intrinsics even if the body is ultimately discarded.
When building with clang for ARM64, the cmath round functions that
return floats compile to a single FRINT instruction. The ones that
return ints are provided by the C runtime, which is problematic on
Windows because the mingw implementations don't set the desired
status bits.
Two things are making this a bit more complicated than it ought to be:
- The msys2 clangarm64 package repository is not enabled by default
because it is still considered 'experimental'
- Cross-compiling requires that you manually override the runtime
library directory for the 'builtins' lib to be located
Both of these issues are known and should be addressed eventually.
There's a "hardware bug" in VI that hides 8 pixels on beginning/end
of each scanline if the scanout begins within the active area.
It is emulated by parallel-RDP but not by our VI implementation.
In a CRT, this is all within the border so it's not visible, and most
games will also respect an even smaller "safe area" anyway. It becomes
visible once the horizontal scanout start is pushed right into the
central area of the screen.
This is another regression introduced to mame RDP wrt upstream
angrylion and parallel-RDP. The color combiner slot "ONE" should use
the value 0x100 for the color components, not 0xff. Notice that
"ONE" in the blender is indeed 0xFF, instead.
- Fix copy assignment operator
- Prevent reserve() from reallocating/rehashing unless capacity is increasing
- Prevent insert() from inserting duplicate entries
- Disable remove() as needs some work and is currently unused
The "mask" feature in the instruction tracer broke when the N64 address
space was increased to 64 bits. This change fixes it by switching from a
vector to a hashset for tracking visited addresses.
The instruction tracer's default history depth (4) is much too low to
reliably filter out hot loops in processors clocked above a few
megahertz.
Assuming a correlation between processor speed and the path length of
code written for that processor, this change sets the history depth to
the processor's clock speed in megahertz rounded to the nearest power of
two.
This choice is arbitrary, but in practice I've nearly always had to
manually adjust the trace depth to values in the 16-64 range when
dealing with faster processors, so this seems like a good enough
heuristic.
- Detect RTC with MBC30 mapper (Pocket Monsters - Crystal Version)
- Read current time before saving it to disk, not after
- Don't clear RTC in power()
GDI's default mode of operation for downscaling is optimized for
monochrome images (!) and produces strange artifacts on color images.
This change selects the GDI mode that is essentially nearest-neighbor,
which is not great but is at parity with how it does upscaling.
e02b3d68eb Merge pull request #84 from scribam/dr_flac
146f076ca7 dr_flac: Version 0.12.39
9882eeaaa2 Bump dr_flac to latest, bump libchdr version to 0.2
44c91c96d4 Bump LZMA SDK to 22.01, need to implement asm optimizations
8cd08c0752 Upgrade to zlib 1.2.12
2781322c4a Merge pull request #78 from snickerbockers/virtual_core_file
40ec221c8a use virtual file i/o API which defaults to a stdio wrapper
git-subtree-dir: thirdparty/libchdr
git-subtree-split: e02b3d68eb759793ab8142376594c840c1194b3e
4de967acd0 Support memory moving of register pairs on x86 and arm.
git-subtree-dir: thirdparty/sljit
git-subtree-split: 4de967acd03499e7def404eab861e83a0689579b
The value of PC indicates the fourth byte (second instruction) after the
current instruction. The value stored when an exception raised does not
maintain this four byte offset. Consequently, the RTE instruction must
offset the value it reads back by four bytes.
ares was storing the offset value (and not applying one in RTE) and this
went unnoticed until an encounter with code that manually sets up an
exception frame (in an interrupt handler common to CD 32X games).
This change also fixes the PC stored in the event of an illegal slot
exception, which should be the delayed branch target.
The functional part of this change is just a few additional lines in
bus-external.cpp. The rest is refactoring to model the game cart as a
separate entity from the 32x, making it possible to delegate reads and
writes through the 0x900000... range to the cart implementation.
This fixes the corrupted menus and crashes in Golf Magazine: 36 Great
Holes Starring Fred Couples.
fc3121239 Update to 0f7cc6c3a13494a575dbbb977ff4424743b688d7.
d37cf0ed0 Update to 93dfb98643d0dd8094c5739300dfed818502304e.
d433bc4d2 Update to 93d77f713ba0fbcf6bb9e654924e89f808b04398.
22f03bb13 Update to 0f0f9446470f4d0aa018b88ff6280bbc4137b6f6.
482a41deb Update to 07c3d161dbeb78121be5eebdab7c810b72af822a
git-subtree-dir: ares/n64/vulkan/parallel-rdp
git-subtree-split: fc3121239716e3cd99ec63175c9ce5c9d088c033
* timing info based on Z80 netlist analysis by Floh
1. Corrected cycle counts for DDCB & FDCB prefixed opcode fetches (was 17, now 16). Instructions cycle counts were increased to compensate for the lost cycle, though this corrects wrong cycle counts for corresponding instructions without a DD or FD prefix (+1 cycle).
2. Removed redundant code for instructions fixed in 1.
3. Changed BIT instructions in DDCB & FDCB blocks to not modify registers (ref: "The Undocumented Z80 Documented").
* based on Z80 netlist analysis by Floh
1. Corrected cycle counts for EX (SP),rr (was 16, now 19) & IM n (was 12, now 8).
2. Reordered cycles for ADD/ADC/SBC HL,rr, RLD/RRD, & LD (rr),n.
3. Removed redundant code for CALL nn & IN (C).
While testing parallel-RDP on macOS via MoltenVK, I found out that
a special syntax used in the N64 Makefile to compile parallel-RDP
requires a version of GNU make which is newer than the one that comes
with macOS. To avoid confusion, just error out for now.
The presence of undefined behavior (in C++) revealed several
bugs in various shift and rotate instructions. These are
deceptively hard get right without resorting to iteration.
Rather than complicate the implementation further, a few more
are now implemented wtih loops like RCL/RCR.
The new code was completely wrong for interlaced resolutions, fix it
by changing into a simple filter on the current field.
Moreover, for some reason, the screen was only updated at 30fps.
Do it at 60fps, as both Vulkan and the native Ares screen knows how
to handle that.
There a handful of sequences of invalid commands that can
cause the RDP to crash (it will stop processing commands until hard
reboot). Mame RDP already knows about them and reacts by throwing an
exception, that currently kills Ares because it is not caught.
This commit lets Ares actually emulate the crashed RDP by basically
freezing its command processor. A log is also emitted on console.
This is useful to homebrew developers that can do mistakes while
coding.
from mooneye/acceptance/oam_dma_start
```
Expected timing (fresh DMA):
; M = 0: write to $FF46 happens
; M = 1: nothing (OAM still accessible)
; M = 2: new DMA starts, OAM reads will return $FF
```
The test still fails, likely due to bad restart behavior,
but it no longer hangs.
This should fix all games that had broken resolutions when not using
Vulkan. It also fix garbled graphics appearing on screen during scene
changes, usually at boot.
This pull request adds support for the Sega Mega Mouse. As the name implies,
this mouse was released for the MegaDrive, but as it is the case for 3/6 Button
controllers, the Mega Mouse can be safely connected to a Master System console and
even used, provided that the game software is programmed accordingly.
To my knowledge there are no official games on the SMS with mouse support, but there
is one demo I released (SMS-A-Sketch) which supports the Mega Mouse, and I have
an unreleased game that also supports it. I think it would be great to have ares
support the Mega Mouse on SMS as the only alternative at this point is to use
real hardware.
The VDPTEST still doesn't pass for any hcounter tests.
Inserting debug prints to print the hcounter value for every possible x coord shows correct output.
I suspect there are still some core timing issues in the z80...
At the moment, the game sees a controller in all ports, even after
the controller type is changed from Gamepad to Nothing. (the Gamepad
instance still lives and still gets called...)
I worked around this by making sure that port->allocate gets called,
even when the selection is "Nothing". The code in port.cpp simply
does not allocate anything in this case.
For most systems and in most practical cases this probably does
not matter. But now the raphnet N64 adapter manager ROM correctly
reports "Not conneted" in ports set to Nothing.
When the ->comm method returns with the invalid bit set, it means no
data was received. This happens for instance when sending invalid
or proprietary commands to a standard controller which does not answer.
When there is no answer, the PIF emulation code sets bit 7 of the receive
length byte to flag this error.
Since no data was received, the original (filler) bytes should be left
as-is in PIF RAM. This is what the hardware appears to do.
This fixes code that checks if the receive buffer got overwritten instead of
inspecting bit 7 for errors.
Ideally I think one should not need to read the source code to learn
that ares accepts command-line options and what those options are.
I wish I had known earlier that I could pass --system MSX when loading
a ROM directly, it would have saved me a lot of time. I had tried --help,
but it just opened the application window...
Many specializations of stringify store a reference to the wrapped
value. Therefore, passing arguments to make_string() by value can be
disastrous if the compiler does not perform copy elision and stringify
stores a reference to a variable that goes out of scope when
make_string() returns.
Detect build environments where 'g++' is just an alias for 'clang++'.
Example: MSYS2's Clang64 environment. This avoids the need to manually
override compiler detection.
Master system ports are compatible with megadrive controllers and
those can be used directly to play many original master system
games.
However MD controllers can be fully supported (i.e all buttons
working) if the game software is programmed to do so.
While really only useful on real hardware, there are game patches to
enable the Start button on MD controllers. But it's also possible
to make patches that use additional buttons or code full support
for Megadrive controllers in a homebrew title.
The N64 and PS1 cores set custom Screen:refresh() callbacks that run on
the video thread and have meaningful dependencies on core state. It's
not safe to unload components from beneath them, so the video thread
should be stopped before any unloading occurs.
ares uses nall::thread with the assumption that calling join() multiple
times on the same thread will have no harmful effects. This was true of
the Windows implementation but not of the POSIX one.
mia cannot save a file when the manifest size is zero.
instead, use the largest known eeprom size + 1 as a default.
The +1 signifies that we should auto-detect the real size of the eeprom
and the large size makes sure mia creates a file on disk large enough.
For games without a database entry, the eeprom size be larger on disk
than is actually used, but it's better than completely broken saves.
Note that even with this, some games will require database entries,
but most should work now.
This prevents slowdown in games that poll games multiple times per-frame.
5ms was chosen as ares already has a 5ms limit higher up the chain.
For me, Advanced Wars 2 (GBA) jumped from 50-55fps to 65-68 with this change
Following the precedent set by the SFC performance PPU, override the
timing of the PCE performance VDP for a handful of problematic games.
All of these games already work fine with the accuracy VDP (enabled with
the "pixel accuracy mode" video setting) which does not and never will
contain contain game specific logic.
Affected games:
- Kore ga Pro Yakyuu '89
- Kore ga Pro Yakyuu '90
- TV Sports Baseball
- TV Sports Football
- TV Sports Hockey
- Valkyrie no Densetsu
- Victory Run
- The primary lookup table is direct addressed
- The secondary lookup table is indexed by hash of code block contents
- IMEM invalidation is tracked at 64-byte granularity and used to
evict primary lookup table entries
- The secondary lookup table is only pruned on a full code cache flush
- Only executed instructions are hashed, so the code cache no longer
experiences unbounded growth
- Code blocks can now wrap around the end of IMEM
- generic::recompiler now supports aborting recompilation (required by
by an earlier version of this change)
On MSX, both joysticks are read through a common port (PSG port 14).
Which joystick is being accessed is selected through bit 6 in PSG
port 15. In other words, the ports inputs are multiplexed.
This pull request adds a simple concept of controller multiplexer
which the PSG IO code can call whenever port 14 is read.
PSG port 15 also controls the level and direction of some joystick
pins, but those are not multiplexed. This pull request corrects how
writes to port 15 are handled and organizes output bits in a predefined
order so controller implementation do not need to know which port they
are connected to. This paves the way for more advanced peripherals
controlled through those outputs, such as the Taito Arkanoid Vaus Paddle.
This adds support for the Sports Pad, a trackball controller for Master System. Input
is done using a Mouse or a trackball (best).
Tested with Sports Pad Soccer and a homebrew test ROM.
The write method is now actually called when TR/TH level and direction
IO port is written to. Also redefined the write method bit width (4) and
document which bit is used for what.
This will allow emulation of controllers which uses the TH line as a
control output. This includes the Export Paddle, the Sports Pad, and
Megadrive controllers.
When the mouse is grabbed, the current implementation hides the
pointer and centers it on the screen.
When the mouse is polled, its relative motion is determined by how far it
has moved from the center of the screen, then it is moved back to the
center by calling XWarpPointer().
XWarpPointer generates an event resulting in an additional poll, which then
sees no movement at all (since the pointer is now centered) and therefore
resets the relative motion values to zero.
If the above reset occurs before the controller code has had the chance to
access the relative motion values, the motion never reach the game. This
works around this issue using a flag to ignore the next event if the
mouse is still centered on the screen.
1. Nametable address is not a latched register, it takes effect immediately
2. Sprites should still be processed & overflow is still set during display disable
3. Hcounter -94 offset is incorrect for ares, as we already have clock 0 = pixel 0.
Despite the Game Gear having no physical controller ports, writes to the IO control register still need to be emulated, and thus the ports need to be present in ares, such that latching h-counter on 0-1 transition is still possible.
Internal Hcounter values (actually clock cycles) are larger than the range of a u8.
The actual Master System h-counter (0x00-0xff range) is calculated later.
1. ram is mirrored between 0xa000-0xbfff, not 0xa000-0xa1ff
2. ram & bank registers are mapped through 0x0000-0x3fff, using only bit.8 to select between them
1. Grouping systems by vendor in the system menu can no longer be disabled.
2. It is no longer possible to hide emulator cores from the menu
3. It is no longer possible to use the higan file select dialog; only the native OS file picker is available.
This makes games requiring a Paddle, such as Megumi Rescue,
playable with an analog stick, or using adapters USB adapters
supporting the HPD-200 Paddle.
"Prefer Japan" should be selected in tools->Boot Options before load
otherwise the game will expect the "Export Paddle" which is not
compatible.
Checking for libraries in /usr/lib does not work reliably, e.g.
on a x86-64 Gentoo the 64-bit libraries are located in /usr/lib64.
Use pkg-config to detect libraries, which should work much better
on any modern Linux distro and also covers Debian's multi-arch
setup.
Using a native data type significantly improves performance of ares::Nintendo64::RSP::instructionEpilogue, making it jump from ~9-10% of cpu time to 5-6% of cpu time during execution
045f2a7f2 Merge pull request #74 from 2weak2live/raw
e23f32f37 Add support for reading LZMA and FLAC hunks in non-CD CHDs.
git-subtree-dir: thirdparty/libchdr
git-subtree-split: 045f2a7f23f5ac10c0122f6f56e42023dfb71e2a
7c37b7ebc Rework x86-32 stack layout
09a58361f Improve sljit abi calling convention
58e36c06a Change skip checks to a macro
ac445a3ef Add sljit specific register argument calling convention
a6c8e5bf7 Remove fast call support on x86-32
a3785b330 Fix x86 mem address encoding
2f8e5c2f2 Implement ARM unaligned support
3e86c50e9 Fix PPC logical or/xor with flag set
d8af3f91b Remove sparc support
3055f116b Fix test50 alignment
41cb888d8 Start supporting unaligned memory access
git-subtree-dir: thirdparty/sljit
git-subtree-split: 7c37b7ebcf17a80f606100ae88e744dff22befe6
because Ubuntu 20.04 still has outdated GCC that doesn't support this flag;
people who get a performance hit from optimising for nehalem will just need to
self compile.
This reverts commit f7657dca4f.
The AI IRQ should be generated when a buffer starts playing, not when
it finishes playing, as verified by hardware tests.
Fixes the audio in Hey Pikachu and possibly other games.
This commit introduces preliminary Atari 2600 emulation.
In the current state, many games are working but with the following caveats
1. Only a small subset of mappers are supported
2. The TIA isn't cycle accurate yet; many games have rendering and/or collision issues.
There is currently little-to-no reason to use this over other Atari 2600 emulators at this time,
but the goal is to eventually have cycle-accurate atari emulation.
The exact behavior of the freeze bit hasn't been investigate yet, but
at the very least it stops the RDP command engine. This PR does a
basic approximation of it, pending more in-depth tests.
Fixes Banjo-Tooie.
It looks like address exceptions and TLB exceptions always set the
same registers (though some are marked as undefined in the manual), so
we unify the two implementations.
Fix several tests in n64-systemtest.
There's a big confusion in the CPU core between virtual and physical
addresses, and we have been fixing many bugs around this. Now that the
situation seems stable, do a big sweep and rename all "address" variables
to "vaddr" when they refer to a virtual address, to simplify reading
the code.
"address" is kept for physical addresses, which is consistent to the
rest of the code outside the CPU that only talks about physical
addresses anyway.
No functional changes.
This commit do further fixes 64-bit addressing. In 64-bit mode, the bus
addressable range is 2Gb (instead of 512Mb), so we need to mask
appropriately all physical addresses.
Fix several tests in n64-systemtest.
This begins improving the RDP status bits to more accurately reflect
what it can be seen on real hardware. It also undoes a hack for RDP
freeze that was allowing Banjo-Tooie to boot. Being a game-specific
hack, I think it is better to simply disable and wait until we find
out how to properly fix the game.
Fix a few new tests in n64-systemtest.
This one is the weirdest. The current implementation is unrolled, but
I can't find a pattern that works. Surely there must be one as the
hardware doesn't surely have a lookup table. Anyway for now this
implementation is completely accurate, albeit verbose.
Fix one test in n64-systemtest
On real hardware, LWL/LWR execute a SysAD 32-bit masked read. Ares
was emulating them with one or multiple shorter accesses, which is
not the correct behavior wrt RCP hardware registers and PI bus area,
where the RCP incorrectly ignores the access size causing several bugs.
After this commit, LWL/LWR always do a 32-bit access on the bus, which
makes sure that we replicate the exact behavior.
SWL/SWR have a similar problem but harder to fix, because the SysAD
bus can do 24-bit writes, which is not something that Ares memory
functions support. So that's for another day.
This fixes a bug in mame RDP with respect to scissoring: the upper X
bound is inclusive in copy and fill modes (and exclusives in the others).
This seems another bug in Mame's refactorings that doesn't appear
in upstream angrylion, given the fact that both cen64 and parallel-RDP
emulates this correctly.
Also adding in protection against another bad shift case. Can't use the same code here though... could avoid the branching if it can be safely assumed _addressBits is always at least 3
329a8c9 had a bug: it moved the queue.insert line *after* dmaWrite;
but dmaWrite updates the io.writeLength to its post-transfer status,
so the calculated timing was incorrect.
Fix the regression in Cruisin' Exotica and possibly others.
Luckily enough, n64-systemtest triggered an interesting bug in our
RSP recompiler: a hash collision of the IMEM contents. The used hash
is objectively very poor so a collision is well possible.
Switch to CRC32 that should be enough to our scope.
The idea of doing a full IMEM hash is probably a bit weak to begin with,
but that's for another time.
Fix a new test in n64-systemtest (that only failed because of this).
This change implements RSP DMA double buffering in a more faithful
way, so that reads from the registers always return the current values
(ongoing transfer or finished transfer) rather than the pending ones.
Moreover, this also makes Ares transfer bytes in background a row at
a time, rather than all of them at the end. It is a bit more accurate,
and it was also easier to implement in the new architecture.
This also fixes several tests in n64-systemtest.
Ares used to have full 64-bit TLB support but it was removed at some
point because of some wrong testing that apparently made us believe
that the CPU didn't support that mode. It will have to be restored from
the git history in the future, though it's not very urgent because
nobody is using 64-bit pointers on N64 (there is no toolchain with
64-bit pointers, nor it seems useful).
Luckily, at least the segment parsing was left in and just commented out.
This allows to pass the last two remaining tests in n64-systemtest.
761d48d2b Improve constant generation
1f32a9f23 Implement fpu operations for RISC-V
ad99f17a9 Improve x86 float compare
fb55788d0 Initial implementation of RISC-V port
7f08de6ff Improve jump code generator on MIPS
469c61db9 Improve mips code generator
a4e8e34ef Support unsaved registers on s390x
f404f3608 Support unsaved registers
88d4778b9 Add license file
160b6f99d windows: fix building in arm64 with clang (#126)
022482eeb wxexec: officially drop support for EOL NetBSD < 8 versions (#124)
beda74f07 Support reworked floating point compare on s390x
050215b22 Remove unnecessary checks
6b950049d Improve floating point compare.
6ace72c90 windows: allow building with MinGW64 gcc/clang (#125)
186b07064 mips: avoid sign conversion warnings with clang (#122)
e0b17f5a6 macos: fix recent regression breaking build in macos/arm64e (#121)
68d9b4bac misc: mostly to avoid warnings (#120)
76330309a Update s390x.
6807c7a8f Remove SLJIT_NEG.
ca530a4a7 Readd carry flag support.
5f60134b5 s390x: be explicit about cache coherence needs (#119)
75a555604 power: avoid bogus clear_cache builtin in gcc >= 10 (#118)
1448ef97c sparc: avoid NOP implementation for clear_cache with gcc (#117)
ad69ad87b sparc: build fixes (#116)
47646b943 Support incoming arguments in scratch registers for s390x.
4fbdd6953 Support incoming arguments in scratch registers.
86ebfbd50 Rework x86-32 function prologue/epilogue.
2f8cf7a08 Increase the number of floating point registers on ppc, mips, and sparc.
2737606ee Increase the number floating point registers on s390x.
03469c8e1 Rename tail call to call return and minor ARM improvements.
7cb8a5c24 Increase the number floating point registers on x86 and ARM.
b35ab5e7e Implement fpu support on s390x.
dcc8fc149 misc: fix -Wextra related errors (#114)
92fcb0fe5 Fix fallthrough errors.
d345a64b3 misc: build/documentation fixes from recent changes (#113)
ff6ec4f74 Implement tail call on MIPS.
eed28632f Implement tail call on ARM.
d7793570f Reduce signed comparison warnings.
30b2dcd83 Reduce value conversion warnings on s390x.
c783c1119 Reduce value conversion warnings on MIPS, PPC, SPARC.
335ee51f5 Reduce value conversion warnings on ARM.
8d0f668fa Improve value conversion warnings.
373163144 Implementing tail calls for x86.
9c8b6961b Improve argument sanity checks.
24c547b7e Swap f32 and f64 argument types.
7f0afb25e Rework function argument list descriptor macros.
585ac42bf Implement four argument support for emit enter.
b5e0b1234 Improve mov32 operation.
433294658 Fix incorrect function call (#112)
cf594d74d Change SLJIT_I32_OP and SLJIT_F32_OP to SLJIT_32.
ae5fff841 Improve arm code generator.
43538b877 Replace SLJIT_UNUSED with appropriate function calls.
git-subtree-dir: thirdparty/sljit
git-subtree-split: 761d48d2b89a048badbd9c5cf45da75336891cfe
When an exception happen in a delay slot, it behaves the same whether
the branch was taken or not. In Ares, instead, the state "delay slot"
only applied to taken branches.
Fix several tests in n64-systemtest
These timings actually depend on the PI registers, even though they
are almost always set to fixed default values. We will get there
eventually and provide a more accurate figure, but for now this
allows to pass timing tests in n64-systemtest so that it can't be
more wrong than before.
A last minute change in 741320e0be introduced a regression in controller
input.
Similar to what we did with PI DMA, SI DMA does not go through the main
bus (SysAD bus) but directly communicate with pif and rdram. This is not
just for the sake of correctness, but SysAD bus half-word writes are
now emulated with the same brokeness they have on real hardware, and
obviously DMA works instead. Moreover, since SI only reads/writes
32-bit words, also switch to word access.
Currently, Ares does not model the PIF chip on its own: it looks like
there was an original mistake that conflated the PI (peripheral
interface, one of the components of RCP) with the PIF-NUS (a separate
chip, connected to SI component of RCP via a serial bus).
This refactor introduces a PIF class and moves all the related code
into it. Since the class implements the Memory::IO protocol for memory
accesses, it also fixes memory accesses with non standard sizes, as
tested by n64-systemtest.
There is a bit confusion of virtual vs physical addresses in Ares,
so dcache/icache were sometimes using a virtual address, sometimes
a physical one. This is wrong: cache is based on physical addresses
only.
Moreover, the CACHE opcode was not even going through TLBs, while it
should. So a CACHE opcode on a TLB-mapped address wasn't working before.
This bug has always been there, but was hidden by the incorrect TLB
matching logic. After fixing the logic in 0bf24b3, this bug was
uncovered.
Fixes Goldeneye.
All writes through the PI bus are actually performed asynchronous by
the hardware, and the status is reflected in the PI IO busy bit.
This commit emulates this properly, and also emulates what happens while
the busy bit is set: further writes are ignored, and reads at any
address return the word being written.
This fixes A Bug's Life and Toy Story 2.
This is a revert of 56458d5b, while keeping b7f96b7109 which is the
real fix that should have been done all along. The former just papered
over the issue and actually introduced a regression (Goldeneye wouldn't
boot).
Co-Authored-By: remutro <[email protected]>
Also take the chance to remove the "hopefully accurate but then not
really" implementation which runs after every instruction in favor
of a real random.
Fix one test in n64-systemtest ROM.
PC register in VR4300 is 64-bit but there were many places where
the register was incorrectly treated as a 32-bit one, effectively
discarding the higher half.
Fix several tests in n64-systemtest ROM.
To get clean makefile targets working robustly under a Windows command
prompt, allow the entire contents of obj/out directories to be deleted.
They are now recreated by the build as needed.
Replace uses of Bourne shell commands (cp, mkdir) with shell-agnostic
versions that work from a Windows command prompt. Some Bourne shell
commands still remain in macOS and Linux specific makefile lines.
using `type` results in compiler warnings: `warning: result of comparison against a string literal is unspecified (use an explicit string comparison function instead)`
Was informed by merryhime that `typeStr` was probably intended.
The N64 core was forcing -msse4.2 for compilation of the whole Ares.
On host PCs without SSE 4.2, Ares would crash at startup with SIGILL
because GCC used SSE 4.2 instructions even in hiro, while building up
the UI.
RSP SIMD emulation requires SSE 4.1, but the solution here is to
fallback to SISD if SSE 4.1 is not supported. This can be checked
with a predefined macro, that will be set by GCC. We do compile with
-march=native, so this will reflect the host PC of the build process.
For non-local builds (eg: official CI builds), default to nehalem
(Core 2) which is the first architecture with SSE 4.1.
Since this is yet another compile-time flag that affects the N64 core
performance, add a status message warning if SIMD is disabled.
Fixes#193
This is because C-BIOS has significant compatibility issues, including
the ability to boot any software that uses BASIC.
The MSX2 emulation is still too preliminary to be able to boot the
official bios, so msx2 will continue to use C-BIOS for the time being.
Replace the large, inner circular dead-zone of the N64 control stick with a small, inner square dead-zone; separate the inner and outer dead-zones; attach the scaling equation to the outer dead-zone; fixes https://github.com/ares-emulator/ares/issues/86 .
Nintendo 64 homebrew community is standardizing on a convention to
declare the save memory type as a header flag. This convention has been
first introduced by EverDrive 64 as a way to handle games not present
in their DB, but it's been since adopted by libdragon as well.
With this commit, Ares will automatically configure the correct savetype
for homebrew ROMs using the special header flag.
This is implemented via a 'keyboard capture' hotkey; this ensures that
users can switch between keyboard & gamepad emulation, even if they have
no physical gamepad.
When keyboard capture is enabled:
- All non-hotkey key-presses are translated and dispatched to the guest
- Virtual GamePad Inputs that are mapped to Keyboard no longer trigger
- Virtual GamePad inputs that are mapped to Mouse or physical GamePads work normally.
Nearly all state is initialized to a fixed or random value during
power-on, though a few things are deliberately left alone on soft reset.
A handful of fields weren't being initialized at all, save for the zero
initialization that occurs during process creation. This state would be
persisted from one ROM load to the next.
This fix is intended to address 32x PWM audio eventually going silent
after switching between multiple roms.
- vtick() shifted; can't be any later w/o breaking due to render alignment
- vblank flag update moved to vtick(); also updated on v28/v30 switch (per ekeeke's note re: Kabuto's findings)
- corrected apu irq timing
- readded extra refresh slot when display is disabled (confirmed after latest timing fixes)
ares v127 brings significant improvements to Mega Drive and Nintendo 64
emulation, as well as improvements to NES / Famicom and SNES / Super Famicom.
Other than the usual emulation improvements, there have been the following notable
changes:
**Apple Silicon Support**
ares v127 fixes the recompiler for aarch64 architecture, meaning that it is now
possible to create Apple Silicon/M1 native builds, without relying on Rosetta
and without losing support for the high performance JIT recompilers.
In order to be Apple Silicon Native, it is currently required to compile ares
from source code as automated builds have not yet been configured, but users
who wish to do so will no longer lose functionality or suffer poor performance
as a result.
**MAME RDP**
ares's Nintendo 64 core uses paraLLEl-RDP by default; this brings fast and
accurate RDP emulation as long as Vulkan is present on the users machine; this
meant that Nintendo 64 emulation was completely broken for all configurations
without Vulkan support, including macOS.
ares v127 adds support for MAME's RDP implementation as a fallback, allowing
Nintendo 64 emulation to be used when Vulkan is not present. This is handled
automatically, however, a new option has been added to video settings to allow
Vulkan support to be toggled, giving all users the ability to test the MAME
RDP, if they wish to do so.
Although MAME RDP is now an option, paraLLEl-RDP is still the recommended
choice, for both performance and accuracy.
**Pixel Accuracy Mode**
ares has contains two implementations of some of our emulated hardware; one
optimised for performance, and another optimised for accuracy.
Historically, the choice of which path to use has never been exposed to the
user; higan *always* used the 'accurate' profiles, with ares always opting for
the 'performance' profiles; any user wishing to change this would be required
to compile ares themselves from source.
As of ares v127, we now provide a new option in the emulator settings: "Pixel
Accuracy"; when this is enabled, any emulator core that supports a pixel
accurate mode will use it.
For 99% of games, the default fast profiles will be sufficient, but enabling
"Pixel Accuracy" allows games that require mid-scanline effects, such as the
infamous "Air Strike Patrol" to function properly.
The following systems are currently support the Pixel Accuracy setting:
* NEC - PC-Engine / TurboGrafx
* Nintendo - Super Famicom / SNES
**Changelog:**
* desktop-ui: hook up pc-engine 6-button pads to virtual pads [Luke Usher]
* desktop-ui: implement frame advance [Luke Usher]
* fc: add bus conflicts to cnrom [encoded-byte]
* fc: check for ram on mmc1 [encoded-byte]
* fc: check if ram exists on mmc3 [encoded-byte]
* fc: clear oam address on each scanline [encoded-byte]
* fc: improve mmc3 irq behavior [encoded-byte]
* fc: improve ppu skipped clock timing [encoded-byte]
* fc: use hkrom for mmc6 [encoded-byte]
* m68000: allow recovery from zero divide [TascoDLX]
* m68000: reimplement DBcc instruction with correct timing[TascoDLX]
* md: A few fixes to SRAM save game [rasky]
* md: correct overscan / output when display is off [TascoDLX]
* md: correct reads of CRAM and VSRAM [rasky]
* md: detect region 'K' as NTSC-J [invertego]
* md: fix APU port in [rasky]
* md: fix debug register sprite masking [rasky]
* md: fix high bits in control port read [rasky]
* md: fix misaligned reads from VRAM [rasky]
* md: fix register masked write in mode5 [rasky]
* md: fix vblank bit toggling horizontal timing [rasky]
* md: fix VSRAM out of bound accesses [rasky]
* md: ignore erroneous device string used by Codemasters [invertego]
* md: implement undocumented VDP VRAM 8-bit reading mode [rasky]
* md: persist VDP state on reset [invertego]
* md: restore vdp free slot lost to refresh [TascoDLX]
* mia: Correct save type for Premier Manager 64 (N64) [sp1187]
* mia: Correct save type for Transformers: Beast Wars Transmetals (N64) [sp1187]
* mia: correct type for pak attribute [encoded-byte]
* mia: fix 32x sram [Luke Usher]
* mia: properly pass MD eeprom details to ares [Luke Usher]
* mia: updated famicom database [encoded-byte]
* mos6502: add illegal nops [encoded-byte]
* ms: correct overscan inc. dynamic screen resizing [TascoDLX]
* n64: add MAME RDP as a fallback for parallel-RDP [invertego]
* n64: allow vulkan to be disabled [Luke Usher]
* n64: change PI DMA to use 16 bit fetches [CasualPokePlayer]
* n64: fix mult/div opcode timings [rasky]
* n64: fix RSP halt condition to be more accurate [rasky]
* n64: fix several RDP regressions [invertego]
* n64: fix small bug in VMACQ [rasky]
* n64: fix SRA/SRAV opcodes [rasky]
* n64: fix vulkan detection [Luke Usher]
* n64: improve rsp recompiler pool allocation [invertego]
* n64: swap RSP/RDP order [CasualPokePlayer]
* n64: templatize rsp vpu [invertego]
* n64: vulkan tweaks [Luke Usher]
* nall: fix many compilation warnings on macOS [Luke Usher]
* nall: fix page protection on Apple silicon [invertego]
* nall: rewrite recompiler for machine-independence using sljit [invertego]
* pce: runtime pixel accurate VDP setting [invertego]
* sfc: fix horizontal off-screen test for sprites [jbo-85]
* sfc: fix missing sprite tile on Super Conflict title screen [jbo-85]
* sfc: fix missing sprites in Jurassic Park that are partly offscreen [jbo-85]
* sfc: runtime pixel accurate PPU setting [invertego]
* sh2: move registers into POD struct [invertego]
Some systems in ares contained two implementations of video hardware;
these systems were Mega Drive / Genesis, Super Famicom / SNES, and
PC-Engine / TurboGrafx 16.
For the Mega Drive, we switched to the accuracy core quite some time ago,
SNES and PC-Engine we were still using the performance core.
Going forward, we wish to only maintain the accuracy focused renderers.
VDP always writes transparent pixels to the internal sprite buffers,
overwriting previous transparent pixels; then the first non-transparent
pixel sticks and wins. This implementation detail only reveals itself
when sprite plane masking is activated using the VDP debug register:
in that case, the palette number of transparent pixels concurs in the
AND of the visible pixels, and thus the correct palette number should
be found in the buffer.
Fixes the logo effect of Overdrive 2 (ref #255)
After more analysis, it looks like the correct thing to do is to
check for vblank status on most of the raster line. Kabuto's doc says
that it is possibly to switch from V30 to V28 during line 224 and
still see the vblank triggered, which suggests that the hardware does
actually check it on most of the time.
This seems to fix#402 and does not seem to cause any immediate
regression in timing-sensitive ROMs.
Currently, the vblank bit is turned on/off at the same time vcounter
is incremented, which is a reasonable assumption, missing any real
data on this.
But it turns out this is responsible for most of the breakage of
Overdrive 1. I did some tests and it looks like anything in the
range >= 0xF0 (same line), or <= 0x80 (on next line) fixes those bugs.
I decided to bind it to vedge(), which means that vblank bit now is
triggered the same instant that VINT is raised, which also makes sense
when you think of it.
Updates #212
VRAM misaligned addresses were implemented with partial slot reads.
This seems to be wrong, as proven by vdpfifotesting: once the slot is
read, the whole word is invalidated.
VSRAM is actually made of 40 11-bit words, though the chip only accesses
the first 10 bits. The top bit on each word is still readable and writable
though, so they should be emulated.
Also, reading at addresses >= 40 returns a copy of the first word,
rather than 0.
Mode5 (SMS compatibility mode) is unsupported and mostly undocumented,
but the vdpfifotesting ROM at least checks one know behavior: non-SMS
registers can't be written.
Bits 10-15 in control port read (aka status register) are not fixed
as found in some online docs, but they are actually an open bus
that returns the instruction prefetched by m68k at that cycle.
* Allow MIA to declare address for mapping (typically from ROM header)
rather than hardcoding 0x200000.
* Autoenable SRAM if the ROM size is smaller. Also make the ramEnable
I/O conditional to the same layout.
* Add MIA entries for NBA Live 98, NHL 96 and NHL 98, which have a 8-bit
SRAM not declared in the header.
Using the read<Byte> currently in use breaks DMAs from Flash (breaking Paper Mario, probably others), which always return 0. I assume 8 bit reads are just not allowed for Flash, although I can't verify this myself.
Checking https://github.com/n64dev/cen64/commit/8367698e20cca7eb262779f19c8c7847ae31bb29, it seems that fetches should always be 16 bits anyways, so I presume this is the correct behavior, and fixes DMAs from Flash.
No regressions with the original testrom have occured.
- introduce a status api, so cores can report status messages to the UI
- avoid calling vulkan-related functions when vulkan is disabled
- show status messages so the user is aware of what RDP implementation is active
- Disabled 'loaded' status message, it prevented the Vulkan messages being shown
Update the stack base and limit in the thread information block. This is
required to support kernel stack unwinding, which is used for both C++
exception dispatch and setjmp/longjmp on Windows x64 and ARM64.
Add a cothread entry routine that consistently aborts when the user
supplied routine returns. Debugger stack backtraces now stop
consistently at this entry routine.
The Korean release of Tiny Toon Adventures specifies its region with a
'K' and, like several other Korean releases, is region locked to
Japanese consoles. It may be the only one with a 'K' specifier, though.
Taken from NEC VR4300 manual. These are easier than expected to
implement accurately as the CPU doesn't execute them in parallel but
stalls the entire pipeline while they are running.
Real hardware testing showed that VMACQ does not modify the accumulator
if it is exactly zero. Fix it.
Also remove two "unconfirmed" comments which I have personally verified.
* Fix usage of break opcode in a delay slot. After unhalt, the
RSP continues execution, taking the jump if needed. So the
branch state should not be affected by the break opcode.
* Reading from SP_PC produces garbage (open bus?) when the RSP is
running. This fix is unlikely to fix game but may help homebrew
developers.
* Writing to SP_PC resets the RSP MIPS pipeline, so any pending branch
is canceled.
The existing implementation was allocating pools in the code cache only
to copy them to the heap. This was wasteful on multiple counts: the
space in the cache would go unused until the next allocator flush and
the data copied to the heap consisted almost entirely of zeroes. Best of
all, writing the hash code to the code cache was triggering a page
protection fault on Apple M1.
A small data structure refactor avoids the heap allocations, the copies,
the wasted space in the code cache, and the page protection issue.
For systems that do not meet parallel-RDP's Vulkan requirements, use the
pure software RDP implementation from MAME as a fallback.
All of the source files taken from MAME are either BSD-3-Clause licensed
or public domain. Edits were kept to a minimum and guarded by ifdefs to
ease future integrations.
- when dynamically allocating executable memory, use VirtualAlloc/mmap()
for finer control over allocation flags (like MAP_JIT on macOS/arm64)
- toggle JIT memory protection around writes on macOS/arm64
- reduce recompiler code cache sizes to improve likelihood of dynamic
allocations being close to ares image (affects branch perf)
- remove arch x86_64 override on macOS non-local builds; native arm64
builds should now be at feature parity with x86_64
- sh2: prevent pollution of code cache with empty pools by invalidate()
Games tested so far. Two new not working games discovered:
- Aladdin (Europe): Hangs after starting game
- Wizards & Warriors (Europe): Graphicals glitches on HUD, severe slowdowns. PAL timing related?
For some users, this gives a dramatic performance boost, and finally
brings the Windows builds in-line with Linux/Mac builds in terms of
performance.
This technically goes against the Win64 ABI, which demands that SSE
registers are saved, however, in-practice, our testing has shown that
this has not caused any issues so far.
On Windows, track WM_SETFOCUS and WM_KILLFOCUS messages to determine
focused status rather than polling with GetForegroundWindow(). The
latter involves a syscall and causes noticeable slowdown when called
repeatedly, such as when GameBoy games poll joypad status in a loop.
Fix unloading systems with light gun peripherals active. The code
responsible for removing crosshair sprites was dereferencing a null
pointer. This cleanup now occurs in Screen::quit() when unloading.
Instead of just reading the first file from a zip archive, prefer files
that match known rom extensions. Extra files such as readmes should not
interfere with the loading of the game.
Fix several correctness bugs in SH2 instructions in both the interpreter and
recompiler and switch the default implementation from the cached interpreter to
the recompiler. This brings the 32x games BC Racers and Zaxxon's
Motherbase 2000 to playable status. Fixed instructions:
Interpreter
- ADDC Rm,Rn
- ADDV Rm,Rn
Recompiler
- MAC.W @Rm+,@Rn+
Both
- CMP/STR Rm,Rn
- MOV.B Rm,@-Rn
- MOV.W Rm,@-Rn
- MOV.L Rm,@-Rn
- NEGC Rm,Rn
Improves thread-switching performance using the following techniques:
- Interleave stores/loads
- Restore the stack pointer and link register as early as possible
The calling convention specifies that d8-d15 (the lower 64 bits of
vector registers q8-q15) are callee-saved. However, libco was
erroneously saving and restoring general-purpose registers x8-x15
instead.
Ares JIT recently started to require the data segment to be executable
(see https://github.com/ares-emulator/ares/pull/200 for details on why
this was done instead of allocating a new segment via mmap).
To do this, it uses mprotect() (bump_allocator::resize), but it also
needs to tell the linker that the data segment can be upgraded to
executable with -Wl,-segprot,__DATA,rwx,rw (nall/GNUmakefile).
Unfortunately, for quite some time, the clang LD had a bug and didn't
accept that option for the data segment.
The official CI has a newer linker without the bug, but for developers
compiling ares with an old toolchain, this small tool will patch the
binary to mark the data segment as potentially executable.
This change upgrades GCC from the version preinstalled by GitHub Actions
(8.1.0) to the latest MSYS2 version (10.3.0). It also adds a
Windows/Clang build configuration, though the release job still
grabs the GCC build.
about:Report an issue running a specific game in ares
title:"[system] Game"
labels:bug
assignees:''
---
Before submitting an issue, please use the search to make sure an issue doesn't already exist, you should also make sure your rom is not a bad dump, by comparing against the hashes in the No-Intro (Cartridges) or Redump (CD-ROM) databases.
**Describe the issue**
A clear and concise description of what the bug is.
**Rom Information**
Specify the impacted rom filename and any associated hashes (sha256 preferred);.
The easiest way to do this is to open the game in ares, and go to "Tools -> Manifest" and copy/paste the contents.
**ares** is a multi-system emulator that began development on October 14th, 2004.
It is a descendent of [higan](https://github.com/higan-emu/higan) and [bsnes](https://github.com/bsnes-emu/bsnes/), and focuses on accuracy and preservation.
It is a descendant of [higan](https://github.com/higan-emu/higan) and [bsnes](https://github.com/bsnes-emu/bsnes/), and focuses on accuracy and preservation.
Automated, untested builds of ares are available for Windows and macOS as a [pre-release](https://github.com/higan-emu/ares/releases/tag/nightly).
Only the latest nightly build is kept.
Prerequisites
-------------
### *nix building
###### Minimum required packages:
```
g++ make pkg-config libgtk-3-dev libcanberra-gtk-module libgl-dev libasound2-dev
```
###### Additional Audio Drivers
ares supports additional audio drivers besides the ALSA drivers included above. Installing these additional packages will allow them to be selected in Settings > Drivers:
`libao-dev libopenal-dev'
###### GTK2 & GTK3
By default, GTK3 is used, but support for GTK2 is available. You will need to install the additional package `libgtk2.0-dev` as well as specifying the command line option `hiro=gtk2` at compile time.
###### SDL2 for input
If you would like to use SDL for input (e.g. for using a controller), you will need to install the `libsdl2-dev` and `libsdl2-2.0-0` packages and perform a clean build of ares.
You should then be able to select SDL for input in the Settings > Drivers menu.
##### Building with clang
clang++ is now the preferred compiler for ares. If clang is detected on Windows/macOS/BSD, it will be selected by default. On Linux and other platforms, g++ remains the default if present. To build with clang, it is necessary to install both the `clang` and `lld` packages. If you would like to manually specify a compiler, you can use the following option: `compiler=[g++|clang++]`
--------------
### Windows building
To build on Windows, using MSYS2 is recommended which can be download [here](https://www.msys2.org/). Follow the instructions
on this page to install and setup an appropriate MINGW64 environment. Running the command:
from the MSYS2 MSYS terminal should setup everything you need to compile ares. Note that in order to compile, you will want to be in a MINGW64 terminal window after install and setup is complete.
##### Building with clang
clang is available through Visual Studio (or Build Tools for Visual Studio) through its installer and can be used to build ares. You will still need to supply GNU make in this instance. MSYS2 also offers a clang environment. You will want to make sure you select the clangw64 option during installation of MSYS2 which should provide and additional CLANG64 pre-configured environment. Install the clang toolchain package from the MSYS2 terminal:
Once complete, open a CLANG64 terminal window and proceed with building ares.
###### Debug Symbols
When building with clang, by default symbols will be generated for debug builds using an MSVC compatible format (CodeView) for use with Windows debugging tools. In order to generate GDB compatible symbols, specify the following option: `symformat=gdb`
Compilation
-----------
Check out the source code by running this command:
`-j#` indicates number of parallel build processes, and shouldn't be set higher than N-1 cores on your processor. Specifying this option can significantly decrease the time to build this project. There are multiple build types available and it defaults to an 'optimized' build. Build types can be specified using: `build=[debug|stable|release|minified|optimized]`
Build options can be found in the following two make files: nall/GNUmakefile desktop-ui/GNUmakefile
To start compilation from the beginning, run the following prior to compiling:
```
make clean
```
#### Building specific cores
If you would like to build a subset of cores, you can specify the `cores="core1 core2"` option. Currently available cores:
```
a26 fc sfc n64 sg ms md ps1 pce ng msx cv myvision gb gba ws ngp spec
```
Build Output
------------
There is a single binary produced at the end of compilation which can be found in `desktop-ui/out`. On OS's besides Linux, the `Database` & `Shader` directories are copied over here as well. On Linux, running `make install` after compilation will copy these directories and binary into suitable locations (see desktop-ui/GNUmakefile for details). Alternatively, these directories can be copied from `ares/Shaders/*` and `mia/Database/*`.
Command-line options
--------------------
When started from the command-line, ares accepts a few options.
```
Usage: ./ares [options] game(s)
--help Displays available options and exit
--fullscreen Start in full screen mode
--system system Specify the system name
--shader shader Specify GLSL shader name to load (requires OpenGL driver)
--setting name=value Specify a value for a setting
--dump-all-settings Show a list of all existing settings and exit
--no-file-prompt Do not prompt to load (optional) additional roms (eg: 64DD)
```
The --system option is useful when the system type cannot be auto-detected.
--fullscreen will only have an effect if a game is also passed in argument.
Example:
`ares --system MSX examples.rom --fullscreen`
Specifying multiple games allows for multi-cart support. For example, to load
the Super GameBoy BIOS and a game in one command (to avoid a file prompt), you
can do:
`ares "Super GameBoy.sfc" "Super Mario Land.gb"`
The --no-file-prompt option is useful if you wish to launch a game from CLI
without being prompted to load additional roms. For example, some Nintendo 64
games optionally support 64DD expansion disks, so this option can be used to
suppress the "64DD Disk" file dialog, and assume any secondary content is
disconnected.
High-level Components
---------------------
* __ares__: emulator cores and component implementations
* __desktop-ui__: main GUI implementation for this project
* __hiro__: cross-platform GUI toolkit that utilizes native APIs on supported platforms
* __nall__: Near's alternative to the C++ standard library
* __ruby__: interface between a hiro application and platform-specific APIs for emulator video, audio, and input
* __mia__: internal ROM database and ROM/image loader
* __libco__: cooperative multithreading library
Contributing
------------
Please join our discord to chat with other ares developers: https://discord.com/invite/gz2quhk2kv
@@ -125,19 +123,17 @@ auto HuC6280::algorithmROR(n8 i) -> n8 {
autoHuC6280::algorithmSBC(n8i)->n8{
i^=0xff;
i16o;
i16o=A+i+C;
if(!D){
o=A+i+C;
C=o.bit(8);
V=~(A^i)&(A^o)&0x80;
}else{
idle();
o=(A&0x0f)+(i&0x0f)+(C<<0);
if(o<=0x0f)o-=0x06;
C=o>0x0f;
o=(A&0xf0)+(i&0xf0)+(C<<4)+(o&0x0f);
n8l=(A&0x0f)+(i&0x0f)+C;
C=o>0xff;
if(o<=0xff)o-=0x60;
if(l<=0x0f)o-=0x06;
}
C=o.bit(8);
Z=n8(o)==0;
N=o.bit(7);
returno;
Loaded 100 of 2508 files, more files were not shown because too many files have changed in this diff.
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Luke Usher