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Release 6.0.0-Alpha11 (#3079)
* Update changelog to 6.0.0-Alpha11 * Increment version to 6.0.0-Alpha11 * Update bindings
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Rot127
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This file details the changelog of Capstone.
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-----------------------------
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Version 6.0.0-Alpha11: September 21th, 2026
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## What's Changed
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* Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 by @germiBest in https://github.com/capstone-engine/capstone/pull/2979
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* AArch64: report NZCV access for MRS/MSR of NZCV by @gaul in https://github.com/capstone-engine/capstone/pull/3002
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* xtensa: sign-extend scaled offsets in decodeOffset_* helpers by @Samin061 in https://github.com/capstone-engine/capstone/pull/2997
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* Fix Xtensa test with wrong mode selection. by @Rot127 in https://github.com/capstone-engine/capstone/pull/3004
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* Xtensa: Fix Stack overflow by @Rot127 in https://github.com/capstone-engine/capstone/pull/3012
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* AArch64: Fix diet-mode NULL deref in printMatrixTileVector by @amit-sides in https://github.com/capstone-engine/capstone/pull/3017
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* HHPA: Correct name of r0 register - flags -> r0 by @Rot127 in https://github.com/capstone-engine/capstone/pull/3024
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* Fix read from uninitialized memory by @Rot127 in https://github.com/capstone-engine/capstone/pull/3011
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* Add MSAN build option to CMakeLists.txt by @Rot127 in https://github.com/capstone-engine/capstone/pull/3029
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* x86: use effective address size for the loop counter register by @phverg in https://github.com/capstone-engine/capstone/pull/3025
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* systemz: bounds-check register index in decodeRegisterClass by @jmestwa-coder in https://github.com/capstone-engine/capstone/pull/3044
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* x86: fix VMOVUPS memory operand access by @raaller in https://github.com/capstone-engine/capstone/pull/3035
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* PowerPC: Keep BI out of the CTR-only branch predicate by @phix33 in https://github.com/capstone-engine/capstone/pull/3043
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* Alpha: Fix implicit read/write details for some memory instructions by @atirna in https://github.com/capstone-engine/capstone/pull/3034
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* X86: Fix four AT&T operand-detail defects by @phix33 in https://github.com/capstone-engine/capstone/pull/3042
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* RISCV: Revamp flags to allow fine grained control over aliasing by @moste00 in https://github.com/capstone-engine/capstone/pull/3008
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* M68K: Fix fmove.x 96-bit extended immediate decode length and printing by @b1llow in https://github.com/capstone-engine/capstone/pull/3016
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* AArch64: fix Rt operand of the integer STLUR forms by @gaul in https://github.com/capstone-engine/capstone/pull/3046
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* AArch64: SYSL writes its Rt operand, it does not read it by @gaul in https://github.com/capstone-engine/capstone/pull/3045
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* x86: fix near RET decoding with 0x66 and REX.W by @raaller in https://github.com/capstone-engine/capstone/pull/3049
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* ARM/AArch64: Improve runtime of ARM/AArch64 register name patching. by @Rot127 in https://github.com/capstone-engine/capstone/pull/3048
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* Handle case of vsprintf returning oob pointer offset. by @Rot127 in https://github.com/capstone-engine/capstone/pull/3060
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* PowerPC: add mcrxr instruction support by @StilesCrisis in https://github.com/capstone-engine/capstone/pull/3065
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* X86: Zero the operand slot before filling it in the Intel implicit insert by @phix33 in https://github.com/capstone-engine/capstone/pull/3057
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* cstest: Compare the PPC branch details once and without requiring operands by @phix33 in https://github.com/capstone-engine/capstone/pull/3058
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* Add AI guidelines and requirements. by @Rot127 in https://github.com/capstone-engine/capstone/pull/3064
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* x86: Add missing access info for operand[3] of vmulps. by @raaller in https://github.com/capstone-engine/capstone/pull/3059
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* x86: fix EVEX writemask access in AT&T syntax by @raaller in https://github.com/capstone-engine/capstone/pull/3072
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* Replace all system allocations with cs_mem_ allocations. by @Rot127 in https://github.com/capstone-engine/capstone/pull/3074
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* x86: fix JO/JNO operand size in 64-bit mode by @raaller in https://github.com/capstone-engine/capstone/pull/3067
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* riscv: propagate register-class decode failure in custom decoders by @jmestwa-coder in https://github.com/capstone-engine/capstone/pull/3071
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* x86: Fix access of X86_CMPSL memory operands by @raaller in https://github.com/capstone-engine/capstone/pull/3080
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* Add AI guidance by @raaller in https://github.com/capstone-engine/capstone/pull/3081
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## New Contributors
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* @germiBest made their first contribution in https://github.com/capstone-engine/capstone/pull/2979
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* @gaul made their first contribution in https://github.com/capstone-engine/capstone/pull/3002
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* @amit-sides made their first contribution in https://github.com/capstone-engine/capstone/pull/3017
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* @phverg made their first contribution in https://github.com/capstone-engine/capstone/pull/3025
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* @raaller made their first contribution in https://github.com/capstone-engine/capstone/pull/3035
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* @atirna made their first contribution in https://github.com/capstone-engine/capstone/pull/3034
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* @StilesCrisis made their first contribution in https://github.com/capstone-engine/capstone/pull/3065
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**Full Changelog**: https://github.com/capstone-engine/capstone/compare/6.0.0-Alpha10...6.0.0-Alpha11
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-----------------------------
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Version 6.0.0-Alpha10: July 21th, 2026
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@@ -99,8 +99,8 @@ public class M68k_const {
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public static final int M68K_OP_MEM = CS_OP_MEM;
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public static final int M68K_OP_FLAG_NONE = 0;
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public static final int M68K_OP_FLAG_REG_LOWER = ;
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public static final int M68K_OP_FLAG_REG_UPPER = ;
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public static final int M68K_OP_FLAG_REG_LOWER = 1<<0;
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public static final int M68K_OP_FLAG_REG_UPPER = 1<<1;
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public static final int M68K_OP_FLAG_SHIFT_LEFT = 1<<2;
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public static final int M68K_OP_FLAG_SHIFT_RIGHT = 1<<3;
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public static final int M68K_OP_FLAG_MEM_UPDATE = 1<<4;
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@@ -529,7 +529,11 @@ public class M68k_const {
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public static final int M68K_INS_CP1NOP = 400;
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public static final int M68K_INS_CP1ST = 401;
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public static final int M68K_INS_TPF = 402;
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public static final int M68K_INS_ENDING = 403;
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public static final int M68K_INS_MAAAC = 403;
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public static final int M68K_INS_MASAC = 404;
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public static final int M68K_INS_MSAAC = 405;
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public static final int M68K_INS_MSSAC = 406;
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public static final int M68K_INS_ENDING = 407;
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public static final int M68K_GRP_INVALID = 0;
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public static final int M68K_GRP_JUMP = 1;
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@@ -537,4 +541,4 @@ public class M68k_const {
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public static final int M68K_GRP_IRET = 5;
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public static final int M68K_GRP_BRANCH_RELATIVE = 7;
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public static final int M68K_GRP_ENDING = 8;
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}
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}
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Load Diff
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Load Diff
@@ -72,6 +72,7 @@ extern "C" {
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#define CS_VERSION_ALPHA9 (CS_VERSION_ALPHA | 9)
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#define CS_VERSION_ALPHA10 (CS_VERSION_ALPHA | 10)
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#define CS_VERSION_ALPHA11 (CS_VERSION_ALPHA | 11)
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#define CS_VERSION_ALPHA12 (CS_VERSION_ALPHA | 12)
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#define CS_VERSION_BETA 0xb000
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#define CS_VERSION_BETA1 (CS_VERSION_BETA | 1)
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+1
-1
@@ -9,4 +9,4 @@ PKG_MINOR = 0
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PKG_EXTRA = 0
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# version tag. Examples: rc1, b2, post1 - or just comment out for no tag
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PKG_TAG = alpha10
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PKG_TAG = alpha11
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