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https://github.com/darlinghq/darling-gdb.git
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Extend xor-endian and per-cpu support in core module.
Allow negated test when watching value within core.
This commit is contained in:
Andrew Cagney
parent
d82e4bf6cc
commit
2f2e6c5d5b
@ -1,3 +1,49 @@
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Tue May 27 14:32:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-watch.c (schedule_watchpoint): Add is_within option so that
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inequality test is possible.
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(handle_watchpoint): Re-pass is_within arg.
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(watch_option_handler): When `!' prefix to pc-watchpoint arg pass
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0 to schedule_watchpoint's is_within arg.
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(sim_watchpoint_init): Re-pass is_within arg.
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* sim-options.c (sim_print_help): Add is_command argument. Don't
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include -- prefix when called from the command line interpreter.
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* sim-watch.c (schedule_watchpoint): Pass true is_within argument.
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* sim-events.c (sim_events_watch_sim): Add is_within argument,
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zero indicates that the test should be reversed.
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(sim_events_watch_core): Ditto.
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(WATCH_CORE): Compare range against is_within.
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(WATCH_SIM): Ditto.
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Tue May 27 12:48:03 1997 Andrew Cagney <cagney@b2.cygnus.com>
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* sim-events.c (WATCH_CORE): Pass NULL cpu argument to
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sim_core_read_buffer. Check nr-bytes transfered.
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* sim-core.h (sim_core_common): Define a new struct that contains
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the common data. to sd and cpu structures.
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* sim-core.c (sim_core_attach): Update.
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(sim_core_init): Update. Remember to copy initialized data to each
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cpu.
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(sim_core_find_mapping): Ditto.
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* sim-core.c (sim_core_read_buffer): Add cpu argument.
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(sim_core_write_buffer): Ditto.
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* sim-n-core.h (sim_core_read_unaligned_N): When mis-aligned
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transfer use xor version of read buffer.
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(sim_core_write_unaligned_N): Ditto for write.
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* sim-core.c (sim_core_xor_read_buffer): New function implement
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xor-endian data read breaking transfer up into xor-endian sized
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blocks.
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(sim_core_xor_write_buffer): Ditto for write.
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(reverse_n): Reverse order of arbitrary number of bytes in buffer
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- needed for xor-endian transfers.
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Fri May 23 14:24:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-inline.h: Review description.
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@ -93,6 +93,7 @@ struct _sim_event {
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/* watch sim addr */
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void *host_addr;
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/* watch core/sim range */
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int is_within; /* 0/1 */
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unsigned ub;
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unsigned lb;
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unsigned64 ub64;
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@ -474,6 +475,7 @@ sim_events_watch_sim (SIM_DESC sd,
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void *host_addr,
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int nr_bytes,
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int byte_order,
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int is_within,
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unsigned64 lb,
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unsigned64 ub,
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sim_event_handler *handler,
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@ -526,6 +528,7 @@ sim_events_watch_sim (SIM_DESC sd,
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new_event->lb64 = lb;
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new_event->ub = ub;
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new_event->ub64 = ub;
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new_event->is_within = (is_within != 0);
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/* insert */
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new_event->next = events->watchpoints;
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events->watchpoints = new_event;
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@ -550,6 +553,7 @@ sim_events_watch_core (SIM_DESC sd,
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sim_core_maps core_map,
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int nr_bytes,
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int byte_order,
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int is_within,
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unsigned64 lb,
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unsigned64 ub,
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sim_event_handler *handler,
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@ -603,6 +607,7 @@ sim_events_watch_core (SIM_DESC sd,
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new_event->lb64 = lb;
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new_event->ub = ub;
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new_event->ub64 = ub;
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new_event->is_within = (is_within != 0);
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/* insert */
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new_event->next = events->watchpoints;
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events->watchpoints = new_event;
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@ -672,10 +677,13 @@ sim_watch_valid (SIM_DESC sd,
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#define WATCH_CORE(N,OP,EXT) \
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{ \
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unsigned_##N word; \
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sim_core_read_buffer (sd, to_do->core_map, &word, to_do->core_addr, sizeof (word)); \
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unsigned_##N word = 0; \
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int nr_read = sim_core_read_buffer (sd, NULL, to_do->core_map, &word, to_do->core_addr, sizeof (word)); \
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OP (word); \
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return (word >= to_do->lb##EXT && word <= to_do->ub##EXT); \
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return (nr_read == sizeof (unsigned_##N) \
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&& (to_do->is_within \
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== (word >= to_do->lb##EXT \
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&& word <= to_do->ub##EXT))); \
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}
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case watch_core_targ_1: WATCH_CORE (1, T2H,);
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case watch_core_targ_2: WATCH_CORE (2, T2H,);
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@ -697,7 +705,9 @@ sim_watch_valid (SIM_DESC sd,
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{ \
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unsigned_##N word = *(unsigned_##N*)to_do->host_addr; \
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OP (word); \
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return (word >= to_do->lb##EXT && word <= to_do->ub##EXT); \
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return (to_do->is_within \
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== (word >= to_do->lb##EXT \
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&& word <= to_do->ub##EXT)); \
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}
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case watch_sim_host_1: WATCH_SIM (1, word = ,);
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@ -43,7 +43,7 @@ sim_core_read_aligned_N(sim_cpu *cpu,
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unsigned_word xaddr)
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{
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sim_cpu_core *cpu_core = CPU_CORE (cpu);
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sim_core *core = &cpu_core->common;
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sim_core_common *core = &cpu_core->common;
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unsigned_N val;
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sim_core_mapping *mapping;
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address_word addr;
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@ -106,8 +106,8 @@ sim_core_read_unaligned_N(sim_cpu *cpu,
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case NONSTRICT_ALIGNMENT:
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{
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unsigned_N val;
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if (sim_core_read_buffer (CPU_STATE (cpu), map, &val, addr,
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sizeof(unsigned_N))
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if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
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sizeof(unsigned_N))
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!= sizeof(unsigned_N))
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SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
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sizeof (unsigned_N), addr,
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@ -139,7 +139,7 @@ sim_core_write_aligned_N(sim_cpu *cpu,
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unsigned_N val)
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{
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sim_cpu_core *cpu_core = CPU_CORE (cpu);
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sim_core *core = &cpu_core->common;
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sim_core_common *core = &cpu_core->common;
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sim_core_mapping *mapping;
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address_word addr;
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if (WITH_XOR_ENDIAN)
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@ -201,9 +201,9 @@ sim_core_write_unaligned_N(sim_cpu *cpu,
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break;
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case NONSTRICT_ALIGNMENT:
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{
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val = T2H_N(val);
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if (sim_core_write_buffer (CPU_STATE (cpu), map, &val, addr,
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sizeof(unsigned_N))
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unsigned_N val = H2T_N (val);
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if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
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sizeof(unsigned_N))
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!= sizeof(unsigned_N))
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SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
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sizeof (unsigned_N), addr,
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@ -239,7 +239,7 @@ standard_option_handler (sd, opt, arg, is_command)
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break;
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case 'H':
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sim_print_help (sd);
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sim_print_help (sd, is_command);
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if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
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exit (0);
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/* FIXME: 'twould be nice to do something similar if gdb. */
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@ -391,8 +391,9 @@ sim_parse_args (sd, argv)
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/* Print help messages for the options. */
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void
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sim_print_help (sd)
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sim_print_help (sd, is_command)
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SIM_DESC sd;
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int is_command;
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{
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const struct option_list *ol;
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const OPTION *opt;
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@ -425,32 +426,35 @@ sim_print_help (sd)
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comma = 0;
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len = 2;
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o = opt;
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do
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if (!is_command)
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{
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if (o->shortopt != '\0')
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o = opt;
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do
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{
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sim_io_printf (sd, "%s-%c", comma ? ", " : "", o->shortopt);
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len += (comma ? 2 : 0) + 2;
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if (o->arg != NULL)
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if (o->shortopt != '\0')
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{
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if (o->opt.has_arg == optional_argument)
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sim_io_printf (sd, "%s-%c", comma ? ", " : "", o->shortopt);
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len += (comma ? 2 : 0) + 2;
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if (o->arg != NULL)
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{
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sim_io_printf (sd, "[%s]", o->arg);
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len += 1 + strlen (o->arg) + 1;
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}
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else
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{
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sim_io_printf (sd, " %s", o->arg);
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len += 1 + strlen (o->arg);
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if (o->opt.has_arg == optional_argument)
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{
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sim_io_printf (sd, "[%s]", o->arg);
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len += 1 + strlen (o->arg) + 1;
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}
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else
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{
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sim_io_printf (sd, " %s", o->arg);
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len += 1 + strlen (o->arg);
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}
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}
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comma = 1;
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}
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comma = 1;
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++o;
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}
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++o;
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while (o->opt.name != NULL && o->doc == NULL);
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}
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while (o->opt.name != NULL && o->doc == NULL);
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o = opt;
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do
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{
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@ -461,11 +465,12 @@ sim_print_help (sd)
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name = o->opt.name;
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if (name != NULL)
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{
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sim_io_printf (sd, "%s--%s",
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sim_io_printf (sd, "%s%s%s",
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comma ? ", " : "",
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is_command ? "" : "--",
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name);
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len += ((comma ? 2 : 0)
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+ 2
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+ (is_command ? 0 : 2)
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+ strlen (name));
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if (o->arg != NULL)
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{
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@ -38,6 +38,7 @@ typedef enum {
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typedef struct _sim_watch_point {
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watchpoint_action action;
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int is_within;
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long arg;
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sim_event *event;
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} sim_watch_point;
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@ -1,3 +1,7 @@
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Tue May 27 14:12:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* igen.h: Stop options and code gen type bit masks overlaping.
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Fri May 23 12:01:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* gen-semantics.c (print_semantic_body): Incorrect test for
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144
sim/igen/igen.h
Normal file
144
sim/igen/igen.h
Normal file
@ -0,0 +1,144 @@
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/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* What does the instruction look like - bit ordering, size, widths or offesets */
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extern int hi_bit_nr;
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extern int insn_bit_size;
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extern int insn_specifying_widths;
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/* what should global names be prefixed with? */
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extern const char *global_name_prefix;
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extern const char *global_uname_prefix;
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/* generation options: */
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enum {
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generate_with_direct_access = 0x1,
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generate_with_icache = 0x2,
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generate_with_semantic_icache = 0x4,
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generate_with_insn_in_icache = 0x8,
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generate_with_semantic_returning_modified_nia_only = 0x010,
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generate_with_semantic_conditional_issue = 0x020,
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generate_with_idecode_slot_verification = 0x040,
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generate_with_semantic_delayed_branch = 0x080,
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generate_with_semantic_zero_r0 = 0x100
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};
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typedef enum {
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/* Transfer control to an instructions semantic code using the the
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standard call/return mechanism */
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generate_calls = 0x1000,
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/* Transfer control to an instructions semantic code using
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(computed) goto's instead of the more conventional call/return
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mechanism */
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generate_jumps = 0x2000,
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} igen_code;
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extern int code;
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extern int icache_size;
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/* Instruction expansion?
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Should the semantic code for each instruction, when the oportunity
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arrises, be expanded according to the variable opcode files that
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the instruction decode process renders constant */
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extern int generate_expanded_instructions;
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/* SMP?
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Should the generated code include SMP support (>0) and if so, for
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how many processors? */
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extern int generate_smp;
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/* Misc junk */
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/* Function header definitions */
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/* Cache functions: */
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extern int print_icache_function_formal
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(lf *file);
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extern int print_icache_function_actual
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(lf *file);
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extern int print_icache_function_type
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(lf *file);
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extern int print_semantic_function_formal
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(lf *file);
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extern int print_semantic_function_actual
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(lf *file);
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extern int print_semantic_function_type
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(lf *file);
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extern void print_my_defines
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(lf *file,
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insn_bits *expanded_bits,
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table_entry *file_entry);
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extern void print_itrace
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(lf *file,
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table_entry *file_entry,
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int idecode);
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|
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|
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typedef enum {
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function_name_prefix_semantics,
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function_name_prefix_idecode,
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function_name_prefix_itable,
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function_name_prefix_icache,
|
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function_name_prefix_none
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} lf_function_name_prefixes;
|
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|
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extern int print_function_name
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(lf *file,
|
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const char *basename,
|
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insn_bits *expanded_bits,
|
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lf_function_name_prefixes prefix);
|
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@ -1,3 +1,13 @@
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Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
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* interp.c (CoProcPresent): Add UNUSED attribute - not used by all
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mips architectures.
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|
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Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
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|
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* interp.c (sim_do_command): Check for common commands if a
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simulator specific command fails.
|
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|
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Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
|
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|
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* interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
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@ -1475,40 +1475,46 @@ sim_do_command (sd,cmd)
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/* NOTE: Accessed from the GDB "sim" commmand: */
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for (cptr = sim_commands; cptr && cptr->name; cptr++)
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if (strncmp(cmd,cptr->name,strlen(cptr->name)) == 0) {
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cmd += strlen(cptr->name);
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switch (cptr->id) {
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case e_help: /* no arguments */
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{ /* no arguments */
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struct t_sim_command *lptr;
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callback->printf_filtered(callback,"List of MIPS simulator commands:\n");
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for (lptr = sim_commands; lptr->name; lptr++)
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callback->printf_filtered(callback,"%s %s\n",lptr->name,lptr->help);
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}
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if (strncmp (cmd, cptr->name, strlen(cptr->name)) == 0)
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{
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cmd += strlen(cptr->name);
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switch (cptr->id) {
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case e_help: /* no arguments */
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{ /* no arguments */
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struct t_sim_command *lptr;
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callback->printf_filtered(callback,"List of MIPS simulator commands:\n");
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for (lptr = sim_commands; lptr->name; lptr++)
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callback->printf_filtered(callback,"%s %s\n",lptr->name,lptr->help);
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sim_args_command (sd, "help");
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}
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break;
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case e_setmemsize: /* memory size argument */
|
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{
|
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unsigned int newsize = (unsigned int)getnum(cmd);
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sim_size(newsize);
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}
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case e_setmemsize: /* memory size argument */
|
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{
|
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unsigned int newsize = (unsigned int)getnum(cmd);
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sim_size(newsize);
|
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}
|
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break;
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case e_reset: /* no arguments */
|
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ColdReset();
|
||||
/* NOTE: See the comments in sim_open() relating to device
|
||||
initialisation. */
|
||||
break;
|
||||
case e_reset: /* no arguments */
|
||||
ColdReset();
|
||||
/* NOTE: See the comments in sim_open() relating to device
|
||||
initialisation. */
|
||||
break;
|
||||
|
||||
default:
|
||||
callback->printf_filtered(callback,"FATAL: Matched \"%s\", but failed to match command id %d.\n",cmd,cptr->id);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
default:
|
||||
callback->printf_filtered(callback,"FATAL: Matched \"%s\", but failed to match command id %d.\n",cmd,cptr->id);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (!(cptr->name))
|
||||
callback->printf_filtered(callback,"Error: \"%s\" is not a valid MIPS simulator command.\n",cmd);
|
||||
{
|
||||
/* try for a common command when the sim specific lookup fails */
|
||||
if (sim_args_command (sd, cmd) != SIM_RC_OK)
|
||||
callback->printf_filtered(callback,"Error: \"%s\" is not a valid MIPS simulator command.\n",cmd);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
@ -3887,7 +3893,7 @@ Convert(rm,op,from,to)
|
||||
|
||||
/*-- co-processor support routines ------------------------------------------*/
|
||||
|
||||
static int
|
||||
static int UNUSED
|
||||
CoProcPresent(coproc_number)
|
||||
unsigned int coproc_number;
|
||||
{
|
||||
|
||||
@ -1,3 +1,8 @@
|
||||
Tue May 27 13:22:13 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer.
|
||||
(sim_write): Ditto for write.
|
||||
|
||||
Tue May 20 09:33:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* sim-calls.c (sim_load): Set STATE_LOADED_P.
|
||||
|
||||
@ -148,7 +148,7 @@ sim_kill (SIM_DESC sd)
|
||||
int
|
||||
sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
|
||||
{
|
||||
return sim_core_read_buffer (sd, sim_core_write_map,
|
||||
return sim_core_read_buffer (sd, NULL, sim_core_write_map,
|
||||
buf, mem, length);
|
||||
}
|
||||
|
||||
@ -156,7 +156,7 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
|
||||
int
|
||||
sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
|
||||
{
|
||||
return sim_core_write_buffer (sd, sim_core_write_map,
|
||||
return sim_core_write_buffer (sd, NULL, sim_core_write_map,
|
||||
buf, mem, length);
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user