Commit Graph

2192 Commits

Author SHA1 Message Date
John R. Moore
962b3eada2 Removed a section of code that didn't do anything, but left values in
memory. This was labeled as a hack to set r0/r1 with argc/argv.
2001-08-02 00:50:38 +00:00
Ben Elliston
f18ee7ef71 2001-07-31 Ben Elliston <bje@redhat.com>
* lib/sim-defs.exp (run_sim_test): Include a description such as
	"assembling" or "linking" that identifies the phase a test fails
	in, for easier analysis of failures.
2001-07-31 04:59:59 +00:00
Stephane Carrez
eefde3513e * dv-m68hc11eepr.c (m68hc11eepr_info): Fix print of current write
address.
	(m68hc11eepr_port_event): Fix detach/attach logic.
2001-07-28 19:19:05 +00:00
Stephane Carrez
00d0c012ef * Makefile.in (SIM_OBJS): Remove sim-resume.o
* interp.c (sim_resume): New function from sim-resume.c, install
	the stepping event after having processed the pending ticks.
	(has_stepped): Likewise.
	(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
2001-07-22 12:33:58 +00:00
Andrew Cagney
bf1bef8f1c Regenerate using autoconf 2.13. 2001-07-18 06:20:29 +00:00
Daniel Jacobowitz
54cfd411af Makefile.in: Add dependencies on $(CPU_H). 2001-07-16 18:36:37 +00:00
Andrew Cagney
b51c76031a * Makefile.in (gencode): Provide explicit path to gencode.c. 2001-07-10 22:46:59 +00:00
Ben Elliston
e3e473dacc 2001-07-05 Ben Elliston <bje@redhat.com>
* Make-common.in (srccgen): Remove.
	(CGEN_CPU_DIR): Define.
	(CGEN_READ_SCM): Redefine without $(srccgen).
	(CGEN_ARCH_SCM): Ditto.
	(CGEN_CPU_SCM): Ditto.
	(CGEN_DECODE_SCM): Ditto.
	(CGEN_DESC_SCM): Ditto.

	* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
2001-07-05 13:51:26 +00:00
Stephane Carrez
81e09ed832 Improve HC11 simulator to support HC12 2001-05-20 15:40:27 +00:00
Stephane Carrez
11115521f6 * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check for
pending interrupts.
	* interrupts.c (interrupts_process): Keep track of the last number
	of masked insn cycles.
	(interrupts_initialize): Clear last number of masked insn cycles.
	(interrupts_info): Report them.
	(interrupts_update_pending): Compute clear and set masks of
	interrupts and clear the interrupt bits before setting them
	(due to SCI interrupt sharing).
	* interrupts.h (struct interrupts): New members last_mask_cycles
	and xirq_last_mask_cycles.
2001-05-20 15:36:29 +00:00
Nick Clifton
fb7a8ef0df Fix handling of XScale LDRD and STRD instructions with post indexed addressing modes. 2001-05-11 21:51:07 +00:00
Andrew Cagney
d448180670 Don't loose last block during a dma. 2001-05-10 17:48:10 +00:00
Nick Clifton
dac07255f9 Check Mode not Bank in order to determine rocesor mode. 2001-05-08 08:28:28 +00:00
Jim Blandy
ff88f59d5a *** empty log message *** 2001-05-07 06:10:25 +00:00
Jim Blandy
be5fcb106b * mn10300.igen: Doc fixes. 2001-05-07 04:52:00 +00:00
Alexandre Oliva
cc274e7c27 * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
Depend on targ-vals.h.
2001-04-26 19:23:16 +00:00
Frank Ch. Eigler
2836ee25d9 * thanks, nickc
2001-04-25  Frank Ch. Eigler  <fche@redhat.com>

	* sim-load.c (sim_load_file): Put it back [...]
2001-04-25 21:14:28 +00:00
Andrew Cagney
5b77812558 Revert call to bfd_cache_close(). 2001-04-21 22:50:55 +00:00
Frank Ch. Eigler
6ec9f4a9be * bug fix
2001-04-19  Frank Ch. Eigler  <fche@redhat.com>

	* sim-utils.c (sim_analyze_program): Call bfd_cache_close after
	we're finished with its immediate use.
	* sim-load.c (sim_load_file): Ditto.
2001-04-19 20:59:30 +00:00
Matthew Green
c3ae2f98d0 * XScale coprocessor support.
2001-04-18  matthew green  <mrg@redhat.com>

	* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
	(read_cp15_reg): Make non-static.
	(XScale_cp15_LDC): Update for write_cp15_reg() change.
	(XScale_cp15_MCR): Likewise.
	(XScale_cp15_write_reg): Likewise.
	(XScale_check_memacc): New function. Check for breakpoints being
	activated by memory accesses.  Does not support the Branch Target
	Buffer.
	(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
	(XScale_debug_moe): New function. Set the debug Method Of Entry,
	if configured.
	(write_cp14_reg): Reset count counter if requested.
	* armdefs.h (struct ARMul_State): New members `LastTime' and
	`CP14R0_CCD' used for the timer/counters.
	(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
	ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
	ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
	ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
	ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
	ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
	ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
	ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
	defines for XScale registers.
	(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
	(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
	(ARMul_Emulate32): Handle the clock counter and hardware instruction
	breakpoints.  Call XScale_set_fsr_far() for software breakpoints and
	software interrupts.
	(LoadMult): Call XScale_set_fsr_far() for data aborts.
	(LoadSMult): Likewise.
	(StoreMult): Likewise.
	(StoreSMult): Likewise.
	* armemu.h (write_cp15_reg): Update prototype.
	* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
	(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
	register 0.
	* armvirt.c (GetWord): Call XScale_check_memacc().
	(PutWord): Likewise.
2001-04-18 16:39:37 +00:00
J.T. Conklin
d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Jim Blandy
c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-04-12 14:53:20 +00:00
Nick Clifton
3cf84db9ef Do not enable alignment checking when loading unaligned thumb instructions. 2001-03-20 17:48:02 +00:00
Frank Ch. Eigler
764f1408a3 * mmap support for common simulators
2001-03-16  Frank Ch. Eigler  <fche@redhat.com>

	Add support for mmap-based memory regions.
	* sim-memopt.c (mmap_next_fd): New global.
	(sim_memory_init): Reinitialize it.
	(OPTION_MEMORY_MAPFILE, memory_option_handler): Support new
	"--memory-mapfile FILE" option.  Check for some errors.
	(do_memopt_add): Conditionally do mmap instead of malloc for
	backing store of simulated memory.  Check for more errors.
	(do_simopt_delete, sim_memory_uninstall): Corresponding cleanup.
	* sim-memopt.h (munmap_length): New member of _sim_memopt.
	* configure.in: Look for mmap/fstat related functions and headers.
	* config.in, configure: Regenerated.
2001-03-20 17:13:39 +00:00
Frank Ch. Eigler
35c209920b * tweak
2001-03-15  Frank Ch. Eigler  <fche@redhat.com>

	* sim-core.c (sim_core_map_attach): Correct overlap-related
	error messages.
2001-03-16 03:20:26 +00:00
Andrew Cagney
1e6cd1593b Link with libintl, needed by libopcodes. 2001-03-14 21:51:31 +00:00
Michael Meissner
f6bb7a3bb0 Remove reference to alloca-conf.h 2001-03-07 20:19:41 +00:00
Nick Clifton
4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Andrew Cagney
c663138840 Fixes for NetBSD 1.5. NetBSD has been renumbering/renaming its
SYS_* interfaces.
2001-03-05 16:22:45 +00:00
Dave Brolley
55552082e8 2001-03-05 Dave Brolley <brolley
arch.c: Regenerate.
        arch.h: Regenerate.
        cpu.c: Regenerate.
        cpu.h: Regenerate.
        cpuall.h: Regenerate.
        cpux.c: Regenerate.
        cpux.h: Regenerate.
        decode.c: Regenerate.
        decode.h: Regenerate.
        decodex.c: Regenerate.
        decodex.h: Regenerate.
        model.c: Regenerate.
        modelx.c: Regenerate.
        sem-switch.c: Regenerate.
        sem.c: Regenerate.
        semx-switch.c: Regenerate.
2001-03-05 16:05:38 +00:00
Dave Brolley
52fa932eab 2001-03-05 Dave Brolley <brolley@
* arch.c: Regenerate.
        * arch.h: Regenerate.
        * cpu.c: Regenerate.
        * cpu.h: Regenerate.
        * cpuall.h: Regenerate.
        * decode.c: Regenerate.
        * decode.h: Regenerate.
        * model.c: Regenerate.
        * sem-switch.c: Regenerate.
        * sem.c: Regenerate.
2001-03-05 16:00:17 +00:00
Nick Clifton
917bca4f21 Add support for disabling alignment checks when performing GDB interface
calls or SWI emulaiton routines.  (Alignment checking code has not yet been
contributed).
2001-02-28 01:04:24 +00:00
Ben Elliston
fb891446b7 2001-02-23 Ben Elliston <bje@redhat.com>
* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
	already defined elsewhere.
2001-02-24 02:43:11 +00:00
Ben Elliston
01816cd804 2001-02-22 Ben Elliston <bje@redhat.com>
* sim-trace.h (TRACE_VPU_IDX): Add.
	(TRACE_vpu): Define.
	(WITH_TRACE_VPU_P): Likewise.
	(TRACE_VPU_P): Likewise.
	* sim-trace.c (OPTION_TRACE_VPU): Define.
	(trace_options): Add --trace-vpu.
	(trace_option_handler): Handle OPTION_TRACE_VPU.
	(trace_option_handler): Include VPU tracing in --trace-semantics.
	(trace_idx_to_str): Handle TRACE_VPU_IDX.
2001-02-22 20:47:49 +00:00
Ben Elliston
44a9331cdf 2001-02-21 Ben Elliston <bje@redhat.com>
* sim-trace.h (TRACE_BRANCH_INPUT1): New macro.
	(TRACE_BRANCH_INPUT2): Likewise.
2001-02-21 21:35:41 +00:00
Ben Elliston
8030f85769 2001-02-19 Ben Elliston <bje@redhat.com>
* sim-main.h (sim_monitor): Return an int.
	* interp.c (sim_monitor): Add return values.
	(signal_exception): Handle error conditions from sim_monitor.
2001-02-19 21:57:03 +00:00
Nick Clifton
2ef048fc9f Remove Prefetch abort for breakpoints. Instead set the state to RESUME. 2001-02-16 22:04:22 +00:00
Ben Elliston
9afc4bbfbb 2001-02-16 Ben Elliston <bje@redhat.com>
* MAINTAINERS: Add myself for common portions.
2001-02-15 23:03:41 +00:00
Ben Elliston
c43ad8eb1e * profiling bug fixes.
2001-02-09  Ben Elliston  <bje@redhat.com>

	* (profile_print_pc): Write header out in target byte order.

2001-02-09  Ben Elliston  <bje@redhat.com>

	* sim-profile.c (profile_pc_init): Correct bug in loop logic when
	adjusting the pc shift value.
2001-02-15 21:14:40 +00:00
Nick Clifton
44e23e575b Add code to preserve processor mode when a prefetch
abort is signalled after processing a breakpoint.
2001-02-15 02:38:15 +00:00
Nick Clifton
5f7d0a33db Reset processor into ARM mode for any machine type except the early ARMs. 2001-02-14 22:21:20 +00:00
Nick Clifton
94ab9d7b9e remove spurious whitespace 2001-02-14 03:55:57 +00:00
Nick Clifton
1e5d4e465c Prevent Aborts from happening whilst emulating a SWI 2001-02-14 03:50:46 +00:00
Nick Clifton
179ae6ea64 Fix definition of NEGBRANCH 2001-02-12 23:29:49 +00:00
Chris Demetriou
56b48a7a9b 2001-02-08 Ben Elliston <bje@redhat.com>
* sim-main.c (load_memory): Pass cia to sim_core_read* functions.
        (store_memory): Likewise, pass cia to sim_core_write*.
2001-02-08 05:22:04 +00:00
DJ Delorie
ddcd33c11d * i960-desc.c: Update all the A macro definitions to the new
stdc-sensitive versions that cgen would have used.
2001-02-07 01:16:05 +00:00
Nick Clifton
fae0bf59e6 Add parentheses ready for future conbtribution 2001-02-01 20:56:35 +00:00
Nick Clifton
dda308f5fd Update base address register after restoring register bank. 2001-02-01 20:39:51 +00:00
Jonathan Larmour
42acc51e30 * Makefile.in (gencode): Link with libopcodes in build tree rather
than building source files from there.
2001-02-01 06:56:29 +00:00
Nick Clifton
88694af3f9 Detect installation of SWI vector by running program as well as loading program. 2001-02-01 00:14:40 +00:00