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2863 Commits

Author SHA1 Message Date
M R Swami Reddy
84234f6dc5 Updated the MAINTAINERS file: Add myself as maintainer of cr16 port. 2008-04-08 07:20:21 +00:00
M R Swami Reddy
efc111662f Add myself as maintainer of cr16 port. 2008-04-08 07:15:39 +00:00
Nick Hudson
29035cbe96 * configure.ac: Pass ../../intl to ZW_GNU_GETTEXT_SISTER_DIR. 
* configure: Regenerate.
 2008-03-14 20:26:49 +00:00
DJ Delorie
98e460c30d * simops.c (OP_1C007E0): Compensate for 64 bit hosts. 
(OP_18007E0): Likewise.
(OP_2C007E0): Likewise.
(OP_28007E0): Likewise.
* v850.igen (divh): Likewise.
 2008-02-06 04:41:26 +00:00
DJ Delorie
c5fbc25baf Index: ChangeLog 
* configure.ac (v850): V850 now has a testsuite.
	* configure (v850): Likewise.

Index: testsuite/ChangeLog

	* sim/v850/: New directory.
	* sim/v850/allinsns.exp: New.
	* sim/v850/bsh.cgs: New.
	* sim/v850/div.cgs: New.
	* sim/v850/divh.cgs: New.
	* sim/v850/divh_3.cgs: New.
	* sim/v850/divhu.cgs: New.
	* sim/v850/divu.cgs: New.
	* sim/v850/sar.cgs: New.
	* sim/v850/satadd.cgs: New.
	* sim/v850/satsub.cgs: New.
	* sim/v850/satsubi.cgs: New.
	* sim/v850/satsubr.cgs: New.
	* sim/v850/shl.cgs: New.
	* sim/v850/shr.cgs: New.
	* sim/v850/testutils.cgs: New.
	* sim/v850/testutils.inc: New.

Index: v850/ChangeLog

	* simops.c (OP_C0): Correct saturation logic.
	(OP_220): Likewise.
	(OP_A0): Likewise.
	(OP_660): Likewise.
	(OP_80): Likewise.

	* simops.c (OP_2A0): If the shift count is zero, clear the
	carry.
	(OP_A007E0): Likewise.
	(OP_2C0): Likewise.
	(OP_C007E0): Likewise.
	(OP_280): Likewise.
	(OP_8007E0): Likewise.

	* simops.c (OP_2C207E0): Correct PSW flags for special divu
	conditions.
	(OP_2C007E0): Likewise, for div.
	(OP_28207E0): Likewise, for divhu.
	(OP_28007E0): Likewise, for divh.  Also, sign-extend the correct
	operand.
	* v850.igen (divh): Likewise, for 2-op divh.

	* v850.igen (bsh): Fix carry logic.
 2008-02-06 00:40:05 +00:00
Andrew Stubbs
f3876f6909 2008-02-04 Antony King <antony.king@st.com> 
* interp.c (macl): Fix non-portable implementation.
 2008-02-04 17:26:07 +00:00
Daniel Jacobowitz
9b254dd1ce Updated copyright notices for most files. 2008-01-01 22:53:26 +00:00
DJ Delorie
beb7a8835e * frv/frv.c (frvbf_cut): Only look at the six LSBs of 
cut_point.
 2007-12-19 20:55:03 +00:00
Hans-Peter Nilsson
bf31154ff3 * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Tweak 
stack-pointer match pattern for 4K host environment.
 2007-11-08 22:12:27 +00:00
Richard Sandiford
60dc88db8b sim/mips/ 
* mips.igen (check_fmt_p): Provide a separate mips32r2 definition
	that unconditionally allows fmt_ps.
	(ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
	(FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
	(PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
	filter from 64,f to 32,f.
	(PREFX): Change filter from 64 to 32.
	(LDXC1, LUXC1): Provide separate mips32r2 implementations
	that use do_load_double instead of do_load.  Make both LUXC1
	versions unpredictable if SizeFGR () != 64.
	(SDXC1, SUXC1): Extend to mips32r2, using do_store_double
	instead of do_store.  Remove unused variable.  Make both SUXC1
	versions unpredictable if SizeFGR () != 64.
 2007-10-22 20:02:25 +00:00
Hans-Peter Nilsson
9538c15c36 * sim/cris/asm/testutils.inc (test_move_cc): Add missing call to 
test_cc.
	* sim/cris/asm/asr.ms: Correct expected condition code flags.
	* sim/cris/asm/boundr.ms: Ditto.
	* sim/cris/asm/dstep.ms: Ditto.
	* sim/cris/asm/lsr.ms: Ditto.
	* sim/cris/asm/movecr.ms: Ditto.
	* sim/cris/asm/mover.ms: Ditto.
	* sim/cris/asm/neg.ms: Ditto.  Use test_cc, not test_move_cc.
	* sim/cris/asm/op3.ms: Check the condition code flags after the insn
	under test.
	* sim/cris/asm/movecrt10.ms: Update expected number of simulated
	cycles.
	* sim/cris/asm/movecrt32.ms: Ditto.
	* sim/cris/asm/jsr.ms: Don't use local label 8.
	* sim/cris/asm/nonvcv32.ms: New test.
 2007-10-22 16:49:25 +00:00
Hans-Peter Nilsson
c9b3544ace * cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c, 
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
	cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
	cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
	cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
	cris/semcrisv32f-switch.c: Regenerate.
 2007-10-22 16:06:38 +00:00
Daniel Jacobowitz
7cc46491b1 * NEWS: Document target described register support for PowerPC. 
* ppc-tdep.h: Remove ppc_spr constants.
	(struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and
	ppc_builtin_type_vec128 members.
	(PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM)
	(PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM)
	(PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM)
	(PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM)
	(PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants.
	* rs6000-tdep.c: Include preparsed descriptions.
	(init_sim_regno_table): Do not iterate over pseudo registers.
	Look up segment registers by name.  Use sim_spr_register_name
	for SPRs.
	(rs6000_register_sim_regno): Call init_sim_regno_table here.
	(rs6000_builtin_type_vec128): Delete.
	(rs6000_register_name): Only handle SPE pseudo registers and upper
	halves.  Call tdesc_register_name for everything else.
	(rs6000_register_type): Delete.  Replace with...
	(rs6000_pseudo_register_type): ...this new function.  Only handle
	SPE pseudo registers.
	(rs6000_register_reggroup_p): Delete.  Replace with...
	(rs6000_pseudo_register_reggroup_p): ...this new function.  Only
	handle SPE pseudo registers.
	(rs6000_convert_register_p): Use ppc_fp0_regnum instead of
	"struct reg".
	(rs6000_register_to_value, rs6000_value_to_register): Remove check
	of reg->fpr.
	(e500_register_reggroup_p): Delete.
	(STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64)
	(COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS)
	(PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS)
	(PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros.
	(registers_powerpc, registers_403, registers_403GC, registers_505)
	(registers_860, registers_601, registers_602, registers_603)
	(registers_604, registers_750, registers_7400, registers_e500): Delete
	variables.
	(struct variant): Delete nregs, npregs, num_tot_regs, and regs.  Add
	tdesc.
	(tot_num_registers, num_registers, num_pseudo_registers): Delete.
	(variants): Delete outdated comment.  Use standard target descriptions
	instead of "struct reg" arrays.
	(init_variants): Delete.
	(rs6000_gdbarch_init): Do not guess word size from the BFD
	architecture if we have a target description.  Select a variant
	before creating a new architecture.  Use the variant's target
	description if the target did not define a register layout.
	Validate target-supplied registers.  Reject mismatches.  Use
	fixed register numbers and new constants instead of magic
	numbers.  Call set_gdbarch_ps_regnum.  Call tdesc_use_registers.
	(_initialize_rs6000_tdep): Initialize the preparsed target
	descriptions.
	* target-descriptions.c (tdesc_predefined_types): Add int128 and
	uint128.
	(tdesc_find_register_early): New function.
	(tdesc_numbered_register): Use it.
	(tdesc_register_size): New function.
	(tdesc_use_registers): Take a target_desc argument.  Do not use
	gdbarch_target_desc.
	* target-descriptions.h (tdesc_use_registers): Update prototype
	and comment.
	(tdesc_register_size): New prototype.
	* Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c)
	(powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c)
	(powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c)
	(powerpc_860_c, powerpc_e500_c, rs6000_c): New macros.
	(rs6000-tdep.o): Update.
	* arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers.
	* m68k-tdep.c (m68k_gdbarch_init): Likewise.
	* mips-tdep.c (mips_gdbarch_init): Likewise.

	* gdb.texinfo (Predefined Target Types): Add int128
	and uint128.
	(Standard Target Features): Add PowerPC features.

	* gdb.xml/tdesc-regs.exp: Add PowerPC support.

	* sim-ppc.h (sim_spr_register_name): New prototype.

	* gdb-sim.c (regnum2spr): Rename to...
	(sim_spr_register_name): ... this.  Make global.
 2007-10-15 19:45:31 +00:00
Daniel Jacobowitz
eb639c5004 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> 
* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions.
	* syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* sim/cris/c/freopen2.c: Added testcase.
 2007-10-11 18:44:07 +00:00
Daniel Jacobowitz
b981d70963 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> 
* callback.c (cb_is_stdin): Add.
	* syscall.c (cb_syscall): Test for stdin, not just fd 0.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* callback.h (cb_is_stdin): Add prototype.
 2007-10-11 18:40:29 +00:00
Denis Pilat
4d43927194 2007-09-24 Andrew Stubbs <andrew.stubbs@st.com> 
* gencode.c (tab): Add RAISE_EXCEPTION_IF_IN_DELAY_SLOT to the
	definition of PC relative 'mov.l'/'mov.w' and also 'mova'.
 2007-10-08 11:51:31 +00:00
Richard Sandiford
599ca73e2c sim/mips/ 
* mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
	(sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
	shifts for that case.
 2007-10-07 09:04:43 +00:00
Nick Clifton
2525df0347 * interp.c (options enum): Add OPTION_INFO_MEMORY. 
(display_mem_info): New static variable.
  (mips_option_handler): Handle OPTION_INFO_MEMORY.
  (mips_options): Add info-memory and memory-info.
  (sim_open): After processing the command line and board specification, check display_mem_info.
  If it is set then call the real handler for the --memory-info command line switch.
 2007-09-04 14:33:18 +00:00
Jerome Guitton
0ad36c846a * sim/ppc/emul_bugapi.c (emul_bugapi_create): quote the file 
name property before parsing it.
 2007-09-04 09:45:06 +00:00
Joel Brobecker
d5ce5596bf * compare_igen_models: Change license to GPL version 3. 2007-08-28 16:08:00 +00:00
Joel Brobecker
35ee6e1e05 * configure.ac: Change license of multi-run.c to GPL version 3. 
* configure: Regenerate.
 2007-08-28 00:10:54 +00:00
Joel Brobecker
dfee3164ef * lf.c (lf_print__gnu_copyleft): Change license to GPL version 3. 2007-08-28 00:09:36 +00:00
Joel Brobecker
db95e31282 * testutils.inc: Change license to GPL version 3. 
* utils-dsp.inc: Change license to GPL version 3.
        * utils-fpu.inc: Change license to GPL version 3.
        * utils-mdmx.inc: Change license to GPL version 3.
 2007-08-28 00:01:52 +00:00
Joel Brobecker
4744ac1bb0 Switch the license of all files explicitly copyright the FSF 
to GPLv3.
 2007-08-24 14:30:15 +00:00
Nick Clifton
f40f1a01c5 * sim-memopt.c (memory_options): Mention that the memory-size switch accepts suffixes. 
(parse_size): Handle a suffix on the size value.
* sim-options.c (standard_options): Mention that the mem-size switch accepts suffixes.
  (standard_option_handler): Handle a suffix on the size value.
 2007-08-10 14:26:33 +00:00
Daniel Jacobowitz
917c78f962 2007-07-03 Yoshinori Sato <ysato@users.sourceforge.jp> 
* compile.c (sim_resume): Fix the last byte of ARGV for
	SYS_CMDLINE.
 2007-07-03 17:19:38 +00:00
Richard Sandiford
d5fb0879a5 sim/mips/ 
* configure.ac, configure: Revert last patch.
 2007-06-28 06:00:52 +00:00
Richard Sandiford
2a2ce21ba2 sim/mips/ 
* configure.ac (sim_mipsisa3264_configs): New variable.
	(mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
	every configuration support all four targets, using the triplet to
	determine the default.
	* configure: Regenerate.
 2007-06-26 12:16:53 +00:00
Daniel Jacobowitz
0a7692b27d Changelog typo fix. 2007-06-25 12:24:52 +00:00
Richard Sandiford
efdcccc981 sim/mips/ 
* Makefile.in (m16_run.o): New rule.
 2007-06-25 11:21:53 +00:00
Thiemo Seufer
f532a3561c * mips3264r2.igen (DSHD): Fix compile warning. 2007-05-15 12:20:32 +00:00
Thiemo Seufer
bfe9c90b9a * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, 
CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
	NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
	RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
	for mips32r2.
 2007-05-14 16:24:25 +00:00
Daniel Jacobowitz
9453113a8d Add "make pdf" and "make install-pdf", from Brooks Moses 
<brooks.moses@codesourcery.com>.
 2007-03-27 18:09:36 +00:00
Daniel Jacobowitz
6a1754a359 2007-03-02 Andrew Stubbs <andrew.stubbs@st.com> 
* gencode.c (tab): Correct pre-decrement instructions when m == n.
 2007-03-02 12:15:01 +00:00
Thiemo Seufer
53f4826b00 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32 
and mips64.
 2007-03-01 14:29:26 +00:00
Mark Mitchell
e1c9b6f16a * armos.c (SWIflen): Do not treate file descriptor zero as 
special.
 2007-02-27 18:51:57 +00:00
Thiemo Seufer
8bf3ddc83e * dsp.igen: Update copyright notice. 
* dsp2.igen: Fix copyright notice.
 2007-02-20 13:53:48 +00:00
Thiemo Seufer
8b082fb134 [ gas/ChangeLog ] 
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
	ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
	(macro_build): Add case '2'.
	(macro): Expand M_BALIGN to nop, packrl.ph or balign.
	(validate_mips_insn): Add support for balign instruction.
	(mips_ip): Handle DSP R2 instructions. Support balign instruction.
	(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
	md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
	command line options.
	(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
	(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
	* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
	.set dspr2, .set nodspr2.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
	DSP R2.
	* gas/mips/mips.exp: Run new test.

	[ include/opcode/Changelog ]
	* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
	(INSN_DSPR2): Add flag for DSP R2 instructions.
	(M_BALIGN): New macro.

	[ opcodes/ChangeLog ]
	* mips-dis.c (mips_arch_choices): Add DSP R2 support.
	(print_insn_args): Add support for balign instruction.
	* mips-opc.c (D33): New shortcut for DSP R2 instructions.
	(mips_builtin_opcodes): Add DSP R2 instructions.

	[ sim/mips/ChangeLog ]
	* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
	* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
	Add dsp2 to sim_igen_machine.
	* configure: Regenerate.
	* dsp.igen (do_ph_op): Add MUL support when op = 2.
	(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
	(mulq_rs.ph): Use do_ph_mulq.
	(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
	* mips.igen: Add dsp2 model and include dsp2.igen.
	(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
	for *mips32r2, *mips64r2, *dsp.
	(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
	for *mips32r2, *mips64r2, *dsp2.
	* dsp2.igen: New file for MIPS DSP REV 2 ASE.

	[ sim/testsuite/sim/mips/ChangeLog ]
	* basic.exp: Run the dsp2 test.
	* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
	* mips32-dsp2.s: New test.
 2007-02-20 13:28:56 +00:00
Daniel Jacobowitz
cb5c8c3989 gdb/ 
* MAINTAINERS: Disable -Werror for cris simulator.  Build
	sparc64-solaris2.10 instead of the broken sparc-elf.
	* solib-frv.c: Include "solib.h".
	* Makefile.in (solib-frv.o): Update.
	* mt-tdep.c (mt_gdbarch_init): Correct typo in floatformats patch.
	* xtensa-tdep.c (xtensa_regset_from_core_section): Cast size_t to int.
	(xtensa_frame_this_id, xtensa_frame_prev_register)
	(xtensa_push_dummy_call): Use %p.
sim/v850/
	* Makefile.in (interp.o): Uncomment and update.
 2007-02-20 12:45:06 +00:00
Hans-Peter Nilsson
6a4669ea53 * cris/traps.c (dump_statistics): Change format for cycle numbers 
to %llu and cast parameters to unsigned long long.
 2007-02-20 00:14:11 +00:00
Thiemo Seufer
b100487538 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2 
jumps with hazard barrier.
 2007-02-19 17:53:29 +00:00
Thiemo Seufer
f8df4c7704 * interp.c (sim_monitor): Flush stdout and stderr file descriptors 
after each call to sim_io_write.
 2007-02-19 17:46:53 +00:00
Thiemo Seufer
07802d9880 (ColdReset): Set CP0 Config0 to reflect the address size supported 
by this simulator.
	(decode_coproc): Recognise additional CP0 Config registers
	correctly.
 2007-02-19 17:34:18 +00:00
Thiemo Seufer
14fb6c5a50 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for 
uninterpreted formats. If fmt is one of the uninterpreted types
	don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
	fmt_word, and fmt_uninterpreted_64 like fmt_long.
	(store_fpr): When writing an invalid odd register, set the
	matching even register to fmt_unknown, not the following register.
	* interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
	the the memory window at offset 0 set by --memory-size command
	line option.
	(sim_store_register): Handle storing 4 bytes to an 8 byte floating
	point register.
	(sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
	register.
	(sim_monitor): When returning the memory size to the MIPS
	application, use the value in STATE_MEM_SIZE, not an arbitrary
	hardcoded value.
	(cop_lw): Don' mess around with FPR_STATE, just pass
	fmt_uninterpreted_32 to StoreFPR.
	(cop_sw): Similarly.
	(cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
	(cop_sd): Similarly.
	* mips.igen (not_word_value): Single version for mips32, mips64
	and mips16.
 2007-02-19 17:31:08 +00:00
Thiemo Seufer
c88471452a * interp.c (MEM_SIZE): Increase default memory size from 2 to 8 
MBytes.
 2007-02-19 12:27:02 +00:00
Thiemo Seufer
4b5d35eef6 * configure.ac (mips*-sde-elf*): Move in front of generic machine 
configuration.
	* configure: Regenerate.
 2007-02-17 16:36:32 +00:00
Thiemo Seufer
3669427c8e 2007-02-17 Thiemo Seufer <ths@mips.com> 
[ sim/mips/ChangeLog ]
	* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
	Add mdmx to sim_igen_machine.
	(mipsisa64*-*-*): Likewise. Remove dsp.
	(mipsisa32*-*-*): Remove dsp.
	* configure: Regenerate.

	[ sim/testsuite/sim/mips/ChangeLog ]
	* basic.exp: Add case for mips*-sde-elf*.
	(mdmxmodels): Run mdmx tests only on mdmx capable configurations.
 2007-02-17 01:26:48 +00:00
Thiemo Seufer
792fe9c928 * Makefile.in (FLAGS_TO_PASS, TARGET_FLAGS_TO_PASS): Add RUNTEST. 2007-02-16 18:13:53 +00:00
Nick Clifton
1306df90a9 * armemu.c (handle_v6_insn): Fix typo in sign extension test of the sext and sxtah instructions. 2007-02-15 10:32:06 +00:00
Thiemo Seufer
109ad08573 * configure.ac: Add mips*-sde-elf* target. 
* configure: Regenerate.
 2007-02-13 20:20:54 +00:00