Commit Graph

2277 Commits

Author SHA1 Message Date
Andrew Cagney
e101598283 Revert previous change. 2002-04-20 16:39:46 +00:00
Alexandre Oliva
b882a66bfc * interp.c (sim_open): Disable chunk of code that wrote code in
vector table entries.
2002-04-18 19:47:14 +00:00
Elena Zannoni
d395ade3db 2002-04-15 Elena Zannoni <ezannoni@redhat.com>
* sim_calls.c (sim_fetch_register, sim_store_register): Return -1 for
        AltiVec registers as a temporary stopgap.
2002-04-15 16:32:55 +00:00
David O'Brien
23c7880c01 2002-03-24 David O'Brien <obrien@FreeBSD.org>
* ppc/hw_disk.c: Export a disk device property.

This is needed by the FreeBSD/powerpc porting effort.
2002-03-25 04:39:20 +00:00
Andrew Cagney
e7b564aa85 * gen.c (format_name_cmp): New function.
(insn_list_insert): Use the instruction field name as an
additional key.  Different field names indicate different
semantics.
2002-03-24 00:43:28 +00:00
Andrew Cagney
ec80ed8088 From 2001-12-09 Julien Ducourthial <jducourt@noos.fr>:
* ppc-instructions (lswx): Do the register control with the
register count.  Initialize the right register in the loop.
(mtfsfi) : Correct prefix for the instruction.
2002-03-23 21:18:31 +00:00
Chris Demetriou
c429b7ddd8 2002-03-19 Chris Demetriou <cgd@broadcom.com>
* cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
        (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
        unused definitions.
2002-03-20 07:24:20 +00:00
Chris Demetriou
37d146fa1d 2002-03-19 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Fix many formatting issues.
2002-03-20 07:10:37 +00:00
Chris Demetriou
07892c0b5a 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
* cp1.c (fpu_format_name): New function to replace...
        (DOFMT): This.  Delete, and update all callers.
        (fpu_rounding_mode_name): New function to replace...
        (RMMODE): This.  Delete, and update all callers.
2002-03-20 06:42:05 +00:00
Chris Demetriou
487f79b73c 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
* interp.c: Move FPU support routines from here to...
        * cp1.c: Here.  New file.
        * Makefile.in (SIM_OBJS): Add cp1.o to object list.
        (cp1.o): New target.
2002-03-20 01:35:13 +00:00
Anthony Green
ae60d3ddec Increase default memory size to 8MB. 2002-03-18 21:43:15 +00:00
Chris Demetriou
1e799e28c1 2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
        * mips.igen (mips32, mips64): New models, add to all instructions
        and functions as appropriate.
        (loadstore_ea, check_u64): New variant for model mips64.
        (check_fmt_p): New variant for models mipsV and mips64, remove
        mipsV model marking fro other variant.
        (SLL) Rename to...
        (SLLa) this.
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
        for mips32 and mips64.
        (DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
Chris Demetriou
82f728dbb8 2002-03-07 Chris Demetriou <cgd@broadcom.com>
* mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
        immediate or code as a hex value with the "%#lx" format.
        (ANDI): Likewise, and fix printed instruction name.
2002-03-08 00:37:14 +00:00
Chris Demetriou
6225b4b7fc 2002-03-07 Chris Demetriou <cgd@broadcom.com>
* igen.c (print_itrace_format): Add support for a new "%#lx" format.
2002-03-08 00:36:32 +00:00
Stephane Carrez
86596dc8e0 * m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case.
(cpu_move16): Likewise.
	(sim_memory_error): Use sim_io_printf.
	(cpu_option_handler): Fix compilation warning.
	* interp.c (sim_hw_configure): Fix compilation warning;
	remove m68hc12sio@2 device.
	(sim_open): Likewise.
	* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2
	flags when reset.
	(cycle_to_string): Improve convertion of cpu cycle number.
	(m68hc11tim_info): Print info about PACNT.
	(m68hc11tim_io_write_buffer): Fix clearing of TFLG2; handle
	TCTL1 and TCTL2 registers.
	* dv-m68hc11.c (m68hc11_info): Print 6811 current running mode.
2002-03-07 19:17:04 +00:00
Stephane Carrez
827ec39a5a * interp.c (sim_hw_configure): Save the HW cpu pointer in the
cpu struct.
	(sim_hw_configure): Connect the capture input/output events.
	* sim-main.h (_sim_cpu): New member hw_cpu.
	(m68hc11cpu_set_oscillator): Declare.
	(m68hc11cpu_clear_oscillator): Declare.
	(m68hc11cpu_set_port): Declare.
	* dv-m68hc11.c (m68hc11_options): New for oscillator commands.
	(m68hc11cpu_ports): New input ports and output ports to reflect
	the HC11 IOs.
	(m68hc11_delete): Cleanup any running oscillator.
	(attach_m68hc11_regs): Create the input oscillators.
	(make_oscillator): New function.
	(find_oscillator): New function.
	(oscillator_handler): New function.
	(reset_oscillators): New function.
	(m68hc11cpu_port_event): Handle the new input ports.
	(m68hc11cpu_set_oscillator): New function.
	(m68hc11cpu_clear_oscillator): New function.
	(get_frequency): New function.
	(m68hc11_option_handler): New function.
	(m68hc11cpu_set_port): New function.
	(m68hc11cpu_io_write): Post the port output events.
	* dv-m68hc11spi.c (set_bit_port): Use m68hc11cpu_set_port to set
	the output port value.
	* dv-m68hc11tim.c (m68hc11tim_port_event): Handle CAPTURE event
	by latching the TCNT value in the register.
2002-03-07 19:12:44 +00:00
Stephane Carrez
5abb9efa08 * sim-main.h (cpu_frame, cpu_frame_list): Remove.
(cpu_frame_reg, cpu_print_frame): Remove.
	(cpu_m68hc11_push_uint8, cpu_m68hc11_pop_uint8): Cleanup.
	(cpu_m68hc11_push_uint16, cpu_m68hc11_pop_uint16): Likewise.
	(cpu_m68hc12_push_uint8, cpu_m68hc12_push_uint16): Likewise.
	(cpu_m68hc12_pop_uint8, cpu_m68hc12_pop_uint16): Likewise.
	* m68hc11_sim.c (cpu_find_frame): Remove.
	(cpu_create_frame_list): Remove.
	(cpu_remove_frame_list, cpu_create_frame, cpu_free_frame): Remove.
	(cpu_frame_reg, cpu_print_frame, cpu_update_frame): Remove.
	(cpu_call): Cleanup to remove #if HAVE_FRAME and calls to the above.
	(cpu_update_frame): Likewise.
	(cpu_return): Likewise.
	(cpu_reset): Likewise.
	(cpu_initialize): Likewise.
	* interp.c (sim_do_command): Remove call to cpu_print_frame.
2002-03-07 19:06:34 +00:00
Stephane Carrez
261289656f * interrupts.c (interrupts_reset): New function, setup interrupt
vector address according to cpu mode.
	(interrupts_initialize): Move reset portion to the above.
	(interrupt_names): New table to give a name to interrupts.
	(idefs): Handle pulse accumulator interrupts.
	(interrupts_info): Print the interrupt history.
	(interrupt_option_handler): New function.
	(interrupt_options): New table of options.
	(interrupts_update_pending): Keep track of when interrupts are
	raised and implement breakpoint-on-raise-interrupt.
	(interrupts_process): Keep track of when interrupts are taken
	and implement breakpoint-on-interrupt.
	* interrupts.h (struct interrupt_history): Define.
	(struct interrupt): Keep track of the interrupt history.
	(interrupts_reset): Declare.
	(interrupts_initialize): Update prototype.
	* m68hc11_sim.c (cpu_reset): Reset interrupts.
	(cpu_initialize): Cleanup.
2002-03-07 18:59:38 +00:00
Stephane Carrez
44befb9ff7 * MAINTAINERS: Record self as maintainer of m68hc11 simulator. 2002-03-06 20:15:53 +00:00
Chris Demetriou
b96e7ef1a0 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (UndefinedResult, Unpredictable): New macros
        which currently do nothing.
2002-03-06 06:46:29 +00:00
Chris Demetriou
d35d4f709f 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (status_UX, status_SX, status_KX, status_TS)
        (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
        (status_CU3): New definitions.

        * sim-main.h (ExceptionCause): Add new values for MIPS32
        and MIPS64: MDMX, MCheck, CacheErr.  Update comments
        for DebugBreakPoint and NMIReset to note their status in
        MIPS32 and MIPS64.
        (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
        (SignalExceptionCacheErr): New exception macros.
2002-03-06 06:21:17 +00:00
Chris Demetriou
3ad6f714f2 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fpu): Enable check for coprocessor 1 usability.
        * sim-main.h (COP_Usable): Define, but for now coprocessor 1
        is always enabled.
        (SignalExceptionCoProcessorUnusable): Take as argument the
        unusable coprocessor number.
2002-03-06 05:41:40 +00:00
Chris Demetriou
97a88e93be fix month on 4 of my recent entries (*sigh*) 2002-03-05 22:25:06 +00:00
Chris Demetriou
86b77b471b 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of all SignalException calls.
2002-03-05 22:24:24 +00:00
Chris Demetriou
3dea6720b3 2002-02-05 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (SIGNEXTEND): Remove.
2002-03-05 19:22:13 +00:00
Chris Demetriou
b5040d49af 2002-02-04 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Remove gencode comment from top of file, fix
        spelling in another comment.
2002-03-05 07:34:01 +00:00
Chris Demetriou
8612006bd7 2002-02-04 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fmt, check_fmt_p): New functions to check
        whether specific floating point formats are usable.
        (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
        (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
        Use the new functions.
        (do_c_cond_fmt): Remove format checks...
        (C.cond.fmta, C.cond.fmtb): And move them into all callers.
2002-03-05 03:14:56 +00:00
Chris Demetriou
9b17d183bf 2002-02-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of check_fpu calls.
2002-03-04 04:14:51 +00:00
Chris Demetriou
41774c9d7b 2002-03-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen (FLOOR.L.fmt): Store correct destination register.
2002-03-04 04:06:47 +00:00
Chris Demetriou
4a0bd8769a 2002-03-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Remove whitespace at end of lines.
2002-03-04 03:19:49 +00:00
Chris Demetriou
09297648e2 2002-03-02 Chris Demetriou <cgd@broadcom.com>
* mips.igen (loadstore_ea): New function to do effective
	address calculations.
	(do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
	do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
	CACHE): Use loadstore_ea to do effective address computations.
2002-03-03 07:36:42 +00:00
Chris Demetriou
043b7057fd 2002-03-02 Chris Demetriou <cgd@broadcom.com>
* interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
	* mips.igen (LL, CxC1, MxC1): Likewise.
2002-03-03 06:49:43 +00:00
Chris Demetriou
c1e8ada406 2002-03-02 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
        CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
        FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
        MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
        NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
        SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
        Don't split opcode fields by hand, use the opcode field values
        provided by igen.
2002-03-03 02:11:23 +00:00
Chris Demetriou
3e1dca16f2 2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_divu): Fix spacing.

        * mips.igen (do_dsllv): Move to be right before DSLLV,
        to match the rest of the do_<shift> functions.
2002-03-01 23:51:18 +00:00
Chris Demetriou
fff8d27d23 2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
        DSRL32, do_dsrlv): Trace inputs and results.
2002-03-01 23:40:51 +00:00
Frank Ch. Eigler
ce93e51a12 * vaporous abdication 2002-03-01 21:51:21 +00:00
Chris Demetriou
0d3e762b2f 2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (CACHE): Provide instruction-printing string.

        * interp.c (signal_exception): Comment tokens after #endif.
2002-03-01 19:55:42 +00:00
Chris Demetriou
eb5fcf9324 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
        (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
        NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
        ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
        CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
        C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
        SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
        LWC1, SWC1): Add "f" to filter, since these are FP instructions.
2002-03-01 07:53:46 +00:00
Chris Demetriou
bb22bd7d9e 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (DSRA32, DSRAV): Fix order of arguments in
        instruction-printing string.
        (LWU): Use '64' as the filter flag.
2002-03-01 07:34:57 +00:00
Chris Demetriou
91a177cf81 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (SDXC1): Fix instruction-printing string.
2002-03-01 06:40:28 +00:00
Chris Demetriou
387f484ade 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
        filter flags "32,f".
2002-03-01 06:34:21 +00:00
Chris Demetriou
3d81f39116 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): This is a 64-bit instruction, use '64'
        as the filter flag.
2002-02-28 07:07:56 +00:00
Chris Demetriou
af5107af97 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
        add a comma) so that it more closely match the MIPS ISA
        documentation opcode partitioning.
        (PREF): Put useful names on opcode fields, and include
        instruction-printing string.
2002-02-28 07:01:14 +00:00
Chris Demetriou
ca97154034 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_u64): New function which in the future will
        check whether 64-bit instructions are usable and signal an
        exception if not.  Currently a no-op.
        (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
        DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
        DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
        LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.

        * mips.igen (check_fpu): New function which in the future will
        check whether FPU instructions are usable and signal an exception
        if not.  Currently a no-op.
        (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
        CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
        CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
        LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
        MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
        NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
        ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
        SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
2002-02-28 02:57:34 +00:00
Chris Demetriou
1c47a468ec 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_load_left, do_load_right): Move to be immediately
        following do_load.
        (do_store_left, do_store_right): Move to be immediately following
        do_store.
2002-02-27 22:46:35 +00:00
Chris Demetriou
603a98e7a1 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (mipsV): New model name.  Also, add it to
        all instructions and functions where it is appropriate.
2002-02-27 21:52:52 +00:00
Andrew Cagney
080fe24b58 Fix PR gdb/287. From wiz at danbala. Then->than and typos. 2002-02-25 02:13:10 +00:00
Keith Seitz
b3ba81f8ee * armos.c (SWIWrite0): Use generic host_callback mechanism
for supported OS functions "open", "close", "write", etc.
	(SWIopen): Likewise.
	(SWIread): Likewise.
	(SWIwrite): Likewise.
	(SWIflen): Likewise.
	(ARMul_OSHandleSWI): Likewise.
2002-02-21 20:22:49 +00:00
Chris Demetriou
c5d00cc701 2002-02-18 Chris Demetriou <cgd@broadcom.com>
* mips.igen: For all functions and instructions, list model
        names that support that instruction one per line.
2002-02-19 08:10:44 +00:00
Chris Demetriou
074e9cb865 2002-02-11 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Add some additional comments about supported
        models, and about which instructions go where.
        (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
        order as is used in the rest of the file.
2002-02-11 23:35:07 +00:00