* mips.h: Fix missing space in comment.
(INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
(INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
by four bits.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
the "+D" operand, which will be used only by the disassembler.
[ gas/testsuite/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test.
* gas/mips/cp0sel-names-mips32r2.d: New test.
* gas/mips/cp0sel-names-mips64.d: New test.
* gas/mips/cp0sel-names-numeric.d: New test.
* gas/mips/cp0sel-names-sb1.d: New test.
* gas/mips/cp0sel-names.s: New test source file.
* gas/mips/mips.exp: Run new tests.
[ include/opcode/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
[ opcodes/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
fields.
(h8_opcodes). Modify initializer and initializer macros to no
longer initialize the removed fields.
* h8300.h (h8_opcode): Remove 'length' field.
(h8_opcodes): Mark as 'const' (both the declaration and
definition). Modify initializer and initializer macros to no
longer initialize the length field.
2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
parameters. Added support for new opcode-list format. General
error message fixups.
(c4x_inst_add): Reject insn not for our CPU
(md_begin): Added matrix for setting the proper opcode-level &
device-flags according to cpu type and revision. Rewrite the
opcode hasher.
(c4x_operand_parse): Fix opcode bug
(c4x_operands_match): New function argument. Added dry-run
mechanism, that is optional error generation. Added constraint 'i'
and 'j'.
(c4x_insn_check): Added new function for post-verification of the
generated insn.
(md_assemble): Check all opcodes before croaking because of an
argument mismatch. Need this to be able to fully support
ortogonally arguments.
(md_parse_options): Revised commandprompt swicthes and added new
ones.
(md_show_usage): Complete rewrite of printout.
* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
opclass.h changes
* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
the new enhanced opcodes.
* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
the enhanced and special insns.
* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
* opcodes/tic4x-dis.c: Added support for enhanced and special
insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
(c4x_operands_match): Added check for 8-bits LDF insn. Give
warning when using constant direct bigger than 2^16. Add the new
arguments.
* include/opcode/tic4x.h: Major rewrite of entire file. Define
instruction classes, and put each instruction into a class.
* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
argument format. Fix bug in 'N' register printer.
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
EF_M68HC11_ABI): Define for ABI specification.
(STO_M68HC12_FAR, STO_M68HC12_INTERRUPT): Symbol flags for
linker and debugger.
(R_M68HC11_24, R_M68HC11_LO16, R_M68HC11_PAGE): New relocs.
(R_M68HC11_RL_JUMP, R_M68HC11_RL_GROUP): New reloc for linker
relaxation.
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp,
renumbering the sh-dsp registers to use distinct numbers.
sim/sh:
* Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
* interp.c: Include "gdb/sim-sh.h".
(sim_store_register, sim_fetch_register): Use constants defined there.
gdb:
* sh-tdep.c (sh_dsp_register_sim_regno): New function.
(sh_gdbarch_init): Use it for sh-dsp.
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
2002-07-01 Matt Thomas <matt@3am-software.com>
* Rename EF_* to EF_VAX_*.
bfd:
2002-07-01 Matt Thomas <matt@3am-software.com>
* elf32-vax.c (elf32_vax_print_private_bfd_data): Change EF_*
to EF_VAX_*.
binutils:
2002-07-01 Matt Thomas <matt@3am-software.com>
* readelf.c: Include "elf/vax.h".
(guess_is_rela): Move EM_VAX from unknown to RELA case.
(dump_relocations): Handle VAX relocations.
(get_machine_flags): Handle VAX machine flags.
