Andrew Cagney 51ccd82f7f * configure.in: Make --enable-sim-common the default. ...

* configure: Re-generate.
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
address into Sate.regs[REG_PC] instead of common struct.

1998-03-26 01:13:38 +00:00

..

.Sanitize

* interp.c (sim_open): Tidy up device creation.

1998-03-25 05:37:42 +00:00

ChangeLog

* configure.in: Make --enable-sim-common the default.

1998-03-26 01:13:38 +00:00

config.in

Get configure to define RETSIGTYPE

1997-04-07 05:58:59 +00:00

configure

* configure.in: Make --enable-sim-common the default.

1998-03-26 01:13:38 +00:00

configure.in

* configure.in: Make --enable-sim-common the default.

1998-03-26 01:13:38 +00:00

dv-mn103cpu.c

* interp.c (sim_open): Create second 1mb memory region at 0x40000000.

1998-03-25 04:15:38 +00:00

dv-mn103int.c

* interp.c (sim_open): Tidy up device creation.

1998-03-25 05:37:42 +00:00

gencode.c

* gencode.c (write_opcodes): Also write out the format of the

1996-12-11 16:58:33 +00:00

interp.c

* interp.c (sim_open): Create second 1mb memory region at 0x40000000.

1998-03-25 04:15:38 +00:00

Makefile.in

Add support for building simulator based on common simulator framework.

1998-03-24 20:19:55 +00:00

mn10300_sim.h

Pacify GCC.

1998-03-25 00:08:52 +00:00

mn10300.dc

IGEN input files for mn10300 simulator.

1998-03-24 20:07:22 +00:00

mn10300.igen

* mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.

1998-03-25 22:43:19 +00:00

sim-main.h

Header file required by igen generated files.

1998-03-24 20:08:00 +00:00

simops.c

* simops.c (OP_F0FD): Initialise variable 'sp' for rti instruction.

1998-03-25 17:10:01 +00:00