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hwpstate_amd: Refactor the cpufreq code by using delegation pattenr
We separate the code of CPPC and legacy pstate driver to make it easier to read. Reviewed by: olce Approved by: markj (mentor) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D55604
This commit is contained in:
ShengYi Hung committed
1 parent
3797fe720a
commit
191f47bcd6
1 file changed
+149
-78
+149
-78
@@ -152,6 +152,13 @@ struct hwpstate_setting {
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#define HWPFL_USE_CPPC (1 << 0)
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#define HWPFL_CPPC_REQUEST_NOT_READ (1 << 1)
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struct hwpstate_cpufreq_methods {
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int (*get)(device_t dev, struct cf_setting *cf);
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int (*set)(device_t dev, const struct cf_setting *cf);
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int (*settings)(device_t dev, struct cf_setting *sets, int *count);
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int (*type)(device_t dev, int *type);
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};
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/*
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* Atomicity is achieved by only modifying a given softc on its associated CPU
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* and with interrupts disabled.
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@@ -161,6 +168,7 @@ struct hwpstate_setting {
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struct hwpstate_softc {
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device_t dev;
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u_int flags;
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const struct hwpstate_cpufreq_methods *cpufreq_methods;
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union {
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struct {
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struct hwpstate_setting
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@@ -620,80 +628,105 @@ hwpstate_goto_pstate(device_t dev, int id)
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}
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static int
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hwpstate_set(device_t dev, const struct cf_setting *cf)
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hwpstate_set_cppc(device_t dev __unused, const struct cf_setting *cf __unused)
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{
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return (EOPNOTSUPP);
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}
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static int
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hwpstate_set_pstate(device_t dev, const struct cf_setting *cf)
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{
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struct hwpstate_softc *sc;
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struct hwpstate_setting *set;
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int i;
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if (cf == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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if ((sc->flags & HWPFL_USE_CPPC) != 0)
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return (EOPNOTSUPP);
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set = sc->hwpstate_settings;
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for (i = 0; i < sc->cfnum; i++)
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if (CPUFREQ_CMP(cf->freq, set[i].freq))
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break;
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if (i == sc->cfnum)
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return (EINVAL);
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return (hwpstate_goto_pstate(dev, set[i].pstate_id));
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}
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static int
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hwpstate_set(device_t dev, const struct cf_setting *cf)
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{
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struct hwpstate_softc *sc = device_get_softc(dev);
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if (cf == NULL)
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return (EINVAL);
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return (sc->cpufreq_methods->set(dev, cf));
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}
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static int
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hwpstate_get_cppc(device_t dev, struct cf_setting *cf)
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{
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struct pcpu *pc;
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uint64_t rate;
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int ret;
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pc = cpu_get_pcpu(dev);
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if (pc == NULL)
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return (ENXIO);
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memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
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cf->dev = dev;
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if ((ret = cpu_est_clockrate(pc->pc_cpuid, &rate)))
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return (ret);
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cf->freq = rate / 1000000;
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return (0);
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}
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static int
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hwpstate_get_pstate(device_t dev, struct cf_setting *cf)
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{
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struct hwpstate_softc *sc;
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struct hwpstate_setting set;
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uint64_t msr;
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sc = device_get_softc(dev);
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msr = rdmsr(MSR_AMD_10H_11H_STATUS);
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if (msr >= sc->cfnum)
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return (EINVAL);
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set = sc->hwpstate_settings[msr];
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cf->freq = set.freq;
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cf->volts = set.volts;
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cf->power = set.power;
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cf->lat = set.lat;
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cf->dev = dev;
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return (0);
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}
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static int
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hwpstate_get(device_t dev, struct cf_setting *cf)
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{
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struct hwpstate_softc *sc;
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struct hwpstate_setting set;
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struct pcpu *pc;
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uint64_t msr;
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uint64_t rate;
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int ret;
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sc = device_get_softc(dev);
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if (cf == NULL)
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return (EINVAL);
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if ((sc->flags & HWPFL_USE_CPPC) != 0) {
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pc = cpu_get_pcpu(dev);
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if (pc == NULL)
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return (ENXIO);
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memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf));
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cf->dev = dev;
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if ((ret = cpu_est_clockrate(pc->pc_cpuid, &rate)))
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return (ret);
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cf->freq = rate / 1000000;
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} else {
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msr = rdmsr(MSR_AMD_10H_11H_STATUS);
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if (msr >= sc->cfnum)
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return (EINVAL);
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set = sc->hwpstate_settings[msr];
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cf->freq = set.freq;
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cf->volts = set.volts;
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cf->power = set.power;
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cf->lat = set.lat;
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cf->dev = dev;
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}
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return (0);
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return (sc->cpufreq_methods->get(dev, cf));
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}
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static int
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hwpstate_settings(device_t dev, struct cf_setting *sets, int *count)
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hwpstate_settings_cppc(device_t dev __unused, struct cf_setting *sets __unused,
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int *count __unused)
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{
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return (EOPNOTSUPP);
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}
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static int
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hwpstate_settings_pstate(device_t dev, struct cf_setting *sets, int *count)
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{
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struct hwpstate_softc *sc;
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struct hwpstate_setting set;
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struct hwpstate_softc *sc;
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int i;
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if (sets == NULL || count == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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if ((sc->flags & HWPFL_USE_CPPC) != 0)
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return (EOPNOTSUPP);
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if (*count < sc->cfnum)
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return (E2BIG);
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for (i = 0; i < sc->cfnum; i++, sets++) {
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@@ -709,20 +742,39 @@ hwpstate_settings(device_t dev, struct cf_setting *sets, int *count)
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return (0);
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}
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static int
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hwpstate_settings(device_t dev, struct cf_setting *sets, int *count)
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{
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struct hwpstate_softc *sc;
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if (sets == NULL || count == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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return (sc->cpufreq_methods->settings(dev, sets, count));
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}
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static int
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hwpstate_type_cppc(device_t dev, int *type)
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{
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*type |= CPUFREQ_TYPE_ABSOLUTE | CPUFREQ_FLAG_INFO_ONLY |
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CPUFREQ_FLAG_UNCACHED;
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return (0);
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}
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static int
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hwpstate_type_pstate(device_t dev, int *type)
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{
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*type = CPUFREQ_TYPE_ABSOLUTE;
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return (0);
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}
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static int
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hwpstate_type(device_t dev, int *type)
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{
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struct hwpstate_softc *sc;
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if (type == NULL)
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return (EINVAL);
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sc = device_get_softc(dev);
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*type = CPUFREQ_TYPE_ABSOLUTE;
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*type |= (sc->flags & HWPFL_USE_CPPC) != 0 ?
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CPUFREQ_FLAG_INFO_ONLY | CPUFREQ_FLAG_UNCACHED :
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0;
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return (0);
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return (sc->cpufreq_methods->type(dev, type));
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}
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static void
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@@ -909,34 +961,14 @@ enable_cppc(struct hwpstate_softc *sc)
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}
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static int
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hwpstate_probe(device_t dev)
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hwpstate_probe_pstate(device_t dev)
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{
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struct hwpstate_softc *sc;
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device_t perf_dev;
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uint64_t msr;
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int error, type;
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uint64_t msr;
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sc = device_get_softc(dev);
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if (hwpstate_amd_cppc_enable &&
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(amd_extended_feature_extensions & AMDFEID_CPPC)) {
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sc->flags |= HWPFL_USE_CPPC;
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device_set_desc(dev,
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"AMD Collaborative Processor Performance Control (CPPC)");
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} else {
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/*
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* No CPPC support. Only keep hwpstate0, it goes well with
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* acpi_throttle.
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*/
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if (device_get_unit(dev) != 0)
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return (ENXIO);
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device_set_desc(dev, "Cool`n'Quiet 2.0");
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}
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sc->dev = dev;
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if ((sc->flags & HWPFL_USE_CPPC) != 0)
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return (0);
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/*
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* Check if acpi_perf has INFO only flag.
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*/
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@@ -984,10 +1016,49 @@ hwpstate_probe(device_t dev)
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*/
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if (error)
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error = hwpstate_get_info_from_msr(dev);
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if (error)
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return (error);
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return (error);
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}
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return (0);
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static const struct hwpstate_cpufreq_methods cppc_methods = {
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.get = hwpstate_get_cppc,
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.set = hwpstate_set_cppc,
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.settings = hwpstate_settings_cppc,
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.type = hwpstate_type_cppc };
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static const struct hwpstate_cpufreq_methods pstate_methods = {
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.get = hwpstate_get_pstate,
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.set = hwpstate_set_pstate,
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.settings = hwpstate_settings_pstate,
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.type = hwpstate_type_pstate };
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static int
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hwpstate_probe(device_t dev)
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{
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struct hwpstate_softc *sc;
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sc = device_get_softc(dev);
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if (hwpstate_amd_cppc_enable &&
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(amd_extended_feature_extensions & AMDFEID_CPPC)) {
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sc->flags |= HWPFL_USE_CPPC;
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device_set_desc(dev,
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"AMD Collaborative Processor Performance Control (CPPC)");
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} else {
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/*
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* No CPPC support. Only keep hwpstate0, it goes well with
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* acpi_throttle.
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*/
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if (device_get_unit(dev) != 0)
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return (ENXIO);
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device_set_desc(dev, "Cool`n'Quiet 2.0");
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}
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sc->dev = dev;
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if ((sc->flags & HWPFL_USE_CPPC) != 0) {
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sc->cpufreq_methods = &cppc_methods;
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return (0);
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}
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sc->cpufreq_methods = &pstate_methods;
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return (hwpstate_probe_pstate(dev));
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}
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static int
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@@ -1037,8 +1108,8 @@ hwpstate_attach(device_t dev)
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SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
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"desired_performance",
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CTLTYPE_UINT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
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dev, AMD_CPPC_REQUEST_DES_PERF_BITS,
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CTLTYPE_UINT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, dev,
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AMD_CPPC_REQUEST_DES_PERF_BITS,
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sysctl_cppc_request_field_handler, "IU",
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"Desired performance level (from 0 to 255; "
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"0 enables autonomous mode, otherwise value should be "
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