mirror of
https://github.com/libretro/libretro-fceumm.git
synced 2024-12-28 03:45:48 +00:00
Add mappers 448 and 556
This commit is contained in:
libretroadmin
parent
386376c673
commit
0dc5915f0b
161
src/boards/448.c
Normal file
161
src/boards/448.c
Normal file
@ -0,0 +1,161 @@
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2023
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* NES 2.0 Mapper 448
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* VRC4-based 830768C multicart circuit board used by a Super 6-in-1 multicart.
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*/
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#include "mapinc.h"
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#include "latch.h"
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static uint8 reg;
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static uint8 vrc4Prg;
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static uint8 vrc4Mirr;
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static uint8 vrc4Misc;
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static uint8 vrc4IRQLatch;
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static uint8 vrc4IRQa;
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static uint8 vrc4IRQCount;
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static int16 vrc4IRQCycles;
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static SFORMAT StateRegs[] = {
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{ ®, 1, "REGS" },
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{ &vrc4Prg, 1, "PREG" },
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{ &vrc4Mirr, 1, "V4MI" },
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{ &vrc4Misc, 1, "V4MS" },
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{ &vrc4IRQLatch, 1, "VILA" },
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{ &vrc4IRQa, 1, "VIMO" },
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{ &vrc4IRQCount, 1, "VICO" },
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{ &vrc4IRQCycles, 2, "VICY" },
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{ 0 },
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};
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static void Sync(void) {
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setchr8(0);
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if (reg & 0x08) { /* AOROM */
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setprg32(0x8000, ((reg << 2) & ~0x07) | (latch.data & 0x07));
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setmirror(MI_0 + ((latch.data >> 4) & 0x01));
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} else {
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if (reg & 0x04) { /* UOROM */
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setprg16(0x8000, ((reg << 3) & ~0x0F) | (vrc4Prg & 0x0F));
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setprg16(0xC000, ((reg << 3) & ~0x0F) | 0x0F);
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} else { /* UNROM */
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setprg16(0x8000, (reg << 3) | (vrc4Prg & 0x07));
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setprg16(0xC000, (reg << 3) | 0x07);
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}
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switch (vrc4Mirr & 0x03) {
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case 0: setmirror(MI_V); break;
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case 1: setmirror(MI_H); break;
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case 2: setmirror(MI_0); break;
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case 3: setmirror(MI_1); break;
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}
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}
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}
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static DECLFW(writeVRC4) {
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if (A < 0x9000) {
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vrc4Prg = V;
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Sync();
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} else {
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switch (A & 0xF000 | ((A >> 2) & 3)) {
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case 0x9000:
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vrc4Mirr = V;
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Sync();
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break;
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case 0x9002:
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vrc4Misc = V;
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break;
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case 0xF000:
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vrc4IRQLatch = (vrc4IRQLatch & 0xF0) | (V & 0x0F);
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break;
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case 0xF001:
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vrc4IRQLatch = (vrc4IRQLatch & 0x0F) | (V << 4);
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break;
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case 0xF002:
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vrc4IRQa = V;
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if (vrc4IRQa & 0x02) {
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vrc4IRQCount = vrc4IRQLatch;
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vrc4IRQCycles = 341;
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}
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X6502_IRQEnd(FCEU_IQEXT);
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break;
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case 0xF003:
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vrc4IRQa = (vrc4IRQa & ~0x02) | ((vrc4IRQa << 1) & 0x02);
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X6502_IRQEnd(FCEU_IQEXT);
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break;
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}
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}
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}
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static DECLFW(M448WriteReg) {
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if (vrc4Misc & 1) {
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reg = A & 0xFF;
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Sync();
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}
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}
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static DECLFW(M448Write) {
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LatchWrite(A, V);
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writeVRC4(A, V);
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}
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static void FP_FASTAPASS(1) M448CPUHook(int a) {
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int count = a;
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while (count--) {
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if ((vrc4IRQa & 0x02) && ((vrc4IRQa & 0x04) || ((vrc4IRQCycles -= 3) <= 0))) {
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if (~vrc4IRQa & 0x04) {
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vrc4IRQCycles += 341;
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}
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if (!++vrc4IRQCount) {
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vrc4IRQCount = vrc4IRQLatch;
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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}
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}
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static void M448Reset(void) {
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reg = 0;
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Sync();
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}
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static void M448Power(void) {
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reg = 0;
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vrc4Prg = 0;
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vrc4Mirr = vrc4Misc = 0;
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vrc4IRQLatch = vrc4IRQa = vrc4IRQCount = vrc4IRQCycles = 0;
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LatchPower();
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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SetWriteHandler(0x6000, 0x7FFF, M448WriteReg);
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SetWriteHandler(0x8000, 0xFFFF, M448Write);
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}
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static void StateRestore(int version) {
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Sync();
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}
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void Mapper448_Init(CartInfo *info) {
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Latch_Init(info, Sync, NULL, 0, 0);
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info->Reset = M448Reset;
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info->Power = M448Power;
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MapIRQHook = M448CPUHook;
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GameStateRestore = StateRestore;
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AddExState(StateRegs, ~0, 0, 0);
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}
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330
src/boards/556.c
Normal file
330
src/boards/556.c
Normal file
@ -0,0 +1,330 @@
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2023
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* NES 2.0 Mapper 556
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* Used for the for the 超强å°æ–°2+ç‘ªèŽ‰å®¶æ— 7-in-1 (JY-215) multicart.
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*/
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#include "mapinc.h"
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static uint8 reg[5];
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static uint8 mmc3Reg[8];
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static uint8 mmc3Cmd;
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static uint8 mmc3Mirr;
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static uint8 mmc3Wram;
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static uint8 mmc3IRQLatch;
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static uint8 mmc3IRQCount;
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static uint8 mmc3IRQa;
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static uint8 mmc3IRQReload;
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static uint8 vrc4Prg[2];
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static uint8 vrc4Mirr;
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static uint8 vrc4Misc;
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static uint16 vrc4Chr[8];
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static uint8 vrc4IRQLatch;
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static uint8 vrc4IRQa;
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static uint8 vrc4IRQCount;
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static int16 vrc4IRQCycles;
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static uint8 *WRAM = NULL;
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static uint32 WRAMSIZE = 0;
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static SFORMAT StateRegs[] = {
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{ reg, 5, "REGS" },
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{ mmc3Reg, 8, "MMC3" },
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{ &mmc3Cmd, 1, "M3IX" },
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{ &mmc3Mirr, 1, "M3MI" },
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{ &mmc3Wram, 1, "M3WR" },
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{ &mmc3IRQLatch, 1, "M3RL" },
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{ &mmc3IRQCount, 1, "M3CN" },
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{ &mmc3IRQa, 1, "M3IQ" },
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{ &mmc3IRQReload, 1, "M3IR" },
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{ vrc4Prg, 2, "V4PR" },
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{ &vrc4Mirr, 1, "V4MI" },
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{ &vrc4Misc, 1, "V4MS" },
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{ vrc4Chr, 16, "V4CH" },
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{ &vrc4IRQLatch, 1, "VILA" },
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{ &vrc4IRQa, 1, "VIMO" },
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{ &vrc4IRQCount, 1, "VICO" },
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{ &vrc4IRQCycles, 2, "VICY" },
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{ 0 },
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};
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static void Sync(void) {
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uint32 prgmask = ~reg[3] & 0x3F;
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uint32 prgbase = ((reg[3] & 0x40) << 2) | reg[1];
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uint32 chrmask = 0xFF >> (~reg[2] & 0x0F);
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uint32 chrbase = ((reg[3] & 0x40) << 6) | ((reg[2] & 0xF0) << 4) | reg[0];
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uint32 cbase = 0; /* prg/chr bank flip flag */
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if (~reg[2] & 0x80) {
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/* MMC3 */
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cbase = (mmc3Cmd << 8) & 0x4000;
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setprg8(0x8000 ^ cbase, (prgbase & ~prgmask) | (mmc3Reg[6] & prgmask));
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setprg8(0xA000, (prgbase & ~prgmask) | (mmc3Reg[7] & prgmask));
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setprg8(0xC000 ^ cbase, (prgbase & ~prgmask) | (0xFE & prgmask));
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setprg8(0xE000, (prgbase & ~prgmask) | (0xFF & prgmask));
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cbase = (mmc3Cmd << 5) & 0x1000;
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setchr1(0x0000 ^ cbase, (chrbase & ~chrmask) | ((mmc3Reg[0] & 0xFE) & chrmask));
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setchr1(0x0400 ^ cbase, (chrbase & ~chrmask) | ((mmc3Reg[0] | 0x01) & chrmask));
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setchr1(0x0800 ^ cbase, (chrbase & ~chrmask) | ((mmc3Reg[1] & 0xFE) & chrmask));
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setchr1(0x0C00 ^ cbase, (chrbase & ~chrmask) | ((mmc3Reg[1] | 0x01) & chrmask));
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setchr1(0x1000 ^ cbase, (chrbase & ~chrmask) | (mmc3Reg[2] & chrmask));
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setchr1(0x1400 ^ cbase, (chrbase & ~chrmask) | (mmc3Reg[3] & chrmask));
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setchr1(0x1800 ^ cbase, (chrbase & ~chrmask) | (mmc3Reg[4] & chrmask));
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setchr1(0x1C00 ^ cbase, (chrbase & ~chrmask) | (mmc3Reg[5] & chrmask));
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setmirror((mmc3Mirr & 0x01) ^ 1);
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} else {
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/* VRC4 mode */
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cbase = (vrc4Misc << 13) & 0x4000;
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setprg8(0x8000 ^ cbase, (prgbase & ~prgmask) | (vrc4Prg[0] & prgmask));
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setprg8(0xA000, (prgbase & ~prgmask) | (vrc4Prg[1] & prgmask));
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setprg8(0xC000 ^ cbase, (prgbase & ~prgmask) | (0xFE & prgmask));
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setprg8(0xE000, (prgbase & ~prgmask) | (0xFF & prgmask));
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setchr1(0x0000, (chrbase & ~chrmask) | (vrc4Chr[0] & chrmask));
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setchr1(0x0400, (chrbase & ~chrmask) | (vrc4Chr[1] & chrmask));
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setchr1(0x0800, (chrbase & ~chrmask) | (vrc4Chr[2] & chrmask));
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setchr1(0x0C00, (chrbase & ~chrmask) | (vrc4Chr[3] & chrmask));
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setchr1(0x1000, (chrbase & ~chrmask) | (vrc4Chr[4] & chrmask));
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setchr1(0x1400, (chrbase & ~chrmask) | (vrc4Chr[5] & chrmask));
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setchr1(0x1800, (chrbase & ~chrmask) | (vrc4Chr[6] & chrmask));
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setchr1(0x1C00, (chrbase & ~chrmask) | (vrc4Chr[7] & chrmask));
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switch (vrc4Mirr & 0x03) {
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case 0: setmirror(MI_V); break;
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case 1: setmirror(MI_H); break;
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case 2: setmirror(MI_0); break;
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case 3: setmirror(MI_1); break;
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}
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}
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}
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static DECLFW(writeMMC3) {
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switch (A & 0xE001) {
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case 0x8000:
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mmc3Cmd = V;
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Sync();
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break;
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case 0x8001:
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mmc3Reg[mmc3Cmd & 7] = V;
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Sync();
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break;
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case 0xA000:
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mmc3Mirr = V;
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Sync();
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break;
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case 0xA001:
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mmc3Wram = V;
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Sync();
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break;
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case 0xC000:
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mmc3IRQLatch = V;
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break;
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case 0xC001:
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mmc3IRQReload = 1;
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break;
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case 0xE000:
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mmc3IRQa = 0;
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X6502_IRQEnd(FCEU_IQEXT);
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break;
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case 0xE001:
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mmc3IRQa = 1;
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break;
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}
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}
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static DECLFW(writeVRC4) {
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uint8 index;
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A = (A & 0xF000) | ((A >> 2) & 3) | (A & 3);
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switch (A & 0xF000) {
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case 0x8000:
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case 0xA000:
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vrc4Prg[(A >> 13) & 1] = V;
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Sync();
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break;
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case 0x9000:
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if (~A & 2) {
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vrc4Mirr = V;
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} else if (~A & 1) {
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vrc4Misc = V;
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}
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Sync();
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break;
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case 0xF000:
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switch (A & 3) {
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case 0:
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vrc4IRQLatch = (vrc4IRQLatch & 0xF0) | (V & 0x0F);
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break;
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case 1:
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vrc4IRQLatch = (vrc4IRQLatch & 0x0F) | (V << 4);
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break;
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case 2:
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vrc4IRQa = V;
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if (vrc4IRQa & 0x02) {
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vrc4IRQCount = vrc4IRQLatch;
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vrc4IRQCycles = 341;
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}
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X6502_IRQEnd(FCEU_IQEXT);
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break;
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case 3:
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vrc4IRQa = (vrc4IRQa & ~0x02) | ((vrc4IRQa << 1) & 0x02);
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X6502_IRQEnd(FCEU_IQEXT);
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break;
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}
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break;
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default:
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index = ((A - 0xB000) >> 11) | ((A >> 1) & 1);
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if (A & 1) {
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vrc4Chr[index] = (vrc4Chr[index] & 0x0F) | (V << 4);
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} else {
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vrc4Chr[index] = (vrc4Chr[index] & ~0x0F) | (V & 0x0F);
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}
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Sync();
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break;
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}
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}
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static DECLFW(M556WriteReg) {
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if (~reg[3] & 0x80) {
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reg[reg[4] & 3] = V;
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reg[4]++;
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Sync();
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}
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}
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static DECLFW(M556Write) {
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if (~reg[2] & 0x80) {
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writeMMC3(A, V);
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} else {
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writeVRC4(A, V);
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}
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}
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static void FP_FASTAPASS(1) M556CPUHook(int a) {
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int count = a;
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if (~reg[2] & 0x80) {
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return;
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}
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/* VRC4 IRQ mode */
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while (count--) {
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if ((vrc4IRQa & 0x02) && ((vrc4IRQa & 0x04) || ((vrc4IRQCycles -= 3) <= 0))) {
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if (~vrc4IRQa & 0x04) {
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vrc4IRQCycles += 341;
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}
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if (!++vrc4IRQCount) {
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vrc4IRQCount = vrc4IRQLatch;
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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}
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}
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static void M556HBHook(void) {
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int count = mmc3IRQCount;
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if (reg[2] & 0x80) {
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return;
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}
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/* MMC3 IRQ mode */
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if (!count || mmc3IRQReload) {
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mmc3IRQCount = mmc3IRQLatch;
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} else {
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mmc3IRQCount--;
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}
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if (count && !mmc3IRQCount && mmc3IRQa) {
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X6502_IRQBegin(FCEU_IQEXT);
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}
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mmc3IRQReload = 0;
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}
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static void M556Reset(void) {
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int i;
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for (i = 0; i < 5; i++) {
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reg[i] = 0;
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}
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reg[2] = 0x0F;
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Sync();
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}
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static void M556Power(void) {
|
||||
int i;
|
||||
for (i = 0; i < 5; i++) {
|
||||
reg[i] = 0;
|
||||
}
|
||||
for (i = 0; i < 8; i++) {
|
||||
mmc3Reg[i] = 0;
|
||||
}
|
||||
for (i = 0; i < 2; i++) {
|
||||
vrc4Prg[i] = 0;
|
||||
}
|
||||
for (i = 0; i < 8; i++) {
|
||||
vrc4Chr[i] = 0;
|
||||
}
|
||||
mmc3Cmd = mmc3Mirr = mmc3Wram = mmc3IRQLatch = mmc3IRQCount = mmc3IRQa = mmc3IRQReload = 0;
|
||||
vrc4Mirr = vrc4Misc = vrc4IRQLatch = vrc4IRQa = vrc4IRQCount = vrc4IRQCycles = 0;
|
||||
reg[2] = 0x0F;
|
||||
Sync();
|
||||
|
||||
SetReadHandler(0x8000, 0xFFFF, CartBR);
|
||||
SetWriteHandler(0x5000, 0x5FFF, M556WriteReg);
|
||||
SetWriteHandler(0x8000, 0xFFFF, M556Write);
|
||||
|
||||
if (WRAM) {
|
||||
setprg8r(0x10, 0x6000, 0);
|
||||
SetReadHandler(0x6000, 0x7FFF, CartBR);
|
||||
SetWriteHandler(0x6000, 0x7FFF, CartBW);
|
||||
}
|
||||
}
|
||||
|
||||
static void M556Close(void) {
|
||||
if (WRAM) {
|
||||
FCEU_gfree(WRAM);
|
||||
}
|
||||
WRAM = NULL;
|
||||
}
|
||||
|
||||
static void StateRestore(int version) {
|
||||
Sync();
|
||||
}
|
||||
|
||||
void Mapper556_Init(CartInfo *info) {
|
||||
info->Reset = M556Reset;
|
||||
info->Power = M556Power;
|
||||
info->Close = M556Close;
|
||||
MapIRQHook = M556CPUHook;
|
||||
GameHBIRQHook = M556HBHook;
|
||||
GameStateRestore = StateRestore;
|
||||
AddExState(StateRegs, ~0, 0, 0);
|
||||
|
||||
WRAMSIZE = info->PRGRamSize + info->PRGRamSaveSize;
|
||||
if (WRAMSIZE) {
|
||||
WRAM = (uint8 *)FCEU_gmalloc(WRAMSIZE);
|
||||
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
|
||||
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
|
||||
if (info->battery) {
|
||||
info->SaveGame[0] = WRAM;
|
||||
info->SaveGameLen[0] = WRAMSIZE;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -821,6 +821,7 @@ INES_BOARD_BEGIN()
|
||||
INES_BOARD( "850335C", 441, Mapper441_Init )
|
||||
INES_BOARD( "NC-3000M", 443, Mapper443_Init )
|
||||
INES_BOARD( "NC-7000M/NC-8000M", 444, Mapper444_Init )
|
||||
INES_BOARD( "830768C", 448, Mapper448_Init )
|
||||
INES_BOARD( "22-in-1 King Series", 449, Mapper449_Init )
|
||||
INES_BOARD( "DS-9-27", 452, Mapper452_Init )
|
||||
INES_BOARD( "N625836", 455, Mapper455_Init )
|
||||
@ -861,6 +862,7 @@ INES_BOARD_BEGIN()
|
||||
INES_BOARD( "5-in-1 (CH-501)", 543, Mapper543_Init )
|
||||
INES_BOARD( "SACHEN 3013", 553, Mapper553_Init )
|
||||
INES_BOARD( "KS-7010", 554, Mapper554_Init )
|
||||
INES_BOARD( "JY-215", 556, Mapper556_Init )
|
||||
INES_BOARD( "", 550, Mapper550_Init )
|
||||
INES_BOARD( "YC-03-09", 558, Mapper558_Init )
|
||||
INES_BOARD_END()
|
||||
|
||||
@ -330,6 +330,7 @@ void Mapper439_Init(CartInfo *);
|
||||
void Mapper441_Init(CartInfo *);
|
||||
void Mapper443_Init(CartInfo *);
|
||||
void Mapper444_Init(CartInfo *);
|
||||
void Mapper448_Init(CartInfo *);
|
||||
void Mapper449_Init(CartInfo *);
|
||||
void Mapper452_Init(CartInfo *);
|
||||
void Mapper455_Init(CartInfo *);
|
||||
@ -359,6 +360,7 @@ void Mapper543_Init(CartInfo *);
|
||||
void Mapper550_Init(CartInfo *);
|
||||
void Mapper553_Init(CartInfo *);
|
||||
void Mapper554_Init(CartInfo *);
|
||||
void Mapper556_Init(CartInfo *);
|
||||
void Mapper558_Init(CartInfo *);
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user