streamline

only set cpu clock scale from core option when the value changes
Ensure CPU clock scale is only applied when changed and reset on game unload. Currently this core calls cpunum_set_clockscale each frame with the value that is currently set by the CPU core option. This in theory could cause a minor bug when a cheat code later alters the value of a CPU as some of them do. I haven't experienced this bug personally. My PR also helps make it easier to reintegrate the legacy MAME menu for setting CPU clock values. One thing I think I'm discovering is that MAME 0.78 doesn't seem to save CPU clock value settings in a file in order to persist. Possibly I am not understanding how that is persistent, yet.
2026-11-07 12:28:04 -10:00 · 2026-10-23 08:49:42 -04:00 · 2026-10-23 08:45:55 -04:00
316 changed files with 26131 additions and 114493 deletions
@@ -4,6 +4,5 @@
 *.exe
 *.dll
 *.so
-*.d
 package.json
 .npmignore
@@ -2,8 +2,7 @@

 * Current repository maintainers: arcadez, mahoneyt944, markwkidd, twinaphex
 * Past repository maintiners: arnoldsecret, grant2258
-* Significant code contributors to this project: AMadvanceMAME, BritneysPAIRS, dink,
-* FBN Dev, grant2258, iq_132, MAME Dev, Mistydreams, ShmupMAME, Zanac, AI agent claude
+* Significant code contributors to this project: AMadvanceMAME, BritneysPAIRS, dink, FBN Dev, grant2258, iq_132, MAME Dev, Mistydreams, ShmupMAME

 The list of direct contributors to the MAME 2003-Plus github repository can be found at https://github.com/libretro/mame2003-plus-libretro/graphs/contributors. Additional contributor credits can be found in LICENSE.md, CHANGELOG.old, and in the individual driver source files.

@@ -19,7 +18,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Adventure Canoe
 * Air Attack
 * Air Rescue
-* Akka Arrh (prototype)
 * Aladdin (bootleg of Megadrive version)
 * Angler Dangler (Deco Cassette)
 * Argus (Gottlieb, prototype)
@@ -28,14 +26,11 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Backfire!
 * Back Fire (Tecmo)
 * Bang Bang Busters
-* Bare Knuckle (scrambled bootleg of Mega Drive version) - Romset `barekch` - 6 button pads
-* Bare Knuckle II (bootleg of Mega Drive version) - Romset `barek2mb` - its PIC16C57 emulated
 * Bare Knuckle II (chinese bootleg of Megadrive version)
 * Bare Knuckle III (bootleg of Megadrive version)
 * Baryon: Future Assault
 * Beastie Feastie (Epos Tristar 9000) - Romset `beastf`; the Pac-Man conversion is now `beastfp`, as in current MAME
 * Big Fight - Big Trouble In The Atlantic Ocean
-* Bio-Hazard Battle (scrambled bootleg of Mega Drive version) - Romset `biohzdmb`
 * Bomb Kick
 * Boogie Wings
 * Born To Fight
@@ -44,7 +39,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Bubble Bobble 2 - The Return Of Super Drunk (prototype)
 * Bubble Buster
 * Buccaneers
-* Buggy Boy/Speed Buggy (cockpit, rev. D and B), Buggy Boy Junior/Speed Buggy (upright)
 * Bullet (unprotected of FD1094 317-0041 set)" )
 * Cabal (World, Joystick version)
 * Calorie Kun vs Moguranian
@@ -55,7 +49,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Choky! Choky!
 * Choutetsu Brikin'ger - iron clad
 * Clockwork Aquario
-* Columns II: The Voyage Through Time (World) - Romset `columns2`; the old `columns2` (Japan) is now its clone `column2j`, as in current MAME
 * Combat Hawk
 * Come Back Toto
 * Cookie & Bibi
@@ -70,8 +63,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Cycle Warriors
 * Daikaiju no Gyakushu
 * Danger Express (prototype)
-* Deathsmiles - Romset `deathsml`
-* Deathsmiles MegaBlack Label - Romset `dsmbl`
 * Deluxe 5
 * Denjin Makai 
 * Deer Hunting
@@ -79,8 +70,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Dice - The Dice Game
 * Diet Go Go
 * Digger (CVS)
-* DoDonPachi Dai-Fukkatsu (Ver 1.5 and 1.0) - Romsets `ddpdfk`, `ddpdfk10`
-* DoDonPachi Dai-Fukkatsu Black Label - Romset `dfkbl`
 * Dolmen
 * Dodge Man
 * DoDonPachi Dai-Ou-Jou
@@ -92,7 +81,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Dyna Gear
 * Eeekk!
 * ESPGaluda
-* Espgaluda II (all sets) - Romsets `espgal2`, `espgal2a`, `espgal2b`
 * F1 Super Lap (World)
 * Fantasy Zone II - The Tears of Opa-Opa (System 16C version)
 * Fever SOS
@@ -122,19 +110,15 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Hard Times
 * Head On Channel (Japan, Prototype)
 * Heavy Smash
-* Heavy Unit
 * Hoops '96
 * Hypernoid
 * Hyper Crash
 * Hyper Street Fighter II (All Sets)
-* Ibara (all sets) - Romsets `ibara`, `ibarao`
-* Ibara Kuro Black Label (all sets) - Romsets `ibarablk`, `ibarablka`
 * In Your Face
 * Inca * Mature *
 * Indian Battle
 * Invasion
 * Jammin (Atari Prototype)
-* Jingling Jiazu Genie 2000 - Romset `jingling`
 * Joe & Mac Returns
 * Jolly Jogger
 * Jurassic Park (Bootleg Of Megadrive Version)
@@ -167,16 +151,11 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Monsters World (Bootleg Of Super Pang)
 * Monster Maulers
 * More More
-* Mortal Kombat 3 (scrambled bootleg of Mega Drive version) - Romset `mk3mdb` - 6 button pads
 * Mortal Race
 * Mouse Shooter GoGo
 * Ms. Pacman Twin
 * Mrs. Dynamite
-* Muchi Muchi Pork! - Romset `mmpork`
 * Multi Champ Deluxe * Mature *
-* Mushihime-Sama (all sets) - Romsets `mushisam`, `mushisama`, `mushisamb`
-* Mushihime-Sama Futari Black Label (all sets) - Romsets `futaribl`, `futariblj`
-* Mushihime-Sama Futari Ver 1.5 and 1.0 (all sets) - Romsets `futari15`, `futari15a`, `futari10`
 * New Zero Team
 * Ninja Kazan
 * Oo Parts (Japan, Prototype)
@@ -191,7 +170,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Passing Shot (Japan 2 players) 
 * Penky
 * Photo Y2K 2
-* Pink Sweets: Ibara Sorekara (all sets) - Romsets `pinkswts`, `pinkswtsa`, `pinkswtsb`, `pinkswtsx`
 * Pirate Treasure
 * Planet Probe
 * Pochi & Nyaa
@@ -201,12 +179,9 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Power Instinct Matrimelee
 * Power Up Baseball
 * Progear
-* Puckman Pockimon Genie 2000 - Romset `puckpkmn` - the set of current MAME; the old `puckpkmn` set is now its clone `puckpkmnb`, as in current MAME
-* Puyo Puyo (World) - Romset `puyo`; the old `puyopuyo`, `puyopuya` and `puyopuyb` are now its clones `puyoj`, `puyoja` and `puyobl`, as in current MAME
 * Puzz Loop 2 (All Sets)
 * Puzzle Break
 * Puzzle Star
-* Puzzle! Mushihime-Tama (all sets) - Romsets `mushitam`, `mushitama`
 * Puzzli 2
 * Puzzli 2 Super
 * Quick Shots (Clone Of Target Hits)
@@ -233,13 +208,10 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Sega Megaplay : Streets Of Rage II
 * Sega Megaplay : Tecmo World Cup
 * Sega Sonic Bros (Japan, Prototype)
-* SegaSonic Cosmo Fighter (World and Japan) - Romsets `sonicfgt`, `sonicfgtj`
-* SegaSonic Popcorn Shop (Rev B) - Romset `sonicpop` - the popcorn machine itself isn't emulated, as in current MAME
 * Sengoku 3
 * Shuihu Feng Yun Zhuan
 * Skater (Deco Cassette)
 * Skull Fang
-* Sky Robo / Tatakae! Big Fighter
 * Slap Shooter
 * Snow Brothers 3 - Magical Adventure
 * Snk Vs Capcom : Svc Chaos (MVS)
@@ -247,13 +219,11 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Sonic Boom
 * Sonic The Hedgehog 2 (Bootleg Of Megadrive Version)
 * Sonic The Hedgehog 3 (Bootleg Of Megadrive Version)
-* Soreike! Anpanman Popcorn Koujou (Rev B and Rev A) - Romsets `anpanman`, `anpanmana` - the popcorn machine itself isn't emulated, as in current MAME
 * Space Fever High Splitter
 * Space Launcher
 * Space Raider
 * Spectrum 2000 (Euro)
 * Squash
-* Stack Columns (World) - Romset `stkclmns`; the old `stkclmns` (Japan) is now its clone `stkclmnsj`, as in current MAME
 * Stadium Cross (World, linkable) and (US) - Romsets `scrossa`, `scrossu`; `scross` now uses the ROM names of current MAME
 * Star Fire 2
 * Steel Worker
@@ -263,10 +233,8 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Super Bishi Bashi Championship (ver JAA, 2 Players)
 * Super Bubble Bobble (Sun Mixing, Megadrive clone hardware)
 * Super Doubles Tennis (Deco Cassette)
-* Sunset Riders (scrambled bootleg of Mega Drive version) - Romset `srmdb`
 * Super Monaco GP
 * Super Rider
-* Super Street Fighter II - The New Challengers (scrambled bootleg of Mega Drive version) - Romset `ssf2mdb` - 6 button pads
 * Super Trio
 * SWAT Police
 * Tang Tang
@@ -282,7 +250,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * ThunderForce AC (Japan, prototype, bootleg)
 * Top Driving
 * Top Roller
-* Top Shooter - Romset `topshoot`
 * Toppy & Rappy
 * Torus * Mature *
 * Touch & Go (Korea, unprotected)
@@ -294,21 +261,14 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Turkey Hunting
 * Twin Cobra 2
 * Twin Action
-* Twin Squash - Romset `twinsqua`
 * Twinkle
 * Twinkle Tale (Bootleg Of Megadrive Version)
-* TX-1 (World, Japan rev. B and C)
 * Tylz
 * Ufo Senshi Yohko Chan
 * Varia Metal
 * Vasara 2
 * Virtua Bowling
 * Virtua Fighter
-* Waku Waku Anpanman (Rev A and original) - Romsets `wwanpanm`, `wwanpanmo`
-* Waku Waku Jumbo (Rev A) - Romset `wwjumbo`
-* Waku Waku Marine - Romset `wwmarine`
-* Waku Waku Pajero - Romset `wwpajero`
-* Waku Waku Sonic Patrol Car - Romset `soniccar`
 * Wheels Runner
 * Wing Force
 * Wing Shooting Championship
@@ -323,33 +283,15 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f

 ## New Clones

-* 800 Fathoms (older), Knock Out!! (bootleg, set 2 and set 3), Triple Punch (set 2) - Romsets `800fatha`, `knockoutb`, `knockoutc`, `triplepa`
-* Alien Storm (bootlegs of the 3 players and Japan sets) - Romsets `astorm3d`, `astormud`, `astormjd`
-* Asura Buster - Eternal Warriors (USA), (Japan, set 2) and (Japan) (ARCADIA review build) - Romsets `asurabus`, `asurabusja`, `asurabusjr`; the Japan set 1 is now `asurabusj`, as in current MAME
-* Bare Knuckle III (bootleg of Mega Drive version, alt set, the PIC simulated) - Romset `barek3mba` - not working, as in current MAME
-* Bare Knuckle III / Sunset Riders (scrambled bootleg of Mega Drive versions) - Romset `bk3ssrmb` - not working, as in current MAME (only Bare Knuckle III boots)
-* Bloxeed (US, C System, Rev A) - Romset `bloxeedu`
-* Borench (set 2) and (Japan) - Romsets `borencha`, `borenchj`
-* Columns (US, cocktail, Rev A) - Romset `columnsu`
-* Print Club (World) and (Japan Vol.3) - Romsets `pclub`, `pclubjv3` - not working (camera and printer), as in current MAME
-* Puzzle & Action: Ichidant-R (World) (bootleg) - Romset `ichirbl`
-* Puzzle & Action: Tant-R (Japan) (bootleg set 3 and set 4) - Romsets `tantrbl3`, `tantrbl4`
-* Ribbit! (Japan) - Romset `ribbitj`
-* Sunset Riders / Super Street Fighter II - The New Challengers (scrambled bootleg of Mega Drive versions) - Romset `srssf2mb` - not working, as in current MAME (the order of the ROMs is not known)
 * Battle Shark (Japan, Joystick)
-* Bloxeed (bootleg) - Romset `bloxeedd`
 * Botanic (French version)
 * Bubble Bobble (prototype on tokio hardware)
 * Calorie Kun vs Moguranian (bootleg)
 * Cannon Dancer
-* Clutch Hitter (bootlegs) - Romsets `cltchitrd`, `cltchitrjd`
 * Competition Golf Final Round (old version) - `compglfo`
-* Cotton (bootlegs of the US and Japan sets) - Romsets `cottonud`, `cottonjd`, `cottonjad`
 * Crouching Tiger Hidden Dragon 2003
 * Crouching Tiger Hidden Dragon 2003 Super Plus
 * Crystal Castles (Joystick Version)
-* D. D. Crew (bootlegs of the six FD1094 sets) - Romsets `ddcrewd`, `ddcrewud`, `ddcrew1d`, `ddcrew2d`, `ddcrewjd`, `ddcrewj2d`
-* Desert Breaker (bootlegs) - Romsets `desertbrd`, `desertbrjd`
 * DJ Boy (Japan)
 * DoDonPachi Dai-Ou-Jou (Black Label)
 * Double Dragon 3 - The Rosetta Stone (Japan)
@@ -363,7 +305,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Gals Panic DX * Mature *
 * Ghox (Joystick)
 * Ganbare! Gonta!! 2 / Party Time: Gonta the Diver II * Mature *
-* Golden Axe II (Mega Play, original revision) - Romset `mp_gaxe2a`
 * GunNail (Location Test)
 * Guwange Special Version
 * Hacha Mecha Fighter (bootleg)
@@ -376,7 +317,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * King of Gladiator
 * Knuckle Bash 2
 * Kyukyoku Tiger (Japan, 2 Players) 
-* Laser Ghost (bootlegs) - Romsets `lghostd`, `lghostud`
 * Mad Ball V2.0 * Mature * - Romset `madball`
 * Magical Drop
 * Magical Drop Plus 1
@@ -385,7 +325,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Renegade (US, Bootleg)
 * Safari Rally (World) - safarir
 * Sexy Parodius (Ver AAA) * Mature *
-* Shadow Dancer (World, Japan and US) - Romsets `shdancer`, `shdancerj`, `shdancer1` (were `shdancer`, `shdancrj`, `shdancrb`), now on the System 18 memory mapper and video as in current MAME
 * Snk Vs Capcom : Svc Chaos (bootleg)
 * Super Bishi Bashi Championship (ver KAA, 3 Players)
 * Target Ball * Mature * (Romset `tgtballa`)
@@ -435,7 +374,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Metal Slug 2 - Turbo (Trap15, Hack)
 * Midnight Resistance (joystick hack bootleg)
 * Mortal Kombat 2 Plus Beta 2
-* Pink Sweets: Suicide Club (2017 hack of Pink Sweets) - Romset `pinkswtssc`
 * TANK III (joystick hack bootleg)
 * The Eye Of The Typhoon (Beta 7)
 * Tron freeplay custom rom
@@ -446,8 +384,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f

 * Agent Super Bond - Romset `superbon` - colors fixed
 * Alcon - Romset: `alcon`
-* Alien Storm (World and Japan 2 players, World and US 3 players) - Romsets `astorm`, `astormj`, `astorm3`, `astormu` - FD1094 encrypted 68000, Sega System 18
-* Bloxeed (Japan, two sets) - Romsets `bloxeed`, `bloxeeda` - FD1094 encrypted 68000, Sega System 18
 * Arch Rivals - Romset: `archrivl`
 * Avengers In Galactic Storm US - Romset: `avengrgs`
 * Avengers In Galactic Storm Japan - Romset: `avengrgsj`
@@ -465,14 +401,10 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Cheeky Mouse - Romset `cheekyms` - colors fixed
 * Chouji Meikyuu Legion (ver 1.05) - Romset `legiono`
 * Competition Golf Final Round (revision 3) - `compgolf`
-* Cotton (World, US, Japan Rev A and Rev B) - Romsets `cotton`, `cottonu`, `cottonj`, `cottonja` - FD1094 encrypted 68000
-* Clutch Hitter (US and Japan) - Romsets `cltchitr`, `cltchitrj` - FD1094 encrypted 68000, Sega System 18
 * Crater Raider - Romset `crater`
 * Crazy Climber 2 - Romset `cclimbr2`
 * Dark Edge - Romset `darkedge`
 * DD Crew - Romset `ddcrew`
-* D. D. Crew (all FD1094 sets: World 2, 3 and 4 players, US, Japan 2 and 4 players) - Romsets `ddcrew`, `ddcrew1`, `ddcrew2`, `ddcrewu`, `ddcrewj`, `ddcrewj2` - Sega System 18, as in current MAME
-* Desert Breaker (World and Japan) - Romsets `desertbr`, `desertbrj` - FD1094 encrypted 68000, Sega System 18
 * Demolition Derby - Romset `demoderb`
 * Die Hard Arcade - Romset `diehard` - Requires a fast system; video and sound issues remain
 * Discs Of Tron - Romsets `dotron` and `dotrone`
@@ -514,7 +446,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Kick - Romset `kick`
 * Kick'N Run- Romset `kicknrun`
 * Kozmik Kroozr - Romset `kroozr`
-* Laser Ghost (World, US and Japan) - Romsets `lghost`, `lghostu`, `lghostj` - FD1094 encrypted 68000, Sega System 18, light guns
 * Legion (ver 2.03) - Romset `legion`
 * Macho Mouse - Romset `machomou` - colors fixed
 * Mario's Open Golf (Playchoice 10) - Romset `pc_moglf`
@@ -548,15 +479,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Satan's Hollow - Romset `shollow`
 * Sega Megaplay : Golden Axe II - Romset `mp_gaxe2`
 * Sega Megaplay : Sonic The Hedgehog - Romset `mp_sonic`
-* Sega Mega-Tech : After Burner - Romset `mt_aftrb` - SMS based
-* Sega Mega-Tech : Astro Warrior - Romset `mt_astro` - SMS based
-* Sega Mega-Tech : Bonanza Bros. - Romset `mt_bbros` - the good dump of current MAME
-* Sega Mega-Tech : Ghouls'n Ghosts - Romset `mt_gng` - the good dump of current MAME
-* Sega Mega-Tech : Golden Axe II - Romset `mt_gaxe2`
-* Sega Mega-Tech : Great Golf - Romset `mt_ggolf` - SMS based, the good dump of current MAME
-* Sega Mega-Tech : Parlour Games - Romset `mt_parlg` - SMS based
-* Sega Mega-Tech : Shinobi - Romset `mt_shnbi` - SMS based
-* Sega Mega-Tech : Tetris - Romset `mt_tetri` - the good dump of current MAME
 * Shisensho II * Mature * - Romset `shisen2`
 * Shogun Warriors - Romset `shogwarr`
 * Shrike Avenger - Romset `shrike`
@@ -565,7 +487,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Slipstream - Romset `slipstrm`
 * Snowboard Championship - Romset `snowboar`
 * Solar Fox - Romset `solarfox`
-* Songjiangyanyi Final - Romset `songjang` - the Mega Drive board of current MAME, the HBLANK status it waits for
 * Space Position - Romset `spcpostn`
 * Space Seeker - Romset `spaceskr`
 * Speed Spin - Romset `speedspn` - gfx glitches
@@ -594,7 +515,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f
 * Under Fire - Romset `undrfire`
 * U.S. Classic - Romset `usclssic` - colors fixed
 * VS. Hot Smash - `hotsmash`
-* Wally wo Sagase! (rev A and B, 2 and 3 players) - Romsets `wwallyj`, `wwallyja`, `wwallyja3p` - FD1094 encrypted 68000, Sega System 18, trackballs
 * Wonder Boy in Monster Land (Japan New Ver.) - Romset `wbml`
 * Wonder Boy in Monster Land (Japan Old Ver.) - Romset `wbmljo`
 * Xenophobe - Romset `xenophob`
@@ -664,12 +584,10 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f

 ## Games now with improved sound

-* 800 Fathoms, Knock Out!!, Mariner, Triple Punch: AY-8910 clock of current MAME (1.536 MHz, verified on hardware), the sound was 16% too high and too fast
 * 1945kIII
 * Air Buster
 * Ashita no Joe
 * Asterix
-* Asura Blade, Asura Buster (no more repeated voices and sound effects)
 * Athena
 * Bandito
 * Big Event Golf
@@ -787,8 +705,6 @@ The list of direct contributors to the MAME 2003-Plus github repository can be f

 ## New and/or Recommended Input Options and Settings

-* Ikari (joystick hack bootleg): dual stick aiming. Set the 'Aim with Right Stick' DIP switch to On (Tab menu, Dip Switches): the player walks with the left stick and aims and fires with the right stick; with the right stick released he fires where he walks, as before. Off by default.
-
 * Added 'X-Way Joystick' Option to Analog Controls Menu only for IPT_DIAL and IPT_DIAL_V devices.  This option is for use with x-way rotary joysticks (where the joystick can rotate X discrete steps, 8 or 12 appears to be most common).  The joystick can still move up, down, left, right and diagonally. The most famous game to use this control scheme is Ikari Warriors.
 Notes on this option:
  - When on, prevents the character from rotating two discrete steps sometimes when the rotary joystick is just rotated one step.
@@ -862,24 +778,6 @@ Notes on this option:


 ## Misc Changes
-* Save states (RunAhead, netplay) of the Galaxian/Scramble/Frogger hardware: Galaxian video (stars, flip, banks, background), the 7474 flip-flops, the Scramble sound RAM and timer, the RC filters of the sound streams, the global sound enable
-* Sega System 18: all the games on the 315-5195 memory mapper, the segaic16 video and the VDP layer as in current MAME (171-5874, 171-5987 and Shadow Dancer ROM boards, FD1094 sets, Laser Ghost light guns, Wally wo Sagase! trackballs); the old `astorm` and `astorm2p` are now `astormj` and `astorm`
-* Sega Mega Drive VDP (315-5313): now a module of its own (`vidhrdw/segavdp.c`), started with its own configuration by System C/C2, Mega-Tech, Mega Play, the Mega Drive bootlegs and System 18, so a change for one board no longer reaches the others; a game loaded after a Mega Play game in the same session no longer inherits its interrupt mode (e.g. Columns attract out of sync), and the VDP window position and VBLANK flag are in the save states
-* Sega Mega Play: its own driver (`drivers/megaplay.c`, as in current MAME), the Mega Drive part shared with the other Mega Drive based boards; Tecmo World Cup is now `mp_twcup` and the BIOS version 2 ROM `epr-a15294.ic2`, as in current MAME
-* Sega Mega-Tech: its own driver (`drivers/megatech.c`, as in current MAME), sets, ROMs and names as in current MAME (good dumps of `mt_bbros`, `mt_ggolf`, `mt_gng`, `mt_tetri`, the instruction ROMs in the cart at 0x300000); the Master System carts now run, on the Mega Drive in Mark III mode as in current MAME (the VDP in mode 4, the Z80 with the Sega mapper); the BIOS cart slots as in current MAME (the menu lists the one cart in slot 1, the slot RAM, the window into the cart), the BIOS display in its 224 line mode (the MENU title was cut) and drawn line by line; the Mega Drive VDP line timing and partial updates now count its own lines below the BIOS screen (they used the scanlines of the double screen); the 68000 writes to 0xa02000 of the boards without the Mega Play BIOS no longer go through a NULL pointer (Great Golf and Great Soccer crashed)
-* Sega Mega Play: the BIOS overlay is transparent on colour 0 of both its palettes and covers its borders, as in current MAME (the boot logo screen was hidden behind a green background)
-* Sega Mega Drive based bootlegs: their own driver (`drivers/megadriv_acbl.c`, as in current MAME), with the board variants of current MAME (the 6 button pads, the DIP switches at 0x770070 of the scrambled boards, the 3rd I/O port coins, the PIC16C57 of `barek2mb`); the new sets take their V-INT / H-INT through the VDP interrupt enables as on the real hardware (Mortal Kombat 3 crashed at boot), the descrambling of the bootlegs and the PIC of `barek2mb` now also work on big-endian hosts
-* Genie / Y-BOX and Sun Mixing boards: their own drivers (`drivers/megadriv_ybox.c`, `drivers/megadriv_sunmix.c`, as in current MAME); the Y-BOX games run on the Mega Drive machine as in MAME (Z80, I/O, the VDP interrupts and HBLANK as on the real hardware), with the protection read back latches and the ROM address remapping of Shuihu Feng Yun Zhuan of current MAME
-* Sega System C/C2: `drivers/segac2.c` now has only System C/C2, the Mega Drive part shared by the other boards is in `machine/megadriv.c` (as `megadriv.cpp` in current MAME); the sets, ROMs, titles, inputs and DIP switches as in current MAME; the protection chip as the EPM5032 logic of each game of current MAME (no more Ribbit! and Puyo Puyo 2 workarounds and fake tables, Print Club Vol.2, 4 and 5 now get past the protection); the alternate palette mode of Ribbit! and Twin Squash (instead of the palette address watching of Ribbit!); the 68000 at 8.95 MHz and the 59.92 Hz refresh as in current MAME (it ran at 7.67 MHz and 60 Hz: the games now follow the timing of MAME frame for frame), the V-INT and H-INT held until the 68000 takes them as on the board, the address mirrors, the battery-backed work RAM (high scores kept, as in current MAME) and the coin meters on the I/O chip
-* YM2612 / YM3438: the busy flag after a data write (192 clocks, as in current MAME), and a timer started long after its last overflow runs a whole period instead of firing at once (Thunder Force AC, Bloxeed and the other System C2 games follow MAME again)
-* Sega Mega Play: the V-INT of the BIOS VDP comes about 12 lines after the Mega Drive VBLANK, as in current MAME (it came ~80 lines early, and the BIOS/game handshake on port C could miss: Tecmo World Cup stayed on a black screen)
-* Sega Mega Play / System E: the tiles of the SMS-type VDP are read byte by byte, so they are drawn right on big-endian hosts (the Mega Play BIOS screen had the wrong colours)
-* Sega Mega Drive VDP: in H32 mode the sprite table base uses bit 0 of register 5, as on the real VDP (the fighters of Super Street Fighter II were missing, the sprites of Bonanza Bros. on Mega-Tech were garbled)
-* PIC16C5x CPU core: the program counter wraps at the end of the program memory (the 2K parts start at 0x7ff and ran past the ROM), and the save states no longer register the ports and STATUS through a NULL pointer (the save of a game with a PIC crashed); these are in the data RAM, saved with the CPU memory
-* Save states (netplay, RunAhead with a second instance) of the Mega Drive based boards: the Z80 RAM and bus state and the Mega-Tech / Mega Play BIOS registers and RAM are saved (Gunstar Heroes and Mazin Wars Mega Play went out of sync after loading a state in a new instance); the SN76496 PSG is saved, and the YM2612 DAC enable is restored from its own register (0x2b, it was read from 0x2d)
-* Sega System 18 (also Moonwalker): the VDP palette writes no longer overflow the System 16 palette RAM (they corrupted the memory after it, e.g. garbled graphics in Shadow Dancer), and the sprite shadows over the VDP layer no longer index past the palette
-* Save states (RunAhead, netplay) of the Sega System 18 hardware: the RF5C68 PCM, the YM2612/YM3438 envelope, LFO, frequency and timer state, the VDP layer, the sound ROM bank
-* Save states (RunAhead, netplay) of the Sega System 16B hardware: the uPD7759 ADPCM chip, the sound CPU ROM bank, the segaic16 tilemap and sprite banks, flip, scroll latches and display enable
 * Added HD647180 MCU sound support for Fire Shark and Vimana [arcadez]
 * Added sound sample support for Cosmic Alien [BritneysPAIRS, arcadez]
 * Updated sample support for Donkey Kong and Donkey kong JR to MAME87 [BritneysPAIRS, arcadez]
@@ -1285,8 +1183,4 @@ could crash on the score calc between levels is sorted [amadvance, arcadez]
 * Fixed Palette banking problems for Pleiads [MAMEDev, arcadez]
 * Added fixes from later MAME so that Princess Clara Daisakusen now works [MAMEDev, arcadez]
 * Ported a new raiden2.c driver Raiden II Raiden DX and Zero Team etc etc now playable [Salvia, MAMEDev, FBN, vanni and claude, arcadez]
-* Ported the Cave CV1000 driver from current MAME: SH-3 CPU (interpreter and a recompiler with the same results), the blitter, the YMZ770 sound chip, the NAND flash and the RTC9701 [MAMEDev, vanni and claude]
-* Added support for the hvyunit.c driver ported across from my xbox project [arcadez, mistydreams, vanni and claude]
-* Added Sky Robo / Tatakae! Big Fighter to armedf.c and hooked it up to the new mcs51 cpu
-[arcadez, grant2258, AdvanceMAME, Zanac]
-* Ported a driver for Atari's Akka Arrh across from AdvanceMAME [arcadez, AdvanceMAME]
+
@@ -100,9 +100,7 @@ endif
 ifeq ($(platform), unix)
 	TARGET = $(TARGET_NAME)_libretro.so
 	fpic = -fPIC
-	# only the retro_* entry points (RETRO_API) leave the library: the rest is
-	# reached directly instead of through the GOT and PLT
-	CFLAGS += $(fpic) -fvisibility=hidden
+	CFLAGS += $(fpic)
 	LDFLAGS += $(fpic) -shared -Wl,--version-script=link.T

 # Linux Portable
@@ -830,14 +828,6 @@ ifeq (,$(findstring msvc,$(platform)))
 	CFLAGS += -Werror=vla -Werror=declaration-after-statement
 endif

-# no fused multiply-add: a*b+c rounded once (FMA) on AArch64, ARMv7 VFPv4
-# and PowerPC gives other results than x86, where it is rounded twice;
-# with it off the floating point results are the same on every host
-# (netplay between them, save states and RunAhead)
-ifeq (,$(findstring msvc,$(platform)))
-	CFLAGS += -ffp-contract=off
-endif
-
 # Required for RZIP support in cheat.c
 CFLAGS += -DHAVE_ZLIB

@@ -874,24 +864,6 @@ ifeq ($(HAVE_ARMv6),1)
 	CFLAGS += -DHAVE_ARMv6
 endif

-# threads (libretro-common rthreads), as the other libretro cores do (beetle-psx):
-# on by default, off where there is no thread library, and on the MSVC builds
-# (the ST-V threaded video needs MSVC 2015's thread-local storage, the
-# buildbot's MSVC lanes are 2005 and 2010: nothing would use the threads)
-HAVE_THREADS ?= 1
-ifneq (,$(filter $(platform), emscripten linux-portable ngc wii wiiu ps2 ps3 psl1ght psp1 ctr vita))
-	HAVE_THREADS = 0
-endif
-ifneq (,$(findstring msvc,$(platform)))
-	HAVE_THREADS = 0
-endif
-ifeq ($(HAVE_THREADS),1)
-	# pthreads are in the C library on Darwin and Android, Windows uses its own threads
-	ifeq (,$(findstring msvc,$(platform))$(findstring android,$(platform))$(findstring ios,$(platform))$(findstring tvos,$(platform))$(filter osx win,$(platform)))
-		LIBS += -lpthread
-	endif
-endif
-
 # include the various .mak files
 ifneq (,$(filter $(INCLUDE_DRV),all))
 	include Makefile.common
@@ -976,18 +948,3 @@ ifeq ($(SPLIT_UP_LINK), 1)
 	@rm $@.in
 endif
 	$(HIDE)rm -f $(OBJECTS) $(TARGET)
-# 1. Map object files to dependency trackers
-DEPFILES := $(OBJECTS:.o=.d)
-
-# 2. ONLY read or handle dependencies if we are NOT running a clean command
-ifneq ($(MAKECMDGOALS),clean)
-include $(DEPFILES)
-
-# 3. FIXED: Generate a pure, clean dependency file directly using the -MM flag
-%.d: %.c
-	@echo "Generating dependency tracker for $<..."
-	$(HIDE)$(CC) -MM -MP -MT $(@:.d=.o) -MF $@ $< $(CFLAGS)
-
-# 4. Fallback stub to prevent build errors if a header file is deleted
-$(DEPFILES):
-endif
@@ -69,7 +69,6 @@ SOURCES_C += \

 SOURCES_C += \
 	$(CORE_DIR)/machine/fd1089.c \
-	$(CORE_DIR)/machine/fd1094.c \
 	$(CORE_DIR)/machine/6522via.c \
 	$(CORE_DIR)/machine/6532riot.c \
 	$(CORE_DIR)/machine/6821pia.c \
@@ -80,9 +79,6 @@ SOURCES_C += \
 	$(CORE_DIR)/machine/8255ppi.c \
 	$(CORE_DIR)/machine/eeprom.c \
 	$(CORE_DIR)/machine/idectrl.c \
-	$(CORE_DIR)/machine/intelfsh.c \
-	$(CORE_DIR)/machine/ds2404.c \
-	$(CORE_DIR)/machine/ataflash.c \
 	$(CORE_DIR)/machine/mathbox.c \
 	$(CORE_DIR)/machine/mb87078.c \
 	$(CORE_DIR)/machine/random.c \
@@ -131,7 +127,6 @@ CPUS+=I186@
 CPUS+=V20@
 CPUS+=V30@
 CPUS+=V33@
-CPUS+=V25@
 CPUS+=V60@
 CPUS+=V70@
 CPUS+=I8035@
@@ -172,7 +167,6 @@ CPUS+=TMS9995@
 CPUS+=Z8000@
 CPUS+=TMS32010@
 CPUS+=TMS32025@
-CPUS+=NAMCOC71@
 CPUS+=TMS32031@
 CPUS+=I960@
 CPUS+=MB86233@
@@ -187,7 +181,6 @@ CPUS+=ADSP2115@
 CPUS+=ADSP2181@
 CPUS+=PSXCPU@
 CPUS+=H83002@
-CPUS+=I386@
 CPUS+=MN10200@
 CPUS+=M37702@
 CPUS+=ASAP@
@@ -200,7 +193,6 @@ CPUS+=R3000@
 CPUS+=R4600@
 CPUS+=R5000@
 CPUS+=SH2@
-CPUS+=SH3@
 CPUS+=DSP32C@
 #CPUS+=PIC16C54@
 CPUS+=PIC16C55@
@@ -500,7 +492,7 @@ SOURCES_C += \
 	$(CORE_DIR)/vidhrdw/mitchell_vidhrdw.c $(CORE_DIR)/drivers/mitchell.c \
 	$(CORE_DIR)/vidhrdw/cbasebal_vidhrdw.c $(CORE_DIR)/drivers/cbasebal.c \
 	$(CORE_DIR)/vidhrdw/cps1_vidhrdw.c $(CORE_DIR)/drivers/cps1.c $(CORE_DIR)/drivers/cps2.c $(CORE_DIR)/machine/cps2crypt.c\
-	$(CORE_DIR)/drivers/zn.c $(CORE_DIR)/sndhrdw/acclaim_rax.c $(CORE_DIR)/sndhrdw/taitozoom.c $(CORE_DIR)/sound/zsg2.c $(CORE_DIR)/cpu/tms57002/tms57002.c \
+	$(CORE_DIR)/drivers/zn.c $(CORE_DIR)/sndhrdw/taitozoom.c $(CORE_DIR)/sound/zsg2.c $(CORE_DIR)/cpu/tms57002/tms57002.c \
 	$(CORE_DIR)/drivers/cps3.c $(CORE_DIR)/sndhrdw/cps3_sndhrdw.c \
 	$(CORE_DIR)/vidhrdw/tms34061_vidhrdw.c \
 	$(CORE_DIR)/machine/capbowl_machine.c $(CORE_DIR)/vidhrdw/capbowl_vidhrdw.c $(CORE_DIR)/drivers/capbowl.c \
@@ -530,10 +522,10 @@ SOURCES_C += \
 	$(CORE_DIR)/drivers/system24.c $(CORE_DIR)/machine/system24_machine.c $(CORE_DIR)/vidhrdw/system24_vidhrdw.c \
 	$(CORE_DIR)/vidhrdw/segaic24.c $(CORE_DIR)/vidhrdw/segas18.c \
 	$(CORE_DIR)/drivers/segas32.c $(CORE_DIR)/machine/segas32.c $(CORE_DIR)/vidhrdw/segas32.c \
-	$(CORE_DIR)/vidhrdw/segavdp.c $(CORE_DIR)/vidhrdw/segac2_vidhrdw.c $(CORE_DIR)/machine/megadriv.c $(CORE_DIR)/drivers/segac2.c $(CORE_DIR)/drivers/megaplay.c $(CORE_DIR)/drivers/megatech.c $(CORE_DIR)/drivers/megadriv_acbl.c $(CORE_DIR)/drivers/megadriv_ybox.c $(CORE_DIR)/drivers/megadriv_sunmix.c \
+	$(CORE_DIR)/vidhrdw/segac2_vidhrdw.c $(CORE_DIR)/drivers/segac2.c \
 	$(CORE_DIR)/drivers/stv.c $(CORE_DIR)/drivers/stvhacks.c $(CORE_DIR)/machine/stvcd.c \
 	$(CORE_DIR)/machine/scudsp.c \
-	$(CORE_DIR)/vidhrdw/stvvid.c \
+	$(CORE_DIR)/vidhrdw/stvvdp1_vidhrdw.c $(CORE_DIR)/vidhrdw/stvvdp2_vidhrdw.c \
 	$(CORE_DIR)/vidhrdw/deniam_vidhrdw.c $(CORE_DIR)/drivers/deniam.c \
 	$(CORE_DIR)/machine/btime_machine.c $(CORE_DIR)/vidhrdw/btime_vidhrdw.c $(CORE_DIR)/drivers/btime.c \
 	$(CORE_DIR)/machine/decocass_machine.c $(CORE_DIR)/vidhrdw/decocass_vidhrdw.c $(CORE_DIR)/drivers/decocass.c \
@@ -825,7 +817,6 @@ SOURCES_C += \
 	$(CORE_DIR)/vidhrdw/raiden_vidhrdw.c $(CORE_DIR)/drivers/raiden.c $(CORE_DIR)/drivers/raiden2.c \
 	$(CORE_DIR)/vidhrdw/dcon_vidhrdw.c $(CORE_DIR)/drivers/dcon.c \
 	$(CORE_DIR)/vidhrdw/sengokmj_vidhrdw.c $(CORE_DIR)/drivers/sengokmj.c \
-	$(CORE_DIR)/machine/seibuspi_machine.c $(CORE_DIR)/vidhrdw/seibuspi_vidhrdw.c $(CORE_DIR)/drivers/seibuspi.c \
 	$(CORE_DIR)/sndhrdw/t5182.c \
 	$(CORE_DIR)/vidhrdw/mustache_vidhrdw.c $(CORE_DIR)/drivers/mustache.c \
 	$(CORE_DIR)/vidhrdw/darkmist_vidhrdw.c $(CORE_DIR)/drivers/darkmist.c \
@@ -1065,15 +1056,11 @@ SOURCES_C += \
 	$(CORE_DIR)/machine/model1_machine.c $(CORE_DIR)/vidhrdw/model1_vidhrdw.c $(CORE_DIR)/drivers/model1.c \
 	$(CORE_DIR)/machine/model2_machine.c $(CORE_DIR)/vidhrdw/model2_vidhrdw.c $(CORE_DIR)/drivers/model2.c \
 	$(CORE_DIR)/sndhrdw/segadsb.c $(CORE_DIR)/sound/mpeg_audio.c \
-	$(CORE_DIR)/drivers/cv1k.c $(CORE_DIR)/vidhrdw/cv1k_vidhrdw.c $(CORE_DIR)/sound/ymz770.c \
 	$(CORE_DIR)/machine/sega315_5881.c $(CORE_DIR)/machine/sega315_5838.c \
 	$(CORE_DIR)/drivers/calorie.c \
-    $(CORE_DIR)/drivers/hvyunit.c \
-    $(CORE_DIR)/drivers/akkaarrh.c \
 	$(CORE_DIR)/machine/mc8123.c \
 	$(CORE_DIR)/machine/namcoio_machine.c \
-	$(CORE_DIR)/drivers/tatsumi.c $(CORE_DIR)/vidhrdw/tatsumi.c $(CORE_DIR)/machine/tatsumi.c \
-	$(CORE_DIR)/drivers/tx1.c $(CORE_DIR)/vidhrdw/tx1_vidhrdw.c $(CORE_DIR)/machine/tx1_machine.c $(CORE_DIR)/sndhrdw/tx1_sndhrdw.c
+	$(CORE_DIR)/drivers/tatsumi.c $(CORE_DIR)/vidhrdw/tatsumi.c $(CORE_DIR)/machine/tatsumi.c



@@ -1384,15 +1371,6 @@ else
 CPUDEFS += -DHAS_V33=0
 endif

-CPU=$(strip $(findstring V25@,$(CPUS)))
-ifneq ($(CPU),)
-OBJDIRS += $(CORE_DIR)/cpu/nec
-CPUDEFS += -DHAS_V25=1
-SOURCES_C += $(CORE_DIR)/cpu/nec/v25.c
-else
-CPUDEFS += -DHAS_V25=0
-endif
-
 ifeq ($(HAS_V30),1)
 SOURCES_C += $(CORE_DIR)/cpu/nec/nec.c
 ifeq ($(DEBUGGER),1)
@@ -1867,15 +1845,6 @@ else
 CPUDEFS += -DHAS_TMS32010=0
 endif

-CPU=$(strip $(findstring NAMCOC71@,$(CPUS)))
-ifneq ($(CPU),)
-OBJDIRS += $(CORE_DIR)/cpu/namcoc71
-CPUDEFS += -DHAS_NAMCOC71=1
-SOURCES_C += $(CORE_DIR)/cpu/namcoc71/c71.c
-else
-CPUDEFS += -DHAS_NAMCOC71=0
-endif
-
 CPU=$(strip $(findstring TMS32025@,$(CPUS)))
 ifneq ($(CPU),)
 OBJDIRS += $(CORE_DIR)/cpu/tms32025
@@ -1970,15 +1939,6 @@ else
 CPUDEFS += -DHAS_H83002=0
 endif

-CPU=$(strip $(findstring I386@,$(CPUS)))
-ifneq ($(CPU),)
-OBJDIRS += $(CORE_DIR)/cpu/i386
-CPUDEFS += -DHAS_I386=1
-SOURCES_C += $(CORE_DIR)/cpu/i386/i386.c
-else
-CPUDEFS += -DHAS_I386=0
-endif
-
 CPU=$(strip $(findstring MN10200@,$(CPUS)))
 ifneq ($(CPU),)
 OBJDIRS += $(CORE_DIR)/cpu/mn10200
@@ -2119,15 +2079,6 @@ else
 CPUDEFS += -DHAS_SH2=0
 endif

-CPU=$(strip $(findstring SH3@,$(CPUS)))
-ifneq ($(CPU),)
-OBJDIRS += $(CORE_DIR)/cpu/sh3
-CPUDEFS += -DHAS_SH3=1
-SOURCES_C += $(CORE_DIR)/cpu/sh3/sh3.c
-else
-CPUDEFS += -DHAS_SH3=0
-endif
-
 CPU=$(strip $(findstring DSP32C@,$(CPUS)))
 ifneq ($(CPU),)
 OBJDIRS += $(CORE_DIR)/cpu/dsp32
@@ -2863,12 +2814,6 @@ SOURCES_C += \
 # sljit: run-time code generator of the MIPS recompilers (empty where they are not supported)
 SOURCES_C += $(CORE_DIR)/lib/sljit/sljit_mame.c

-# threads (libretro-common rthreads, set by the platform: see Makefile): the ST-V threaded video option
-ifeq ($(HAVE_THREADS),1)
-COREDEFINES += -DHAVE_THREADS
-SOURCES_C += $(LIBRETRO_COMM_DIR)/rthreads/rthreads.c
-endif
-
 ifeq ($(STATIC_LINKING),1)
 else
 SOURCES_C += \
@@ -69,7 +69,6 @@ SOURCES_C += \

 SOURCES_C += \
 	$(CORE_DIR)/machine/fd1089.c \
-	$(CORE_DIR)/machine/fd1094.c \
 	$(CORE_DIR)/machine/6522via.c \
 	$(CORE_DIR)/machine/6532riot.c \
 	$(CORE_DIR)/machine/6821pia.c \
@@ -1338,15 +1337,6 @@ else
 CPUDEFS += -DHAS_V33=0
 endif

-CPU=$(strip $(findstring V25@,$(CPUS)))
-ifneq ($(CPU),)
-OBJDIRS += $(CORE_DIR)/cpu/nec
-CPUDEFS += -DHAS_V25=1
-SOURCES_C += $(CORE_DIR)/cpu/nec/v25.c
-else
-CPUDEFS += -DHAS_V25=0
-endif
-
 ifeq ($(HAS_V30),1)
 SOURCES_C += $(CORE_DIR)/cpu/nec/nec.c
 ifeq ($(DEBUGGER),1)
@@ -1821,15 +1811,6 @@ else
 CPUDEFS += -DHAS_TMS32010=0
 endif

-CPU=$(strip $(findstring NAMCOC71@,$(CPUS)))
-ifneq ($(CPU),)
-OBJDIRS += $(CORE_DIR)/cpu/namcoc71
-CPUDEFS += -DHAS_NAMCOC71=1
-SOURCES_C += $(CORE_DIR)/cpu/namcoc71/c71.c
-else
-CPUDEFS += -DHAS_NAMCOC71=0
-endif
-
 CPU=$(strip $(findstring TMS32025@,$(CPUS)))
 ifneq ($(CPU),)
 OBJDIRS += $(CORE_DIR)/cpu/tms32025
@@ -1,119 +0,0 @@
-# Cave CV1000: how the driver works and where it differs from MAME
-
-Sets (MAME's list without the touch screen mahjong game `mmmbanc`):
-
-| Board | Sets |
-|---|---|
-| CV1000-B (8 MB RAM) | `mushisam`, `mushisama`, `mushisamb`, `ibara`, `ibarao`, `ibarablk`, `ibarablka`, `espgal2`, `espgal2a`, `espgal2b`, `mushitam`, `mushitama`, `pinkswts`, `pinkswtsa`, `pinkswtsb`, `pinkswtsx`, `pinkswtssc`, `futari15`, `futari15a`, `futari10`, `futaribl`, `futariblj`, `mmpork`, `deathsml` |
-| CV1000-D (16 MB RAM) | `dsmbl`, `ddpdfk`, `ddpdfk10`, `dfkbl` |
-
-`futaribl` is the World / English set; the others are Japanese.
-
-Files:
-
- `src/cpu/sh3/sh3.c`: the SH-3 (SH7709S) CPU and its peripherals.
- `src/cpu/sh3/sh3jit.c`: the SH-3 recompiler, included by `sh3.c`.
- `src/drivers/cv1k.c`: memory maps, NAND flash, RTC9701, inputs, sets.
- `src/vidhrdw/cv1k_vidhrdw.c`: the blitter (Cave's EPIC12 FPGA).
- `src/sound/ymz770.c`: the Yamaha YMZ770 ("AMM"), on `src/sound/mpeg_audio.c`.
-
-All are C89 ports of current MAME (`sh.cpp`, `sh3comn.cpp`, `sh4*.cpp`,
-`cv1k.cpp`, `epic12*.cpp`, `ymz770.cpp`).
-
-## The board
-
- Hitachi SH7709S, an SH-3 at 102.4 MHz, big-endian, no FPU. The boot code
-  copies the game from the NAND flash to work RAM and runs it from there.
- The blitter: copies sprites from an 8192 x 4096 VRAM to the screen with
-  flips, tint, transparency and 8 source and 8 destination blend modes, and
-  uploads graphics to VRAM. The games wait on it.
- The YMZ770: 16 channels of compressed audio from two 4 MB flash chips,
-  and a sequencer.
- 128 MB NAND flash with the graphics and data, a NOR flash with the boot
-  code, the RTC9701 with its EEPROM (settings and high scores).
-
-## CPU
-
-The interpreter follows current MAME's SH-3 instruction by instruction,
-with the cycle counts of MAME's recompiler (MAME only runs the SH-3 with its
-recompiler) and MAME's SH7709S cache and bus timing model: every data access
-goes through a model of the 16 KB cache, the write-back, the burst fills and
-the wait states of each bus area. The games' speed (and their slowdowns)
-depends on it.
-
-Peripherals: the interrupt controller, the three timers (TMU), the DMA
-controller (the transfer at once, the end interrupt after the transfer
-time, as MAME), the I/O ports (inputs, NAND control, RTC serial line), the
-cache address array. The timers run on the machine time, as in MAME.
-
-## Recompiler
-
-Core option "SH-3 Dynarec" (enabled by default; offered for these games
-only, on the hosts where it runs: x86, x86-64, ARMv7, AArch64, except the
-systems that forbid run-time code generation). Big-endian hosts use the
-interpreter.
-
-It gives the same results as the interpreter, cycle for cycle: a saved
-state is the same with and without it, so netplay, save states and RunAhead
-don't depend on it.
-
- Straight runs of instructions, up to an unconditional branch and its
-  delay slot, become native code (sljit, as the MIPS and ADSP recompilers
-  of this core). Conditional branches leave the block or loop inside it.
- The timeslice is checked before every instruction, as the interpreter's
-  loop does; the cycles are taken in the interpreter's order around the
-  memory accesses and the bus timing.
- Loads and stores compute their address natively and call the
-  interpreter's accessors (memory handlers, cache and bus timing). The
-  instructions without native code call the interpreter for that
-  instruction.
- The block leaves when an interrupt becomes pending or a write touches
-  translated code. Writes over translated code (CPU stores, DMA) and state
-  loads flush the translations.
-
-## Speedups
-
-As in MAME, each game has an idle loop speedup: the read of the variable the
-game polls in its wait loop skips 10 us of CPU time. The loop reads it in
-the delay slot of its branch; MAME's recompiler reports there the PC it
-stored two bytes after the loop start, so it skips on every pass; this
-driver does the same with the delay slot's own PC.
-
-MAME suspends the CPU for those 10 us. This core's scheduler doesn't give
-the time back to a CPU resumed in the timeslice that suspended it, so the
-CPU would fall further behind on every pass: the 10 us are eaten from the
-timeslice instead (1024 cycles), with the same effect.
-
-## Video
-
-The VRAM is kept as 16-bit pixels (the 5-5-5 colour and the transparency
-bit), 64 MB instead of MAME's 128 MB of 32-bit pixels; the blits work on
-the same values as MAME's. The blitter runs at once when started, and is
-busy for the time MAME computes for that blit (the games read the busy
-flag). MAME can run it in a separate thread; this core doesn't.
-
-## Sound
-
-The YMZ770 decodes MAME's AMM variant of MPEG audio, added to
-`mpeg_audio.c` next to layers I and II (used by the Sega DSB), which are
-unchanged.
-
-## NAND flash, RTC, NVRAM
-
- The NAND is read with its spare area and bad block table through the
-  flash interface and port E (busy for 25 us after a page read).
- The RTC9701 is set from the host clock at start, as MAME does.
- NVRAM: the RTC EEPROM, and the NAND blocks the game erased or programmed
-  (only those, not the 128 MB).
-
-## Save states
-
-Every part has its state saved (CPU, peripherals, cache model, blitter
-and VRAM, YMZ770, NAND, RTC). A state is about 77 MB with the VRAM (85 MB on
-CV1000-D). Tested: a save and load on every frame (RunAhead-like) gives the
-same frames, audio and state as a run without them.
-
-## Not done
-
- `mmmbanc` (Medal Mahjong Moukari Bancho), a touch screen game.
- Akai Katana and DoDonPachi SaiDaiOuJou: commented out in MAME too.
@@ -153,22 +153,6 @@ in ROM, so the interrupt was lost and the main loop waited for the timer
 forever (black screen after "STAND ALONE"). With 32 bytes the commands fit
 and the game plays.

-**The MIDI interrupt.** The sound program reads one byte from the queue per
-MIDI interrupt (level 3 on these boards). The interrupt is now dropped when
-the program reads the byte, and raised again only while the queue still has
-bytes, as in current MAME. Before, it could stay raised on an empty queue:
-the sound program then took it again and read a stale byte as part of a
-command. This corrupted the music commands of Dead or Alive (61 extra reads
-in the attract mode) and Manx TT (189), whose music then played wrong or
-stopped. The SCSP timers are now real timers, as in MAME, and each interrupt
-source has its own level, which stays raised until the program acknowledges
-it.
-
-**How it was checked.** Each sound command the i960 sends is read once, with
-no extra reads, in `doa`, `fvipers`, `hotd`, `manxtt`, `rchase2`, `srallyc`
-and `vf2`. In Dead or Alive the sound commands and every slot register write
-between 15 and 25 s of the attract mode are the same as in MAME 0.264.
-
 ## Rail Chase 2: mirrored sample ROMs

 Sets: `rchase2`.
@@ -3,9 +3,6 @@ LOCAL_PATH := $(call my-dir)
 ROOT_DIR := $(LOCAL_PATH)/..
 CORE_DIR := $(ROOT_DIR)/src

-# threads: in bionic's C library
-HAVE_THREADS := 1
-
 include $(ROOT_DIR)/Makefile.common

 COREFLAGS := $(DEFS) $(COREDEFINES) $(CPUDEFS) $(SOUNDDEFS) $(ASMDEFS) $(DBGDEFS) -ffast-math -funroll-loops -DANDROID -DHAVE_ZLIB $(INCFLAGS)
@@ -34,34 +34,6 @@
 3stooges=Shooter / Field
 3wonders=MultiGame / Compilation
 3wonderu=MultiGame / Compilation
-ddpdfk=Shooter / Flying Vertical
-ddpdfk10=Shooter / Flying Vertical
-deathsml=Shooter / Flying Horizontal
-dfkbl=Shooter / Flying Vertical
-dsmbl=Shooter / Flying Horizontal
-espgal2=Shooter / Flying Vertical
-espgal2a=Shooter / Flying Vertical
-espgal2b=Shooter / Flying Vertical
-futari10=Shooter / Flying Vertical
-futari15=Shooter / Flying Vertical
-futari15a=Shooter / Flying Vertical
-futaribl=Shooter / Flying Vertical
-futariblj=Shooter / Flying Vertical
-ibara=Shooter / Flying Vertical
-ibarablk=Shooter / Flying Vertical
-ibarablka=Shooter / Flying Vertical
-ibarao=Shooter / Flying Vertical
-mmpork=Shooter / Flying Vertical
-mushisam=Shooter / Flying Vertical
-mushisama=Shooter / Flying Vertical
-mushisamb=Shooter / Flying Vertical
-mushitam=Puzzle / Drop
-mushitama=Puzzle / Drop
-pinkswts=Shooter / Flying Vertical
-pinkswtsa=Shooter / Flying Vertical
-pinkswtsb=Shooter / Flying Vertical
-pinkswtssc=Shooter / Flying Vertical
-pinkswtsx=Shooter / Flying Vertical
 wonder3=MultiGame / Compilation
 40love=Sports / Tennis
 4dwarrio=Shooter / Flying Horizontal
@@ -259,12 +231,7 @@ asteroib=Shooter / Field
 astinvad=Shooter / Gallery
 kamikaze=Shooter / Gallery
 astorm=Platform / Shooter Scrolling
-astorm3=Platform / Shooter Scrolling
-astorm3d=Platform / Shooter Scrolling
-astormj=Platform / Shooter Scrolling
-astormjd=Platform / Shooter Scrolling
-astormu=Platform / Shooter Scrolling
-astormud=Platform / Shooter Scrolling
+astorm2p=Platform / Shooter Scrolling
 astormbl=Platform / Shooter Scrolling
 astrass=Fighter / Versus
 astrob=Shooter / Gallery
@@ -279,9 +246,6 @@ lordofk=Platform / Fighter Scrolling
 asuka=Shooter / Flying Vertical
 asurabld=Fighter / Versus
 asurabus=Fighter / Versus
-asurabusj=Fighter / Versus
-asurabusja=Fighter / Versus
-asurabusjr=Fighter / Versus
 asylum=Shooter / Walking
 atarifb=Sports / Football
 atarifb1=Sports / Football
@@ -365,10 +329,7 @@ batrider=Shooter / Flying Vertical
 batridra=Shooter / Flying Vertical
 batridrk=Shooter / Flying Vertical
 batsugun=Shooter / Flying Vertical
-batsuguna=Shooter / Flying Vertical
-batsugunc=Shooter / Flying Vertical
-batsugunb=Shooter / Flying Vertical
-batsugunsp=Shooter / Flying Vertical
+batugnsp=Shooter / Flying Vertical
 battlane=Shooter / Driving Vertical
 battlan2=Shooter / Driving Vertical
 battlan3=Shooter / Driving Vertical
@@ -492,8 +453,6 @@ bloods21=Fighter / Versus
 bloods22=Fighter / Versus
 bloodwar=Fighter / Versus
 bloxeed=Puzzle / Drop
-bloxeeda=Puzzle / Drop
-bloxeedd=Puzzle / Drop
 bloxeedc=Puzzle / Drop
 blstroid=Shooter / Field
 blsthead=Shooter / Field
@@ -617,9 +576,6 @@ buckrog=Shooter / Flying (chase view)
 buckrogn=Shooter / Flying (chase view)
 bucky=Shooter / Walking
 buckyua=Shooter / Walking
-buggyboy=Driving / Race (chase view)
-buggyboyb=Driving / Race (chase view)
-buggyboyjr=Driving / Race (chase view)
 buggychl=Driving / Race (chase view)
 buggycht=Driving / Race (chase view)
 bulletd=Shooter / Walking
@@ -823,9 +779,6 @@ clowns=Ball & Paddle / Jump and Touch
 clowns1=Ball & Paddle / Jump and Touch
 clshroad=Driving / Race Bike
 cltchitr=Sports / Baseball
-cltchitrd=Sports / Baseball
-cltchitrj=Sports / Baseball
-cltchitrjd=Sports / Baseball
 club90s=Tabletop / Mahjong * Mature *
 club90sa=Tabletop / Mahjong * Mature *
 cluckypo=Casino / Cards
@@ -899,15 +852,10 @@ cosmogng=Shooter / Gallery
 cosmognj=Shooter / Gallery
 cosmos=Shooter / Gallery
 cotton=Shooter / Flying Horizontal
+cottona=Shooter / Flying Horizontal
 cotton2=Shooter / Flying Horizontal
 cottonbm=Shooter / Flying Horizontal
 cottond=Shooter / Flying Horizontal
-cottonj=Shooter / Flying Horizontal
-cottonja=Shooter / Flying Horizontal
-cottonjad=Shooter / Flying Horizontal
-cottonjd=Shooter / Flying Horizontal
-cottonu=Shooter / Flying Horizontal
-cottonud=Shooter / Flying Horizontal
 countrun=Maze / Driving
 countrunb3=Maze / Driving
 countrb2=Maze / Driving
@@ -1083,21 +1031,6 @@ dcon=Shooter / Command
 dday=Shooter / Gallery
 ddayc=Shooter / Gallery
 ddcrew=Fighter / 2.5D
-ddcrew1=Fighter / 2.5D
-ddcrew1d=Fighter / 2.5D
-ddcrew2=Fighter / 2.5D
-ddcrew2d=Fighter / 2.5D
-ddcrewd=Fighter / 2.5D
-ddcrewj=Fighter / 2.5D
-ddcrewj2=Fighter / 2.5D
-ddcrewj2d=Fighter / 2.5D
-ddcrewjd=Fighter / 2.5D
-ddcrewu=Fighter / 2.5D
-ddcrewud=Fighter / 2.5D
-desertbr=Shooter / Walking
-desertbrd=Shooter / Walking
-desertbrj=Shooter / Walking
-desertbrjd=Shooter / Walking
 ddenlovr=Tabletop / Othello - Reversi * Mature *
 ddonpach=Shooter / Flying Vertical
 ddonpacha=Shooter / Flying Vertical
@@ -1258,9 +1191,6 @@ dogfgtj=Shooter / Flying
 dogfight=Shooter / Flying
 dogpatch=Shooter / Versus
 dogyuun=Shooter / Flying Vertical
-dogyuuna=Shooter / Flying Vertical
-dogyuunb=Shooter / Flying Vertical
-dogyuunt=Shooter / Flying Vertical
 dogyuunto=Shooter / Flying Vertical
 dokaben=Sports / Cards
 dokidoki=Platform / Run Jump
@@ -1541,20 +1471,7 @@ countryc=Sports / Golf
 fitegol2=Sports / Golf
 fitfight=Fighter / Versus
 fixeight=Shooter / Walking
-fixeightk=Shooter / Walking
-fixeighth=Shooter / Walking
-fixeighttw=Shooter / Walking
-fixeighta=Shooter / Walking
-fixeightu=Shooter / Walking
-fixeightj=Shooter / Walking
-fixeightt=Shooter / Walking
-fixeightkt=Shooter / Walking
-fixeightht=Shooter / Walking
-fixeighttwt=Shooter / Walking
-fixeightat=Shooter / Walking
-fixeightut=Shooter / Walking
-fixeightjt=Shooter / Walking
-fixeightbl=Shooter / Walking
+fixeighb=Shooter / Walking
 flagrall=Maze / Driving
 flashgal=Fighter / 2D
 flicky=Platform / Run Jump
@@ -2278,8 +2195,6 @@ karnovj=Platform / Shooter Scrolling
 karnovr=Fighter / Versus
 kazan=Platform / Fighter Scrolling
 kbash=Fighter / Versus Co-op
-kbashk=Fighter / Versus Co-op
-kbashp=Fighter / Versus Co-op
 kbash2=Fighter / Versus Co-op
 kchamp=Fighter / Versus
 karatedo=Fighter / Versus
@@ -2479,10 +2394,6 @@ lethalth=Shooter / Flying Vertical
 thndblst=Shooter / Flying Vertical
 levers=Platform / Run Jump
 lghost=Shooter / Gun
-lghostd=Shooter / Gun
-lghostj=Shooter / Gun
-lghostu=Shooter / Gun
-lghostud=Shooter / Gun
 lgtnfght=Shooter / Flying Vertical
 trigon=Shooter / Flying Vertical
 liberate=Shooter / Flying
@@ -2612,7 +2523,6 @@ marineb=Shooter / Flying
 marinedt=Maze / Escape
 mariner=Shooter / Misc. Horizontal
 800fath=Shooter / Misc. Horizontal
-800fatha=Shooter / Misc. Horizontal
 mario=Platform / Run Jump
 marioe=Platform / Run Jump
 mariof=Platform / Run Jump
@@ -2856,12 +2766,11 @@ mouserc=Platform / Run Jump
 mp_bio=Shooter / Flying Horizontal
 mp_col3=Puzzle / Drop
 mp_gaxe2=Fighter / 2.5D
-mp_gaxe2a=Fighter / 2.5D
 mp_shnb3=Platform / Shooter Scrolling
 mp_soni2=Platform / Run, Jump & Scrolling
 mp_sonic=Platform / Run, Jump & Scrolling
 mp_sor2=Fighter / 2.5D
-mp_twcup=Sports / Soccer
+mp_twc=Sports / Soccer
 mpang=Shooter / 3rd Person
 mpanga=Shooter / 3rd Person
 mpangj=Shooter / 3rd Person
@@ -4195,9 +4104,9 @@ shanhigw=Puzzle / Match
 sharkatt=Shooter / Underwater
 sharrier=Shooter / Flying (chase view)
 shdancer=Platform / Fighter Scrolling
-shdancer1=Platform / Fighter Scrolling
-shdancerj=Platform / Fighter Scrolling
 shdancbl=Platform / Fighter Scrolling
+shdancrb=Platform / Fighter Scrolling
+shdancrj=Platform / Fighter Scrolling
 sheriff=Shooter / Field
 bandido=Shooter / Field
 shienryu=Shooter / Flying Vertical
@@ -4983,10 +4892,7 @@ labyrunk=Shooter / Walking
 labyrunr=Shooter / Walking
 triothep=Platform / Fighter Scrolling
 triplep=Maze / Outline
-triplepa=Maze / Outline
 knockout=Maze / Outline
-knockoutb=Maze / Outline
-knockoutc=Maze / Outline
 triplew1=Tabletop / Mahjong * Mature *
 triplew2=Tabletop / Mahjong * Mature *
 triplhnt=Shooter / Gun
@@ -5073,9 +4979,6 @@ twinspri=Shooter / Flying Vertical
 twotiger=Shooter / Field
 twotigra=Shooter / Field
 tws96=Sports / Soccer
-tx1=Driving / Race (chase view)
-tx1jb=Driving / Race (chase view)
-tx1jc=Driving / Race (chase view)
 tylz=Maze / Change Surface
 uballoon=Platform / Run Jump
 uccops=Fighter / 2.5D
@@ -5155,7 +5058,7 @@ venture2=Maze / Shooter Small
 venture4=Maze / Shooter Small
 vf=Fighter / Versus
 vfive=Shooter / Flying Vertical
-grindstma=Shooter / Flying Vertical
+grindsta=Shooter / Flying Vertical
 grindstm=Shooter / Flying Vertical
 vfkids=Fighter / Versus
 vfremix=Fighter / Versus
@@ -5351,11 +5254,6 @@ wschampa=Shooter / Gun
 wseries=Sports / Baseball
 wsf=Sports / Soccer
 wtennis=Sports / Tennis
-wwallyj=Puzzle / Find the Objects
-wwallyja=Puzzle / Find the Objects
-wwallyja3p=Puzzle / Find the Objects
-wwallyjad=Puzzle / Find the Objects
-wwallyjd=Puzzle / Find the Objects
 wwestern=Shooter / Misc. Vertical
 wwester1=Shooter / Misc. Vertical
 wwfmania=Sports / Wrestling
@@ -5721,26 +5721,7 @@ astinvad:0:1F9D:99:000:Infinite Credits
 astinvad:0:1D01:08:000:Infinite Lives
 astinvad:0:1CD8:00:000:Invincibility

-; [ Alien Storm (Japan, 2 Players) ]
-astormj:0:000000:00:999:[Invincibility only works   ]
-astormj:0:000000:00:999:[for the following missions ]
-astormj:0:000000:00:999:[ 1-1, 2-1, 2-3, 3-1, 3-5,  ]
-astormj:0:000000:00:999:[ 3-7, 4-1, 4-5, 5-1, 5-2,  ]
-astormj:0:000000:00:999:[ 5-4, 6-1, 6-2, 6-4, 6-5.  ]
-astormj:0:FFE00D:30:000:Infinite Life PL1
-astormj:0:FFE00E:80:000:Infinite Energy PL1
-astormj:0:FFC061:78:000:Invincibility PL1
-astormj:0:FFE031:00:000:No delay for extra weapon PL1
-astormj:0:FFE08D:30:000:Infinite Life PL2
-astormj:0:FFE08E:80:000:Infinite Energy PL2
-astormj:0:FFC461:78:000:Invincibility PL2
-astormj:0:FFE0B1:00:000:No delay for extra weapon PL2
-astormj:0:FFE10D:30:000:Infinite Life PL3
-astormj:0:FFE10E:80:000:Infinite Energy PL3
-astormj:0:FFC861:78:000:Invincibility PL3
-astormj:0:FFE131:00:000:No delay for extra weapon PL3
-
-; [ Alien Storm (World, 2 Players) ]
+; [ Alien Storm ]
 astorm:0:000000:00:999:[Invincibility only works   ]
 astorm:0:000000:00:999:[for the following missions ]
 astorm:0:000000:00:999:[ 1-1, 2-1, 2-3, 3-1, 3-5,  ]
@@ -5754,6 +5735,25 @@ astorm:0:FFE08D:30:000:Infinite Life PL2
 astorm:0:FFE08E:80:000:Infinite Energy PL2
 astorm:0:FFC461:78:000:Invincibility PL2
 astorm:0:FFE0B1:00:000:No delay for extra weapon PL2
+astorm:0:FFE10D:30:000:Infinite Life PL3
+astorm:0:FFE10E:80:000:Infinite Energy PL3
+astorm:0:FFC861:78:000:Invincibility PL3
+astorm:0:FFE131:00:000:No delay for extra weapon PL3
+
+; [ Alien Storm (2 Player) ]
+astorm2p:0:000000:00:999:[Invincibility only works   ]
+astorm2p:0:000000:00:999:[for the following missions ]
+astorm2p:0:000000:00:999:[ 1-1, 2-1, 2-3, 3-1, 3-5,  ]
+astorm2p:0:000000:00:999:[ 3-7, 4-1, 4-5, 5-1, 5-2,  ]
+astorm2p:0:000000:00:999:[ 5-4, 6-1, 6-2, 6-4, 6-5.  ]
+astorm2p:0:FFE00D:30:000:Infinite Life PL1
+astorm2p:0:FFE00E:80:000:Infinite Energy PL1
+astorm2p:0:FFC061:78:000:Invincibility PL1
+astorm2p:0:FFE031:00:000:No delay for extra weapon PL1
+astorm2p:0:FFE08D:30:000:Infinite Life PL2
+astorm2p:0:FFE08E:80:000:Infinite Energy PL2
+astorm2p:0:FFC461:78:000:Invincibility PL2
+astorm2p:0:FFE0B1:00:000:No delay for extra weapon PL2

 ; [ Alien Storm (bootleg) ]
 astormbl:0:000000:00:999:[Invincibility only works   ]
@@ -7780,34 +7780,6 @@ batsugun:0:1013EB:09:000:Next 'P' always=10000 pts PL2:Get maximum fire power
 batsugun:0:1013EB:09:001:Next 'P' = 10000 pts Now! PL2:Get maximum fire power
 batsugun:0:101456:03:001:Up fire level Now! PL2
 batsugun:0:101457:00:501:Up fire level Now! PL2 (2/2)
-batsuguna:0:10139B:09:000:Infinite Lives PL1
-batsuguna:0:101415:07:000:Infinite Bombs PL1
-batsuguna:0:10141E:01:000:Invincibility PL1
-batsuguna:0:000000:00:999:[See the Dip Switch Menu to ]
-batsuguna:0:000000:00:999:[enable an alternate        ]
-batsuguna:0:000000:00:999:[Invincibility PL1 cheat.   ]
-batsuguna:0:000000:00:999:[But the cheat is better as ]
-batsuguna:0:000000:00:999:[the dipswitch causes a game]
-batsuguna:0:000000:00:999:[crash when PL2 is selected.]
-batsuguna:0:101411:02:000:Always have Max Weapon PL1
-batsuguna:0:101413:04:000:Always have Max Shot PowerPL1
-batsuguna:0:101411:02:001:Get Max Weapon Now! PL1
-batsuguna:0:101413:04:001:Get Max Shot Power Now! PL1
-batsuguna:0:1013E7:09:000:Next 'P' always=10000 pts PL1:Get maximum fire power
-batsuguna:0:1013E7:09:001:Next 'P' = 10000 pts Now! PL1:Get maximum fire power
-batsuguna:0:101416:03:001:Up fire level Now! PL1
-batsuguna:0:101417:00:501:Up fire level Now! PL1 (2/2)
-batsuguna:0:10139D:09:000:Infinite Lives PL2
-batsuguna:0:101455:07:000:Infinite Bombs PL2
-batsuguna:0:10145E:01:000:Invincibility PL2
-batsuguna:0:101451:02:000:Always have Max Weapon PL2
-batsuguna:0:101453:04:000:Always have Max Shot PowerPL2
-batsuguna:0:101451:02:001:Get Max Weapon Now! PL2
-batsuguna:0:101453:04:001:Get Max Shot Power Now! PL2
-batsuguna:0:1013EB:09:000:Next 'P' always=10000 pts PL2:Get maximum fire power
-batsuguna:0:1013EB:09:001:Next 'P' = 10000 pts Now! PL2:Get maximum fire power
-batsuguna:0:101456:03:001:Up fire level Now! PL2
-batsuguna:0:101457:00:501:Up fire level Now! PL2 (2/2)

 ; [ Battle Lane! Vol. 5 (set 2) ]
 battlan2:0:0CDA:03:000:Infinite Lives PL1
@@ -8014,34 +7986,34 @@ battroad:0:0000:00:999:[enable an alternate        ]
 battroad:0:0000:00:999:[Invincibility cheat.       ]

 ; [ Batsugun (Special Ver.) ]
-batsugunsp:0:10139B:09:000:Infinite Lives PL1
-batsugunsp:0:101415:07:000:Infinite Bombs PL1
-batsugunsp:0:10141E:01:000:Invincibility PL1
-batsugunsp:0:000000:00:999:[See the Dip Switch Menu to ]
-batsugunsp:0:000000:00:999:[enable an alternate        ]
-batsugunsp:0:000000:00:999:[Invincibility PL1 cheat.   ]
-batsugunsp:0:000000:00:999:[But the cheat is better as ]
-batsugunsp:0:000000:00:999:[the dipswitch causes a game]
-batsugunsp:0:000000:00:999:[crash when PL2 is selected.]
-batsugunsp:0:101411:02:000:Always have Max Weapon PL1
-batsugunsp:0:101413:04:000:Always have Max Shot PowerPL1
-batsugunsp:0:101411:02:001:Get Max Weapon Now! PL1
-batsugunsp:0:101413:04:001:Get Max Shot Power Now! PL1
-batsugunsp:0:1013E7:09:000:Next 'P' always=10000 pts PL1:Get maximum fire power
-batsugunsp:0:1013E7:09:001:Next 'P' = 10000 pts Now! PL1:Get maximum fire power
-batsugunsp:0:101416:03:001:Up fire level Now! PL1
-batsugunsp:0:101417:00:501:Up fire level Now! PL1 (2/2)
-batsugunsp:0:10139D:09:000:Infinite Lives PL2
-batsugunsp:0:101455:07:000:Infinite Bombs PL2
-batsugunsp:0:10145E:01:000:Invincibility PL2
-batsugunsp:0:101451:02:000:Always have Max Weapon PL2
-batsugunsp:0:101453:04:000:Always have Max Shot PowerPL2
-batsugunsp:0:101451:02:001:Get Max Weapon Now! PL2
-batsugunsp:0:101453:04:001:Get Max Shot Power Now! PL2
-batsugunsp:0:1013EB:09:000:Next 'P' always=10000 pts PL2:Get maximum fire power
-batsugunsp:0:1013EB:09:001:Next 'P' = 10000 pts Now! PL2:Get maximum fire power
-batsugunsp:0:101456:03:001:Up fire level Now! PL2
-batsugunsp:0:101457:00:501:Up fire level Now! PL2 (2/2)
+batugnsp:0:10139B:09:000:Infinite Lives PL1
+batugnsp:0:101415:07:000:Infinite Bombs PL1
+batugnsp:0:10141E:01:000:Invincibility PL1
+batugnsp:0:000000:00:999:[See the Dip Switch Menu to ]
+batugnsp:0:000000:00:999:[enable an alternate        ]
+batugnsp:0:000000:00:999:[Invincibility PL1 cheat.   ]
+batugnsp:0:000000:00:999:[But the cheat is better as ]
+batugnsp:0:000000:00:999:[the dipswitch causes a game]
+batugnsp:0:000000:00:999:[crash when PL2 is selected.]
+batugnsp:0:101411:02:000:Always have Max Weapon PL1
+batugnsp:0:101413:04:000:Always have Max Shot PowerPL1
+batugnsp:0:101411:02:001:Get Max Weapon Now! PL1
+batugnsp:0:101413:04:001:Get Max Shot Power Now! PL1
+batugnsp:0:1013E7:09:000:Next 'P' always=10000 pts PL1:Get maximum fire power
+batugnsp:0:1013E7:09:001:Next 'P' = 10000 pts Now! PL1:Get maximum fire power
+batugnsp:0:101416:03:001:Up fire level Now! PL1
+batugnsp:0:101417:00:501:Up fire level Now! PL1 (2/2)
+batugnsp:0:10139D:09:000:Infinite Lives PL2
+batugnsp:0:101455:07:000:Infinite Bombs PL2
+batugnsp:0:10145E:01:000:Invincibility PL2
+batugnsp:0:101451:02:000:Always have Max Weapon PL2
+batugnsp:0:101453:04:000:Always have Max Shot PowerPL2
+batugnsp:0:101451:02:001:Get Max Weapon Now! PL2
+batugnsp:0:101453:04:001:Get Max Shot Power Now! PL2
+batugnsp:0:1013EB:09:000:Next 'P' always=10000 pts PL2:Get maximum fire power
+batugnsp:0:1013EB:09:001:Next 'P' = 10000 pts Now! PL2:Get maximum fire power
+batugnsp:0:101456:03:001:Up fire level Now! PL2
+batugnsp:0:101457:00:501:Up fire level Now! PL2 (2/2)

 ; [ Battle Wings (alt) ]
 batwings:0:0084:0A:000:Infinite Lives
@@ -15518,6 +15490,16 @@ clshroad:0:81E7:00:500:Infinite Time (3/3)
 clshroad:0:81FD:03:000:Infinite Energy
 clshroad:0:81FE:0E:500:Infinite Energy (2/2)

+; [ Clutch Hitter ]
+cltchitr:0:0000:00:999:[ There are no cheats   ]:REASON 1
+cltchitr:0:0000:00:999:[ for this game as it   ]:REASON 1
+cltchitr:0:0000:00:999:[ didn't work the last  ]:REASON 1
+cltchitr:0:0000:00:999:[ time it was tested.   ]:REASON 1
+cltchitr:0:0000:00:999:[ If the game now works ]:REASON 1
+cltchitr:0:0000:00:999:[ please request cheats ]:REASON 1
+cltchitr:0:0000:00:999:[ for it on the cheat   ]:REASON 1
+cltchitr:0:0000:00:999:[ forums.               ]:REASON 1
+
 ; [ Mahjong CLUB 90's (set 1) (Japan 900919) ]
 club90s:0:F0EF:63:000:Infinite Money
 club90s:0:0000:00:999:[ The winning hand cheat must be      ]
@@ -16578,6 +16560,16 @@ cosmos:0:1D66:01:040:Invincibility:Turn OFF to dock!
 cosmos:0:1CDD:05:000:Infinite Lives PL1
 cosmos:0:1CDE:05:000:Infinite Lives PL2

+; [ Cotton (Japan) ]
+cotton:0:0000:00:999:[ There are no cheats   ]:REASON 1
+cotton:0:0000:00:999:[ for this game as it   ]:REASON 1
+cotton:0:0000:00:999:[ didn't work the last  ]:REASON 1
+cotton:0:0000:00:999:[ time it was tested.   ]:REASON 1
+cotton:0:0000:00:999:[ If the game now works ]:REASON 1
+cotton:0:0000:00:999:[ please request cheats ]:REASON 1
+cotton:0:0000:00:999:[ for it on the cheat   ]:REASON 1
+cotton:0:0000:00:999:[ forums.               ]:REASON 1
+
 ; [ Cotton 2 ]
 cotton2:0:060E518F:06:000:Invincibility PL1
 cotton2:0:060E5DD3:21:000:Maximum Fire Power PL1
@@ -19875,6 +19867,16 @@ ddayjlc:0:0000:00:999:[ please request cheats ]:REASON 1
 ddayjlc:0:0000:00:999:[ for it on the cheat   ]:REASON 1
 ddayjlc:0:0000:00:999:[ forums.               ]:REASON 1

+; [ DD Crew ]
+ddcrew:0:0000:00:999:[ There are no cheats   ]:REASON 1
+ddcrew:0:0000:00:999:[ for this game as it   ]:REASON 1
+ddcrew:0:0000:00:999:[ didn't work the last  ]:REASON 1
+ddcrew:0:0000:00:999:[ time it was tested.   ]:REASON 1
+ddcrew:0:0000:00:999:[ If the game now works ]:REASON 1
+ddcrew:0:0000:00:999:[ please request cheats ]:REASON 1
+ddcrew:0:0000:00:999:[ for it on the cheat   ]:REASON 1
+ddcrew:0:0000:00:999:[ forums.               ]:REASON 1
+
 ; [ Don Den Lover Vol. 1 (Hong Kong) ]
 ddenlovr:0:FF9576:64:000:Infinite Time
 ddenlovr:0:FF959E:03:000:Infinite Help
@@ -40402,27 +40404,27 @@ griffon:0:4BFF:00:000:Infinite Fuel
 griffon:0:0CC4:C9:100:Invincibility

 ; [ Grind Stormer (older set) ]
-grindstma:0:1003B3:09:000:Infinite Credits
-grindstma:0:10063D:0F:000:Infinite Lives
-grindstma:0:10065B:06:000:Infinite Bombs
-grindstma:0:000000:00:999:[ See the Dip Switch Menu to enable ]
-grindstma:0:000000:00:999:[ an Invincibility PL1 cheat. But   ]
-grindstma:0:000000:00:999:[ the dipswitch causes a game crash ]
-grindstma:0:000000:00:999:[ when PL2 is selected.           ]
-grindstma:0:100607:02:000:Always have 4 Side Ships
-grindstma:0:1005E7:B0:000:Always have Shot Side Ships
-grindstma:0:100601:00:500:Always have Shot Side Ships (2/2)
-grindstma:0:1005E7:B4:000:Always have Search Side Ships
-grindstma:0:100601:01:500:Always have Search Side Ships (2/2)
-grindstma:0:1005E7:C4:000:Always have Missile Side Ships
-grindstma:0:100601:02:500:Always have Missile Side Ships (2/2)
-grindstma:0:100607:02:001:Get 4 Side Ships Now!
-grindstma:0:1005E7:B0:001:Get Shot Side Ships Now!
-grindstma:0:100601:00:501:Get Shot Side Ships Now! (2/2)
-grindstma:0:1005E7:B4:001:Get Search Side Ships Now!
-grindstma:0:100601:01:501:Get Search Side Ships Now! (2/2)
-grindstma:0:1005E7:C4:001:Get Missile Side Ships Now!
-grindstma:0:100601:02:501:Get Missile Side Ships Now! (2/2)
+grindsta:0:1003B3:09:000:Infinite Credits
+grindsta:0:10063D:0F:000:Infinite Lives
+grindsta:0:10065B:06:000:Infinite Bombs
+grindsta:0:000000:00:999:[ See the Dip Switch Menu to enable ]
+grindsta:0:000000:00:999:[ an Invincibility PL1 cheat. But   ]
+grindsta:0:000000:00:999:[ the dipswitch causes a game crash ]
+grindsta:0:000000:00:999:[ when PL2 is selected.           ]
+grindsta:0:100607:02:000:Always have 4 Side Ships
+grindsta:0:1005E7:B0:000:Always have Shot Side Ships
+grindsta:0:100601:00:500:Always have Shot Side Ships (2/2)
+grindsta:0:1005E7:B4:000:Always have Search Side Ships
+grindsta:0:100601:01:500:Always have Search Side Ships (2/2)
+grindsta:0:1005E7:C4:000:Always have Missile Side Ships
+grindsta:0:100601:02:500:Always have Missile Side Ships (2/2)
+grindsta:0:100607:02:001:Get 4 Side Ships Now!
+grindsta:0:1005E7:B0:001:Get Shot Side Ships Now!
+grindsta:0:100601:00:501:Get Shot Side Ships Now! (2/2)
+grindsta:0:1005E7:B4:001:Get Search Side Ships Now!
+grindsta:0:100601:01:501:Get Search Side Ships Now! (2/2)
+grindsta:0:1005E7:C4:001:Get Missile Side Ships Now!
+grindsta:0:100601:02:501:Get Missile Side Ships Now! (2/2)

 ; [ Grind Stormer ]
 grindstm:0:1003B3:09:000:Infinite Credits
@@ -59634,6 +59636,16 @@ lethalth:0:E3ADE:03:001:Get Ball Shot Now! PL2
 levers:0:4175:63:000:Infinite Lives PL1
 levers:0:4176:63:000:Infinite Lives PL2

+; [ Laser Ghost ]
+lghost:0:0000:00:999:[ There are no cheats   ]:REASON 1
+lghost:0:0000:00:999:[ for this game as it   ]:REASON 1
+lghost:0:0000:00:999:[ didn't work the last  ]:REASON 1
+lghost:0:0000:00:999:[ time it was tested.   ]:REASON 1
+lghost:0:0000:00:999:[ If the game now works ]:REASON 1
+lghost:0:0000:00:999:[ please request cheats ]:REASON 1
+lghost:0:0000:00:999:[ for it on the cheat   ]:REASON 1
+lghost:0:0000:00:999:[ forums.               ]:REASON 1
+
 ; [ Lightning Fighters (US) ]
 lgtnfght:0:000000:00:999:[Enable invincibility during]
 lgtnfght:0:000000:00:999:[game play ONLY!!           ]
@@ -67321,125 +67333,25 @@ mooncrsu:0:823C:00:001:Finish this Round Now!:Use this with an activation key fo
 ; [ Moon Quasar ]
 moonqsr:0:8087:F8:000:Infinite Fuel

-; [ Michael Jackson's Moonwalker (World) ]
-mwalk:0:FFDA58:03:000:Infinite Lives PL1
-mwalk:0:FFC01C:40:000:Infinite Energy PL1
-mwalk:0:FFDA79:01:000:Infinite Magic PL1
-mwalk:0:FFDA7D:45:000:Invincibility PL1
-mwalk:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
-mwalk:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
-mwalk:0:FFDA98:03:000:Infinite Lives PL2
-mwalk:0:FFC0DC:40:000:Infinite Energy PL2
-mwalk:0:FFDAB9:01:000:Infinite Magic PL2
-mwalk:0:FFDABD:45:000:Invincibility PL2
-mwalk:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
-mwalk:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
-mwalk:0:FFDAD8:03:000:Infinite Lives PL3
-mwalk:0:FFC19C:28:000:Infinite Energy PL3
-mwalk:0:FFDAF9:01:000:Infinite Magic PL3
-mwalk:0:FFDAFD:45:000:Invincibility PL3
-mwalk:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
-mwalk:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
-
-; [ Michael Jackson's Moonwalker (US) ]
-mwalku:0:FFDA58:03:000:Infinite Lives PL1
-mwalku:0:FFC01C:40:000:Infinite Energy PL1
-mwalku:0:FFDA79:01:000:Infinite Magic PL1
-mwalku:0:FFDA7D:45:000:Invincibility PL1
-mwalku:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
-mwalku:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
-mwalku:0:FFDA98:03:000:Infinite Lives PL2
-mwalku:0:FFC0DC:40:000:Infinite Energy PL2
-mwalku:0:FFDAB9:01:000:Infinite Magic PL2
-mwalku:0:FFDABD:45:000:Invincibility PL2
-mwalku:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
-mwalku:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
-mwalku:0:FFDAD8:03:000:Infinite Lives PL3
-mwalku:0:FFC19C:28:000:Infinite Energy PL3
-mwalku:0:FFDAF9:01:000:Infinite Magic PL3
-mwalku:0:FFDAFD:45:000:Invincibility PL3
-mwalku:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
-mwalku:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
-
-; [ Michael Jackson's Moonwalker (Japan) ]
-mwalkj:0:FFDA58:03:000:Infinite Lives PL1
-mwalkj:0:FFC01C:40:000:Infinite Energy PL1
-mwalkj:0:FFDA79:01:000:Infinite Magic PL1
-mwalkj:0:FFDA7D:45:000:Invincibility PL1
-mwalkj:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
-mwalkj:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
-mwalkj:0:FFDA98:03:000:Infinite Lives PL2
-mwalkj:0:FFC0DC:40:000:Infinite Energy PL2
-mwalkj:0:FFDAB9:01:000:Infinite Magic PL2
-mwalkj:0:FFDABD:45:000:Invincibility PL2
-mwalkj:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
-mwalkj:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
-mwalkj:0:FFDAD8:03:000:Infinite Lives PL3
-mwalkj:0:FFC19C:28:000:Infinite Energy PL3
-mwalkj:0:FFDAF9:01:000:Infinite Magic PL3
-mwalkj:0:FFDAFD:45:000:Invincibility PL3
-mwalkj:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
-mwalkj:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
-
-; [ Michael Jackson's Moonwalker (World, bootleg of FD1094/8751 317-0159 set) ]
-mwalkd:0:FFDA58:03:000:Infinite Lives PL1
-mwalkd:0:FFC01C:40:000:Infinite Energy PL1
-mwalkd:0:FFDA79:01:000:Infinite Magic PL1
-mwalkd:0:FFDA7D:45:000:Invincibility PL1
-mwalkd:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
-mwalkd:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
-mwalkd:0:FFDA98:03:000:Infinite Lives PL2
-mwalkd:0:FFC0DC:40:000:Infinite Energy PL2
-mwalkd:0:FFDAB9:01:000:Infinite Magic PL2
-mwalkd:0:FFDABD:45:000:Invincibility PL2
-mwalkd:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
-mwalkd:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
-mwalkd:0:FFDAD8:03:000:Infinite Lives PL3
-mwalkd:0:FFC19C:28:000:Infinite Energy PL3
-mwalkd:0:FFDAF9:01:000:Infinite Magic PL3
-mwalkd:0:FFDAFD:45:000:Invincibility PL3
-mwalkd:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
-mwalkd:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
-
-; [ Michael Jackson's Moonwalker (US, bootleg of FD1094/8751 317-0158 set) ]
-mwalkud:0:FFDA58:03:000:Infinite Lives PL1
-mwalkud:0:FFC01C:40:000:Infinite Energy PL1
-mwalkud:0:FFDA79:01:000:Infinite Magic PL1
-mwalkud:0:FFDA7D:45:000:Invincibility PL1
-mwalkud:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
-mwalkud:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
-mwalkud:0:FFDA98:03:000:Infinite Lives PL2
-mwalkud:0:FFC0DC:40:000:Infinite Energy PL2
-mwalkud:0:FFDAB9:01:000:Infinite Magic PL2
-mwalkud:0:FFDABD:45:000:Invincibility PL2
-mwalkud:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
-mwalkud:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
-mwalkud:0:FFDAD8:03:000:Infinite Lives PL3
-mwalkud:0:FFC19C:28:000:Infinite Energy PL3
-mwalkud:0:FFDAF9:01:000:Infinite Magic PL3
-mwalkud:0:FFDAFD:45:000:Invincibility PL3
-mwalkud:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
-mwalkud:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
-
-; [ Michael Jackson's Moonwalker (Japan, bootleg of FD1094/8751 317-0157 set) ]
-mwalkjd:0:FFDA58:03:000:Infinite Lives PL1
-mwalkjd:0:FFC01C:40:000:Infinite Energy PL1
-mwalkjd:0:FFDA79:01:000:Infinite Magic PL1
-mwalkjd:0:FFDA7D:45:000:Invincibility PL1
-mwalkjd:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
-mwalkjd:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
-mwalkjd:0:FFDA98:03:000:Infinite Lives PL2
-mwalkjd:0:FFC0DC:40:000:Infinite Energy PL2
-mwalkjd:0:FFDAB9:01:000:Infinite Magic PL2
-mwalkjd:0:FFDABD:45:000:Invincibility PL2
-mwalkjd:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
-mwalkjd:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
-mwalkjd:0:FFDAD8:03:000:Infinite Lives PL3
-mwalkjd:0:FFC19C:28:000:Infinite Energy PL3
-mwalkjd:0:FFDAF9:01:000:Infinite Magic PL3
-mwalkjd:0:FFDAFD:45:000:Invincibility PL3
-mwalkjd:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
-mwalkjd:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
+; [ Michael Jackson's Moonwalker (Set 1) ]
+moonwalk:0:FFDA58:03:000:Infinite Lives PL1
+moonwalk:0:FFC01C:40:000:Infinite Energy PL1
+moonwalk:0:FFDA79:01:000:Infinite Magic PL1
+moonwalk:0:FFDA7D:45:000:Invincibility PL1
+moonwalk:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
+moonwalk:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
+moonwalk:0:FFDA98:03:000:Infinite Lives PL2
+moonwalk:0:FFC0DC:40:000:Infinite Energy PL2
+moonwalk:0:FFDAB9:01:000:Infinite Magic PL2
+moonwalk:0:FFDABD:45:000:Invincibility PL2
+moonwalk:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
+moonwalk:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
+moonwalk:0:FFDAD8:03:000:Infinite Lives PL3
+moonwalk:0:FFC19C:28:000:Infinite Energy PL3
+moonwalk:0:FFDAF9:01:000:Infinite Magic PL3
+moonwalk:0:FFDAFD:45:000:Invincibility PL3
+moonwalk:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
+moonwalk:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy

 ; [ Moonwar ]
 moonwar:0:8744:09:000:Infinite Lives
@@ -67451,6 +67363,26 @@ moonwara:0:8744:09:000:Infinite Lives
 moonwara:0:8758:99:000:Infinite Fuel
 moonwara:0:875A:99:000:Infinite Shields

+; [ Michael Jackson's Moonwalker (Set 2) ]
+moonwlka:0:FFDA58:03:000:Infinite Lives PL1
+moonwlka:0:FFC01C:40:000:Infinite Energy PL1
+moonwlka:0:FFDA79:01:000:Infinite Magic PL1
+moonwlka:0:FFDA7D:45:000:Invincibility PL1
+moonwlka:0:FFC04C:04:000:Always Robot PL1:Best enabled on title screen
+moonwlka:0:FFC04C:04:001:Become Robot Now! PL1:Buggy
+moonwlka:0:FFDA98:03:000:Infinite Lives PL2
+moonwlka:0:FFC0DC:40:000:Infinite Energy PL2
+moonwlka:0:FFDAB9:01:000:Infinite Magic PL2
+moonwlka:0:FFDABD:45:000:Invincibility PL2
+moonwlka:0:FFC10C:04:000:Always Robot PL2:Best enabled on title screen
+moonwlka:0:FFC10C:04:001:Become Robot Now! PL2:Buggy
+moonwlka:0:FFDAD8:03:000:Infinite Lives PL3
+moonwlka:0:FFC19C:28:000:Infinite Energy PL3
+moonwlka:0:FFDAF9:01:000:Infinite Magic PL3
+moonwlka:0:FFDAFD:45:000:Invincibility PL3
+moonwlka:0:FFC1CC:04:000:Always Robot PL3:Best enabled on title screen
+moonwlka:0:FFC1CC:04:001:Become Robot Now! PL3:Buggy
+
 ; [ Michael Jackson's Moonwalker (bootleg) ]
 moonwlkb:0:FFDA58:03:000:Infinite Lives PL1
 moonwlkb:0:FFC01C:40:000:Infinite Energy PL1
@@ -114004,7 +113936,7 @@ shdancbl:0:FFC490:01:001:Get the Power-up gun Now!
 shdancbl:0:FFEB0A:9A:000:Infinite Lives PL1
 shdancbl:0:FFEB8A:9A:000:Infinite Lives PL2

-; [ Shadow Dancer (World) ]
+; [ Shadow Dancer (US) ]
 shdancer:0:FFC407:59:000:Infinite Time
 shdancer:0:FFC41F:09:000:Infinite Magic
 shdancer:0:FFC490:00:000:Always have the Normal gun
@@ -114014,25 +113946,25 @@ shdancer:0:FFC490:01:001:Get the Power-up gun Now!
 shdancer:0:FFEB0A:9A:000:Infinite Lives PL1
 shdancer:0:FFEB8A:9A:000:Infinite Lives PL2

-; [ Shadow Dancer (US) ]
-shdancer1:0:FFC407:59:000:Infinite Time
-shdancer1:0:FFC41F:09:000:Infinite Magic
-shdancer1:0:FFC490:00:000:Always have the Normal gun
-shdancer1:0:FFC490:01:000:Always have the Power-up gun
-shdancer1:0:FFC490:00:001:Get the Normal gun Now!
-shdancer1:0:FFC490:01:001:Get the Power-up gun Now!
-shdancer1:0:FFEB0A:9A:000:Infinite Lives PL1
-shdancer1:0:FFEB8A:9A:000:Infinite Lives PL2
+; [ Shadow Dancer (Rev.B) ]
+shdancrb:0:FFC407:59:000:Infinite Time
+shdancrb:0:FFC41F:09:000:Infinite Magic
+shdancrb:0:FFC490:00:000:Always have the Normal gun
+shdancrb:0:FFC490:01:000:Always have the Power-up gun
+shdancrb:0:FFC490:00:001:Get the Normal gun Now!
+shdancrb:0:FFC490:01:001:Get the Power-up gun Now!
+shdancrb:0:FFEB0A:9A:000:Infinite Lives PL1
+shdancrb:0:FFEB8A:9A:000:Infinite Lives PL2

 ; [ Shadow Dancer (Japan) ]
-shdancerj:0:FFC407:59:000:Infinite Time
-shdancerj:0:FFC41F:09:000:Infinite Magic
-shdancerj:0:FFC490:00:000:Always have the Normal gun
-shdancerj:0:FFC490:01:000:Always have the Power-up gun
-shdancerj:0:FFC490:00:001:Get the Normal gun Now!
-shdancerj:0:FFC490:01:001:Get the Power-up gun Now!
-shdancerj:0:FFEB0A:9A:000:Infinite Lives PL1
-shdancerj:0:FFEB8A:9A:000:Infinite Lives PL2
+shdancrj:0:FFC407:59:000:Infinite Time
+shdancrj:0:FFC41F:09:000:Infinite Magic
+shdancrj:0:FFC490:00:000:Always have the Normal gun
+shdancrj:0:FFC490:01:000:Always have the Power-up gun
+shdancrj:0:FFC490:00:001:Get the Normal gun Now!
+shdancrj:0:FFC490:01:001:Get the Power-up gun Now!
+shdancrj:0:FFEB0A:9A:000:Infinite Lives PL1
+shdancrj:0:FFEB8A:9A:000:Infinite Lives PL2

 ; [ Sheriff ]
 sheriff:0:6035:FF:000:Invincibility
@@ -138633,6 +138565,16 @@ wtennis:0:00C1:00:001:Set 'HER' to 0 Now! PL2
 wtennis:0:00C2:03:001:Set 'HIS' to 3 Now! PL2
 wtennis:0:00C1:03:001:Set 'HER' to 3 Now! PL2

+; [ Where's Wally? ]
+wwally:0:0000:00:999:[ There are no cheats   ]:REASON 1
+wwally:0:0000:00:999:[ for this game as it   ]:REASON 1
+wwally:0:0000:00:999:[ didn't work the last  ]:REASON 1
+wwally:0:0000:00:999:[ time it was tested.   ]:REASON 1
+wwally:0:0000:00:999:[ If the game now works ]:REASON 1
+wwally:0:0000:00:999:[ please request cheats ]:REASON 1
+wwally:0:0000:00:999:[ for it on the cheat   ]:REASON 1
+wwally:0:0000:00:999:[ forums.               ]:REASON 1
+
 ; [ Wild Western (set 2) ]
 wwester1:0:8620:03:000:Infinite Lives
 wwester1:0:0000:00:999:[See the Dip Switch Menu to ]
@@ -2777,9 +2777,7 @@ chinhero3:
 0:e12a:1:03:03

 asurabus:
-asurabusj:
-asurabusja:
-asurabusjr:
+asurabusa:
 0:40326d:132:05:14

 dynabomb:
@@ -18291,7 +18291,7 @@ F.A.Q. by Kevin Butler A.K.A. War Doc
 $end


-$info=batsugun,batsuguna,batsugunc,batsugunb,batsugunsp,
+$info=batsugun,batugnsp,batsugna,
 $bio

 Batsugun (c) 02/1993 Toaplan.
@@ -57433,7 +57433,7 @@ Nintendo Famicom (1988, "Ikari 2 - Dogosoken")
 $end


-$info=dogyuun,dogyuuna,dogyuunb,dogyuunt,
+$info=dogyuun,
 $bio

 Dogyuun (c) 10/1992 Toaplan.
@@ -74054,7 +74054,7 @@ This game is also known as "Round-Up".
 $end


-$info=fixeight,fixeightk,fixeighth,fixeighttw,fixeighta,fixeightu,fixeightj,fixeightt,fixeightkt,fixeightht,fixeighttwt,fixeightat,fixeightut,fixeightjt,fixeightbl,
+$info=fixeight,fixeighb,
 $bio

 Fixeight (c) 1992 Toaplan.
@@ -84877,7 +84877,7 @@ The US version has the "Recycle It, Don't Trash It!" screen.
 $end


-$info=mp_gaxe2,mp_gaxe2a,
+$info=mp_gaxe2,
 $bio

 Golden Axe II (c) 1993 Sega.
@@ -89643,7 +89643,7 @@ F.A.Q. by Kevin Butler A.K.A. War Doc
 $end


-$info=grindstm,grindstma,
+$info=grindstm,grindsta,
 $bio

 Grind Stormer (c) 1992 Toaplan.
@@ -115022,7 +115022,7 @@ You can also get points by punching out enemies. If you can punch out an enemy w
 $end


-$info=kbash,kbashk,kbashp,
+$info=kbash,
 $bio

 Knuckle Bash (c) 1993 Toaplan.
@@ -242217,7 +242217,7 @@ Directed by : Strong Shima
 $end


-$info=mp_twcup,
+$info=mp_twc,
 $bio

 Tecmo World Cup (c) 1993 Sega.
@@ -377,7 +377,6 @@ struct artwork_piece
 	struct mame_bitmap *	yrgbbitmap;
 	UINT32 *				scanlinehint;
 	UINT8					blendflags;
-	const struct overlay_piece *overlay_data;	/* a driver's overlay: drawn again on a resize */

 	/* derived/dynamic data */
 	int						intersects_game;
@@ -409,9 +408,6 @@ static int gamescale;
 static struct mame_bitmap *uioverlay;
 static UINT32 *uioverlayhint;
 static struct rectangle uibounds, last_uibounds;
-static struct rectangle ui_changed_bounds;
-static int ui_changed;
-static int full_render_pending;	/* after a resize: draw the whole game, not the vector dirty pixels */

 static UINT32 *palette_lookup;

@@ -450,7 +446,6 @@ static void alpha_blend_intersecting_rect(struct mame_bitmap *dstbitmap, const s
 static void add_intersecting_rect(struct mame_bitmap *dstbitmap, const struct rectangle *dstbounds, struct mame_bitmap *srcbitmap, const struct rectangle *srcbounds);
 static void cmy_blend_intersecting_rect(struct mame_bitmap *dstbitmap, struct mame_bitmap *dstyrgbbitmap, const struct rectangle *dstbounds, struct mame_bitmap *srcbitmap, struct mame_bitmap *srcyrgbbitmap, const struct rectangle *srcbounds, UINT8 blendflags);
 static int generate_overlay(const struct overlay_piece *list, int width, int height);
-static int generate_overlay_bitmap(struct artwork_piece *piece, int width, int height);
 static void add_range_to_hint(UINT32 *hintbase, int scanline, int startx, int endx);


@@ -601,89 +596,7 @@ static INLINE UINT32 blend_over(UINT32 game, UINT32 pre, UINT32 yrgb)
 	to osd_create_display
 -------------------------------------------------*/

-static int artwork_setup_display(struct osd_create_params *params, UINT32 *rgb_components);
-
 int artwork_create_display(struct osd_create_params *params, UINT32 *rgb_components, const struct artwork_callbacks *callbacks)
-{
-	/* reset UI */
-	uioverlay = NULL;
-	uioverlayhint = NULL;
-	palette_lookup = NULL;
-
-	/* first load the artwork; if none, quit now */
-	artwork_list = NULL;
-	if (!artwork_load(Machine->gamedrv, params->width, params->height, callbacks))
-		return 1;
-	if (!artwork_list && (!callbacks->activate_artwork || !callbacks->activate_artwork(params)))
-		return osd_create_display(params, rgb_components);
-
-	return artwork_setup_display(params, rgb_components);
-}
-
-
-/*-------------------------------------------------
-	artwork_resize_display - the game's display
-	changes size while it runs (the vector
-	resolution): the loaded artwork is kept, the
-	bitmaps that depend on the size are made again
-------------------------------------------------*/
-
-int artwork_resize_display(struct osd_create_params *params, UINT32 *rgb_components)
-{
-	struct artwork_piece *piece;
-
-	if (!artwork_list && !uioverlay)
-	{
-		osd_close_display();
-		return osd_create_display(params, rgb_components);
-	}
-
-	/* free what was made for the old size */
-	auto_bitmap_free(underlay);
-	auto_bitmap_free(overlay);
-	auto_bitmap_free(overlay_yrgb);
-	auto_bitmap_free(bezel);
-	auto_bitmap_free(final);
-	auto_bitmap_free(uioverlay);
-	auto_free_ptr(uioverlayhint);
-	underlay = overlay = overlay_yrgb = bezel = final = uioverlay = NULL;
-	uioverlayhint = NULL;
-	for (piece = artwork_list; piece; piece = piece->next)
-	{
-		auto_bitmap_free(piece->prebitmap);
-		auto_bitmap_free(piece->yrgbbitmap);
-		auto_free_ptr(piece->scanlinehint);
-		piece->prebitmap = piece->yrgbbitmap = NULL;
-		piece->scanlinehint = NULL;
-
-		/* a driver's overlay is drawn at the game's size: draw it again */
-		if (piece->overlay_data)
-		{
-			auto_bitmap_free(piece->rawbitmap);
-			piece->rawbitmap = NULL;
-			if (!generate_overlay_bitmap(piece, params->width, params->height))
-				return 1;
-		}
-	}
-
-	/* the UI areas were on the old size */
-	memset(&uibounds, 0, sizeof(uibounds));
-	memset(&last_uibounds, 0, sizeof(last_uibounds));
-	memset(&ui_changed_bounds, 0, sizeof(ui_changed_bounds));
-	ui_changed = 0;
-	full_render_pending = 1;
-
-	osd_close_display();
-	return artwork_setup_display(params, rgb_components);
-}
-
-
-/*-------------------------------------------------
-	artwork_setup_display - size the artwork
-	bitmaps for the display and create it
-------------------------------------------------*/
-
-static int artwork_setup_display(struct osd_create_params *params, UINT32 *rgb_components)
 {
 	int original_width = params->width;
 	int original_height = params->height;
@@ -692,6 +605,17 @@ static int artwork_setup_display(struct osd_create_params *params, UINT32 *rgb_c
 	UINT32 rgb32_components[3];
 	struct artwork_piece *piece;

+	/* reset UI */
+	uioverlay = NULL;
+	uioverlayhint = NULL;
+
+	/* first load the artwork; if none, quit now */
+	artwork_list = NULL;
+	if (!artwork_load(Machine->gamedrv, original_width, original_height, callbacks))
+		return 1;
+	if (!artwork_list && (!callbacks->activate_artwork || !callbacks->activate_artwork(params)))
+		return osd_create_display(params, rgb_components);
+
 	/* determine the game bitmap scale factor */
 	gamescale = options.artwork_res;
 	if (gamescale < 1 || (params->video_attributes & VIDEO_TYPE_VECTOR))
@@ -874,6 +798,8 @@ void artwork_update_visible_area(struct mame_display *display)

 void artwork_update_video_and_audio(struct mame_display *display)
 {
+	static struct rectangle ui_changed_bounds;
+	static int ui_changed;
 	int artwork_changed = 0, ui_visible = 0;

 	/* do nothing if no artwork */
@@ -898,13 +824,6 @@ void artwork_update_video_and_audio(struct mame_display *display)
 	/* process the artwork and UI only if we're not frameskipping */
 	if (display->changed_flags & GAME_BITMAP_CHANGED)
 	{
-		if (full_render_pending)
-		{
-			display->changed_flags &= ~VECTOR_PIXELS_CHANGED;
-			display->vector_dirty_pixels = NULL;
-			full_render_pending = 0;
-		}
-
 		/* see if there's any UI to display this frame */
 		ui_visible = (uibounds.max_x != 0);

@@ -3430,25 +3349,6 @@ static int generate_right_triangle_piece(struct artwork_piece *piece, const stru
 	the given pieces
 -------------------------------------------------*/

-static int generate_overlay_bitmap(struct artwork_piece *piece, int width, int height)
-{
-	const struct overlay_piece *list = piece->overlay_data;
-
-	/* switch off the type */
-	switch (list->type & ~OVERLAY_FLAG_MASK)
-	{
-		case OVERLAY_TYPE_RECTANGLE:
-			return generate_rect_piece(piece, list, width, height);
-
-		case OVERLAY_TYPE_DISK:
-			return generate_disk_piece(piece, list, width, height);
-
-		case OVERLAY_TYPE_RIGHT_TRIANGLE:
-			return generate_right_triangle_piece(piece, list, width, height);
-	}
-	return 1;
-}
-
 static int generate_overlay(const struct overlay_piece *list, int width, int height)
 {
 	struct artwork_piece *piece;
@@ -3468,10 +3368,24 @@ static int generate_overlay(const struct overlay_piece *list, int width, int hei
 		piece->priority = priority++;
 		piece->blendflags = list->type & OVERLAY_FLAG_MASK;
 		piece->tag = list->tag; /* Handle someone using a different tag, for example, cocktail mode */
-		piece->overlay_data = list;

-		if (!generate_overlay_bitmap(piece, width, height))
-			return 0;
+		/* switch off the type */
+		switch (list->type & ~OVERLAY_FLAG_MASK)
+		{
+			case OVERLAY_TYPE_RECTANGLE:
+				if (!generate_rect_piece(piece, list, width, height))
+					return 0;
+				break;
+
+			case OVERLAY_TYPE_DISK:
+				if (!generate_disk_piece(piece, list, width, height))
+					return 0;
+				break;
+			case OVERLAY_TYPE_RIGHT_TRIANGLE:
+				if (!generate_right_triangle_piece(piece, list, width, height))
+					return 0;
+				break;
+		}

 		/* next */
 		list++;
@@ -3668,9 +3582,8 @@ static int compute_rgb_components(int depth, UINT32 rgb_components[3], UINT32 rg
 	/* compute a transparent color; this is in the premultiplied space, so alpha is inverted */
 	transparent_color = ASSEMBLE_ARGB(0xff,0x00,0x00,0x00);

-	/* allocate a palette lookup (once per game: a resize keeps it, as the depth and palette stay) */
-	if (!palette_lookup)
-		palette_lookup = auto_malloc(65536 * sizeof(palette_lookup[0]));
+	/* allocate a palette lookup */
+	palette_lookup = auto_malloc(65536 * sizeof(palette_lookup[0]));
 	

 	/* switch off the depth */
@@ -163,7 +163,6 @@ struct overlay_piece
 ***************************************************************************/

 int artwork_create_display(struct osd_create_params *params, UINT32 *rgb_components, const struct artwork_callbacks *callbacks);
-int artwork_resize_display(struct osd_create_params *params, UINT32 *rgb_components);
 void artwork_update_video_and_audio(struct mame_display *display);
 void artwork_override_screenshot_params(struct mame_bitmap **bitmap, struct rectangle *rect, UINT32 *rgb_components);

@@ -971,47 +971,6 @@ void auto_free(void)
 }


-/*-------------------------------------------------
-	auto_free_ptr - free one auto_malloc block
-	before its tag ends, and stop tracking it
-	(for the buffers that are reallocated while
-	a game runs, as the vector bitmap)
-------------------------------------------------*/
-
-void auto_free_ptr(void *ptr)
-{
-	int i;
-
-	if (!ptr)
-		return;
-
-	for (i = malloc_list_index - 1; i >= 0; i--)
-		if (malloc_list[i].ptr == ptr)
-		{
-			free(ptr);
-			memmove(&malloc_list[i], &malloc_list[i + 1], (malloc_list_index - i - 1) * sizeof(malloc_list[0]));
-			malloc_list_index--;
-			return;
-		}
-}
-
-
-/*-------------------------------------------------
-	auto_bitmap_free - free an auto_bitmap_alloc
-	bitmap before its tag ends
-------------------------------------------------*/
-
-void auto_bitmap_free(struct mame_bitmap *bitmap)
-{
-	if (!bitmap)
-		return;
-
-	/* the line array was allocated before the safety rows were skipped */
-	auto_free_ptr(bitmap->line - BITMAP_SAFETY);
-	auto_free_ptr(bitmap);
-}
-
-
 /*-------------------------------------------------
 	bitmap_alloc - allocate a bitmap at the
 	current screen depth
@@ -1227,7 +1186,7 @@ static int count_roms(const struct RomModule *romp)
 static void fill_random(UINT8 *base, UINT32 length)
 {
 	while (length--)
-		*base++ = mame_rand_int();
+		*base++ = rand();
 }


@@ -452,10 +452,6 @@ static INLINE int get_resource_tag(void)

 /* automatically-freeing memory */
 void *auto_malloc(size_t size);
-
-/* free one auto_malloc block (or auto bitmap) before its tag ends */
-void auto_free_ptr(void *ptr);
-void auto_bitmap_free(struct mame_bitmap *bitmap);
 char *auto_strdup(const char *str);
 struct mame_bitmap *auto_bitmap_alloc(int width,int height);
 struct mame_bitmap *auto_bitmap_alloc_depth(int width,int height,int depth);
@@ -60,7 +60,6 @@

 #include "memory.h"
 #include "cpuintrf.h"
-#include "state.h"
 #include "mamedbg.h"
 #include "h6280.h"

@@ -139,31 +138,6 @@ UINT8	H6280_debug_mmr[8];
 /*****************************************************************************/
 void h6280_init(void)
 {
-	int cpu = cpu_getactivecpu();
-
-	state_save_register_UINT32("h6280", cpu, "PPC", &h6280.ppc.d, 1);
-	state_save_register_UINT32("h6280", cpu, "PC", &h6280.pc.d, 1);
-	state_save_register_UINT32("h6280", cpu, "SP", &h6280.sp.d, 1);
-	state_save_register_UINT32("h6280", cpu, "ZP", &h6280.zp.d, 1);
-	state_save_register_UINT32("h6280", cpu, "EA", &h6280.ea.d, 1);
-	state_save_register_UINT8("h6280", cpu, "A", &h6280.a, 1);
-	state_save_register_UINT8("h6280", cpu, "X", &h6280.x, 1);
-	state_save_register_UINT8("h6280", cpu, "Y", &h6280.y, 1);
-	state_save_register_UINT8("h6280", cpu, "P", &h6280.p, 1);
-	state_save_register_UINT8("h6280", cpu, "MMR", h6280.mmr, 8);
-	state_save_register_UINT8("h6280", cpu, "IRQ_MASK", &h6280.irq_mask, 1);
-	state_save_register_UINT8("h6280", cpu, "TIMER_STATUS", &h6280.timer_status, 1);
-	state_save_register_UINT8("h6280", cpu, "TIMER_ACK", &h6280.timer_ack, 1);
-	state_save_register_int("h6280", cpu, "TIMER_VALUE", &h6280.timer_value);
-	state_save_register_int("h6280", cpu, "TIMER_LOAD", &h6280.timer_load);
-	state_save_register_int("h6280", cpu, "EXTRA_CYCLES", &h6280.extra_cycles);
-	state_save_register_int("h6280", cpu, "NMI_STATE", &h6280.nmi_state);
-	state_save_register_int("h6280", cpu, "IRQ1_STATE", &h6280.irq_state[0]);
-	state_save_register_int("h6280", cpu, "IRQ2_STATE", &h6280.irq_state[1]);
-	state_save_register_int("h6280", cpu, "IRQT_STATE", &h6280.irq_state[2]);
-#if LAZY_FLAGS
-	state_save_register_int("h6280", cpu, "NZ", &h6280.NZ);
-#endif
 }

 void h6280_reset(void *param)
@@ -587,8 +587,6 @@ void hd6309_init(void)
 	state_save_register_UINT16("hd6309", cpu, "X", &X, 1);
 	state_save_register_UINT16("hd6309", cpu, "Y", &Y, 1);
 	state_save_register_UINT16("hd6309", cpu, "V", &V, 1);
-	state_save_register_UINT16("hd6309", cpu, "D", &D, 1);	/* the accumulators A and B */
-	state_save_register_UINT16("hd6309", cpu, "W", &W, 1);	/* the accumulators E and F */
 	state_save_register_UINT8("hd6309", cpu, "DP", &DP, 1);
 	state_save_register_UINT8("hd6309", cpu, "CC", &CC, 1);
 	state_save_register_UINT8("hd6309", cpu, "MD", &MD, 1);
@@ -597,7 +595,6 @@ void hd6309_init(void)
 	state_save_register_UINT8("hd6309", cpu, "NMI", &hd6309.nmi_state, 1);
 	state_save_register_UINT8("hd6309", cpu, "IRQ", &hd6309.irq_state[0], 1);
 	state_save_register_UINT8("hd6309", cpu, "FIRQ", &hd6309.irq_state[1], 1);
-	state_save_register_int("hd6309", cpu, "extra_cycles", &hd6309.extra_cycles);	/* the cycles of an interrupt taken outside the execute loop */
 }

 /****************************************************************************/
@@ -1,674 +0,0 @@
-#pragma once
-
-#ifndef __CYCLES_H__
-#define __CYCLES_H__
-
-typedef enum
-{
-	CYCLES_MOV_REG_REG,
-	CYCLES_MOV_REG_MEM,
-	CYCLES_MOV_MEM_REG,
-	CYCLES_MOV_IMM_REG,
-	CYCLES_MOV_IMM_MEM,
-	CYCLES_MOV_ACC_MEM,
-	CYCLES_MOV_MEM_ACC,
-	CYCLES_MOV_REG_SREG,
-	CYCLES_MOV_MEM_SREG,
-	CYCLES_MOV_SREG_REG,
-	CYCLES_MOV_SREG_MEM,
-	CYCLES_MOVSX_REG_REG,
-	CYCLES_MOVSX_MEM_REG,
-	CYCLES_MOVZX_REG_REG,
-	CYCLES_MOVZX_MEM_REG,
-	CYCLES_PUSH_RM,
-	CYCLES_PUSH_REG_SHORT,
-	CYCLES_PUSH_SREG,
-	CYCLES_PUSH_IMM,
-	CYCLES_PUSHA,
-	CYCLES_POP_RM,
-	CYCLES_POP_REG_SHORT,
-	CYCLES_POP_SREG,
-	CYCLES_POPA,
-	CYCLES_XCHG_REG_REG,
-	CYCLES_XCHG_REG_MEM,
-	CYCLES_IN,
-	CYCLES_IN_VAR,
-	CYCLES_OUT,
-	CYCLES_OUT_VAR,
-	CYCLES_LEA,
-	CYCLES_LDS,
-	CYCLES_LES,
-	CYCLES_LFS,
-	CYCLES_LGS,
-	CYCLES_LSS,
-	CYCLES_CLC,
-	CYCLES_CLD,
-	CYCLES_CLI,
-	CYCLES_CLTS,
-	CYCLES_CMC,
-	CYCLES_LAHF,
-	CYCLES_POPF,
-	CYCLES_PUSHF,
-	CYCLES_SAHF,
-	CYCLES_STC,
-	CYCLES_STD,
-	CYCLES_STI,
-	CYCLES_ALU_REG_REG,
-	CYCLES_ALU_REG_MEM,
-	CYCLES_ALU_MEM_REG,
-	CYCLES_ALU_IMM_REG,
-	CYCLES_ALU_IMM_MEM,
-	CYCLES_ALU_IMM_ACC,
-	CYCLES_INC_REG,
-	CYCLES_INC_MEM,
-	CYCLES_DEC_REG,
-	CYCLES_DEC_MEM,
-	CYCLES_CMP_REG_REG,
-	CYCLES_CMP_REG_MEM,
-	CYCLES_CMP_MEM_REG,
-	CYCLES_CMP_IMM_REG,
-	CYCLES_CMP_IMM_MEM,
-	CYCLES_CMP_IMM_ACC,
-	CYCLES_TEST_REG_REG,
-	CYCLES_TEST_REG_MEM,
-	CYCLES_TEST_IMM_REG,
-	CYCLES_TEST_IMM_MEM,
-	CYCLES_TEST_IMM_ACC,
-	CYCLES_NEG_REG,
-	CYCLES_NEG_MEM,
-	CYCLES_AAA,
-	CYCLES_AAS,
-	CYCLES_DAA,
-	CYCLES_DAS,
-	CYCLES_MUL8_ACC_REG,
-	CYCLES_MUL8_ACC_MEM,
-	CYCLES_MUL16_ACC_REG,
-	CYCLES_MUL16_ACC_MEM,
-	CYCLES_MUL32_ACC_REG,
-	CYCLES_MUL32_ACC_MEM,
-	CYCLES_IMUL8_ACC_REG,
-	CYCLES_IMUL8_ACC_MEM,
-	CYCLES_IMUL16_ACC_REG,
-	CYCLES_IMUL16_ACC_MEM,
-	CYCLES_IMUL32_ACC_REG,
-	CYCLES_IMUL32_ACC_MEM,
-	CYCLES_IMUL8_REG_REG,
-	CYCLES_IMUL8_REG_MEM,
-	CYCLES_IMUL16_REG_REG,
-	CYCLES_IMUL16_REG_MEM,
-	CYCLES_IMUL32_REG_REG,
-	CYCLES_IMUL32_REG_MEM,
-	CYCLES_IMUL16_REG_IMM_REG,
-	CYCLES_IMUL16_MEM_IMM_REG,
-	CYCLES_IMUL32_REG_IMM_REG,
-	CYCLES_IMUL32_MEM_IMM_REG,
-	CYCLES_DIV8_ACC_REG,
-	CYCLES_DIV8_ACC_MEM,
-	CYCLES_DIV16_ACC_REG,
-	CYCLES_DIV16_ACC_MEM,
-	CYCLES_DIV32_ACC_REG,
-	CYCLES_DIV32_ACC_MEM,
-	CYCLES_IDIV8_ACC_REG,
-	CYCLES_IDIV8_ACC_MEM,
-	CYCLES_IDIV16_ACC_REG,
-	CYCLES_IDIV16_ACC_MEM,
-	CYCLES_IDIV32_ACC_REG,
-	CYCLES_IDIV32_ACC_MEM,
-	CYCLES_AAD,
-	CYCLES_AAM,
-	CYCLES_CBW,
-	CYCLES_CWD,
-	CYCLES_ROTATE_REG,
-	CYCLES_ROTATE_MEM,
-	CYCLES_ROTATE_CARRY_REG,
-	CYCLES_ROTATE_CARRY_MEM,
-	CYCLES_SHLD_REG,
-	CYCLES_SHLD_MEM,
-	CYCLES_SHRD_REG,
-	CYCLES_SHRD_MEM,
-	CYCLES_NOT_REG,
-	CYCLES_NOT_MEM,
-	CYCLES_CMPS,
-	CYCLES_INS,
-	CYCLES_LODS,
-	CYCLES_MOVS,
-	CYCLES_OUTS,
-	CYCLES_SCAS,
-	CYCLES_STOS,
-	CYCLES_XLAT,
-	CYCLES_REP_CMPS_BASE,
-	CYCLES_REP_INS_BASE,
-	CYCLES_REP_LODS_BASE,
-	CYCLES_REP_MOVS_BASE,
-	CYCLES_REP_OUTS_BASE,
-	CYCLES_REP_SCAS_BASE,
-	CYCLES_REP_STOS_BASE,
-	CYCLES_REP_CMPS,
-	CYCLES_REP_INS,
-	CYCLES_REP_LODS,
-	CYCLES_REP_MOVS,
-	CYCLES_REP_OUTS,
-	CYCLES_REP_SCAS,
-	CYCLES_REP_STOS,
-	CYCLES_BSF_BASE,
-	CYCLES_BSF,
-	CYCLES_BSR_BASE,
-	CYCLES_BSR,
-	CYCLES_BT_IMM_REG,
-	CYCLES_BT_IMM_MEM,
-	CYCLES_BT_REG_REG,
-	CYCLES_BT_REG_MEM,
-	CYCLES_BTC_IMM_REG,
-	CYCLES_BTC_IMM_MEM,
-	CYCLES_BTC_REG_REG,
-	CYCLES_BTC_REG_MEM,
-	CYCLES_BTR_IMM_REG,
-	CYCLES_BTR_IMM_MEM,
-	CYCLES_BTR_REG_REG,
-	CYCLES_BTR_REG_MEM,
-	CYCLES_BTS_IMM_REG,
-	CYCLES_BTS_IMM_MEM,
-	CYCLES_BTS_REG_REG,
-	CYCLES_BTS_REG_MEM,
-	CYCLES_CALL,				/* E8 */
-	CYCLES_CALL_REG,			/* FF /2 */
-	CYCLES_CALL_MEM,			/* FF /2 */
-	CYCLES_CALL_INTERSEG,		/* 9A */
-	CYCLES_CALL_REG_INTERSEG,	/* FF /3 */
-	CYCLES_CALL_MEM_INTERSEG,	/* FF /3 */
-	CYCLES_JMP_SHORT,			/* EB */
-	CYCLES_JMP,					/* E9 */
-	CYCLES_JMP_REG,				/* FF /4 */
-	CYCLES_JMP_MEM,				/* FF /4 */
-	CYCLES_JMP_INTERSEG,		/* EA */
-	CYCLES_JMP_REG_INTERSEG,	/* FF /5 */
-	CYCLES_JMP_MEM_INTERSEG,	/* FF /5 */
-	CYCLES_RET,					/* C3 */
-	CYCLES_RET_IMM,				/* C2 */
-	CYCLES_RET_INTERSEG,		/* CB */
-	CYCLES_RET_IMM_INTERSEG,	/* CA */
-	CYCLES_JCC_DISP8,
-	CYCLES_JCC_FULL_DISP,
-	CYCLES_JCC_DISP8_NOBRANCH,
-	CYCLES_JCC_FULL_DISP_NOBRANCH,
-	CYCLES_JCXZ,
-	CYCLES_JCXZ_NOBRANCH,
-	CYCLES_LOOP,
-	CYCLES_LOOPZ,
-	CYCLES_LOOPNZ,
-	CYCLES_SETCC_REG,
-	CYCLES_SETCC_MEM,
-	CYCLES_ENTER,
-	CYCLES_LEAVE,
-	CYCLES_INT,
-	CYCLES_INT3,
-	CYCLES_INTO_OF1,
-	CYCLES_INTO_OF0,
-	CYCLES_BOUND_IN_RANGE,
-	CYCLES_BOUND_OUT_RANGE,
-	CYCLES_IRET,
-	CYCLES_HLT,
-	CYCLES_MOV_REG_CR0,
-	CYCLES_MOV_REG_CR2,
-	CYCLES_MOV_REG_CR3,
-	CYCLES_MOV_CR_REG,
-	CYCLES_MOV_REG_DR0_3,
-	CYCLES_MOV_REG_DR6_7,
-	CYCLES_MOV_DR6_7_REG,
-	CYCLES_MOV_DR0_3_REG,
-	CYCLES_MOV_REG_TR6_7,
-	CYCLES_MOV_TR6_7_REG,
-	CYCLES_NOP,
-	CYCLES_WAIT,
-	CYCLES_ARPL_REG,
-	CYCLES_ARPL_MEM,
-	CYCLES_LAR_REG,
-	CYCLES_LAR_MEM,
-	CYCLES_LGDT,
-	CYCLES_LIDT,
-	CYCLES_LLDT_REG,
-	CYCLES_LLDT_MEM,
-	CYCLES_LMSW_REG,
-	CYCLES_LMSW_MEM,
-	CYCLES_LSL_REG,
-	CYCLES_LSL_MEM,
-	CYCLES_LTR_REG,
-	CYCLES_LTR_MEM,
-	CYCLES_SGDT,
-	CYCLES_SIDT,
-	CYCLES_SLDT_REG,
-	CYCLES_SLDT_MEM,
-	CYCLES_SMSW_REG,
-	CYCLES_SMSW_MEM,
-	CYCLES_STR_REG,
-	CYCLES_STR_MEM,
-	CYCLES_VERR_REG,
-	CYCLES_VERR_MEM,
-	CYCLES_VERW_REG,
-	CYCLES_VERW_MEM,
-	CYCLES_LOCK,
-
-	CYCLES_BSWAP,
-	CYCLES_CMPXCHG8B,
-	CYCLES_CMPXCHG,
-	CYCLES_CPUID,
-	CYCLES_CPUID_EAX1,
-	CYCLES_INVD,
-	CYCLES_XADD,
-	CYCLES_RDTSC,
-	CYCLES_RSM,
-	CYCLES_RDMSR,
-
-	CYCLES_FABS,
-	CYCLES_FADD,
-	CYCLES_FBLD,
-	CYCLES_FBSTP,
-	CYCLES_FCHS,
-	CYCLES_FCLEX,
-	CYCLES_FCOM,
-	CYCLES_FCOS,
-	CYCLES_FDECSTP,
-	CYCLES_FDISI,
-	CYCLES_FDIV,
-	CYCLES_FDIVR,
-	CYCLES_FENI,
-	CYCLES_FFREE,
-	CYCLES_FIADD,
-	CYCLES_FICOM,
-	CYCLES_FIDIV,
-	CYCLES_FILD,
-	CYCLES_FIMUL,
-	CYCLES_FINCSTP,
-	CYCLES_FINIT,
-	CYCLES_FIST,
-	CYCLES_FISUB,
-	CYCLES_FLD,
-	CYCLES_FLDZ,
-	CYCLES_FLD1,
-	CYCLES_FLDL2E,
-	CYCLES_FLDL2T,
-	CYCLES_FLDLG2,
-	CYCLES_FLDLN2,
-	CYCLES_FLDPI,
-	CYCLES_FLDCW,
-	CYCLES_FLDENV,
-	CYCLES_FMUL,
-	CYCLES_FNOP,
-	CYCLES_FPATAN,
-	CYCLES_FPREM,
-	CYCLES_FPREM1,
-	CYCLES_FPTAN,
-	CYCLES_FRNDINT,
-	CYCLES_FRSTOR,
-	CYCLES_FSAVE,
-	CYCLES_FSCALE,
-	CYCLES_FSETPM,
-	CYCLES_FSIN,
-	CYCLES_FSINCOS,
-	CYCLES_FSQRT,
-	CYCLES_FST,
-	CYCLES_FSTCW,
-	CYCLES_FSTENV,
-	CYCLES_FSTSW,
-	CYCLES_FSUB,
-	CYCLES_FSUBR,
-	CYCLES_FTST,
-	CYCLES_FUCOM,
-	CYCLES_FXAM,
-	CYCLES_FXCH,
-	CYCLES_FXTRACT,
-	CYCLES_FYL2X,
-	CYCLES_FYL2XPI,
-	CYCLES_CMPXCHG_REG_REG_T,
-	CYCLES_CMPXCHG_REG_REG_F,
-	CYCLES_CMPXCHG_REG_MEM_T,
-	CYCLES_CMPXCHG_REG_MEM_F,
-	CYCLES_XADD_REG_REG,
-	CYCLES_XADD_REG_MEM,
-
-	CYCLES_NUM_OPCODES
-} X86_CYCLES;
-
-
-#define X86_NUM_CPUS		4
-#define CPU_CYCLES_I386			0
-#define CPU_CYCLES_I486			1
-#define CPU_CYCLES_PENTIUM		2
-#define CPU_CYCLES_MEDIAGX		3
-
-
-typedef struct
-{
-	X86_CYCLES op;
-	UINT8 cpu_cycles[X86_NUM_CPUS][2];
-} X86_CYCLE_TABLE;
-
-static const X86_CYCLE_TABLE x86_cycle_table[] =
-{
-	/* opcode                     rm/pmode */
-	/*                            i386         i486         pentium      mediagx */
-	{ CYCLES_MOV_REG_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 } }		},
-	{ CYCLES_MOV_REG_MEM,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_MOV_MEM_REG,		{ {  4,  4 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_MOV_IMM_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 } }		},
-	{ CYCLES_MOV_IMM_MEM,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 } }		},
-	{ CYCLES_MOV_ACC_MEM,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 } }		},
-	{ CYCLES_MOV_MEM_ACC,		{ {  4,  4 },  {  1,  1 },  {  1,  1 },  {  1,  1 } }		},
-	{ CYCLES_MOV_REG_SREG,		{ {  2, 18 },  {  3,  3 },  {  2,  2 },  {  1,  6 } }		},
-	{ CYCLES_MOV_MEM_SREG,		{ {  5, 19 },  {  9,  9 },  {  3,  3 },  {  1,  6 } }		},
-	{ CYCLES_MOV_SREG_REG,		{ {  2,  2 },  {  3,  3 },  {  1,  1 },  {  1,  6 } }		},
-	{ CYCLES_MOV_SREG_MEM,		{ {  2,  2 },  {  3,  3 },  {  1,  1 },  {  1,  6 } }		},
-	{ CYCLES_MOVSX_REG_REG,		{ {  3,  3 },  {  3,  3 },  {  3,  3 },  {  1,  1 } }		},
-	{ CYCLES_MOVSX_MEM_REG,		{ {  6,  6 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_MOVZX_REG_REG,		{ {  3,  3 },  {  3,  3 },  {  3,  3 },  {  1,  1 } }		},
-	{ CYCLES_MOVZX_MEM_REG,		{ {  6,  6 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_PUSH_RM,			{ {  5,  5 },  {  4,  4 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_PUSH_REG_SHORT,	{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_PUSH_SREG,			{ {  2,  2 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_PUSH_IMM,			{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_PUSHA,				{ { 18, 18 },  { 11, 11 },  {  5,  5 },  { 11, 11 }	}		},
-	{ CYCLES_POP_RM,			{ {  5,  5 },  {  4,  4 },  {  3,  3 },  {  4,  4 }	}		},
-	{ CYCLES_POP_REG_SHORT,		{ {  4,  4 },  {  4,  4 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_POP_SREG,			{ {  7, 21 },  {  3,  3 },  {  3,  3 },  {  1,  6 }	}		},
-	{ CYCLES_POPA,				{ { 24, 24 },  {  9,  9 },  {  5,  5 },  {  9,  9 }	}		},
-	{ CYCLES_XCHG_REG_REG,		{ {  3,  3 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_XCHG_REG_MEM,		{ {  5,  5 },  {  5,  5 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_IN,				{ { 12, 26 },  { 14, 27 },  {  7, 19 },  {  8,  8 }	}		},
-	{ CYCLES_IN_VAR,			{ { 13, 27 },  { 14, 27 },  {  7, 19 },  {  8,  8 }	}		},
-	{ CYCLES_OUT,				{ { 10, 24 },  { 16, 29 },  { 12, 24 },  { 14, 14 }	}		},
-	{ CYCLES_OUT_VAR,			{ { 11, 25 },  { 16, 29 },  { 12, 24 },  { 14, 14 }	}		},
-	{ CYCLES_LEA,				{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_LDS,				{ {  7, 22 },  {  6, 12 },  {  4,  4 },  {  4,  9 }	}		},
-	{ CYCLES_LES,				{ {  7, 22 },  {  6, 12 },  {  4,  4 },  {  4,  9 }	}		},
-	{ CYCLES_LFS,				{ {  7, 22 },  {  6, 12 },  {  4,  4 },  {  4,  9 }	}		},
-	{ CYCLES_LGS,				{ {  7, 22 },  {  6, 12 },  {  4,  4 },  {  4,  9 }	}		},
-	{ CYCLES_LSS,				{ {  7, 22 },  {  6, 12 },  {  4,  4 },  {  4, 10 }	}		},
-	{ CYCLES_CLC,				{ {  2,  2 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_CLD,				{ {  2,  2 },  {  2,  2 },  {  2,  2 },  {  4,  4 }	}		},
-	{ CYCLES_CLI,				{ {  8,  8 },  {  5,  5 },  {  7,  7 },  {  6,  6 }	}		},
-	{ CYCLES_CLTS,				{ {  6,  6 },  {  7,  7 },  { 10, 10 },  {  7,  7 }	}		},
-	{ CYCLES_CMC,				{ {  2,  2 },  {  2,  2 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_LAHF,				{ {  2,  2 },  {  3,  3 },  {  2,  2 },  {  2,  2 }	}		},
-	{ CYCLES_POPF,				{ {  5,  5 },  {  9,  9 },  {  6,  6 },  {  8,  8 }	}		},
-	{ CYCLES_PUSHF,				{ {  4,  4 },  {  4,  4 },  {  9,  9 },  {  2,  2 }	}		},
-	{ CYCLES_SAHF,				{ {  3,  3 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_STC,				{ {  2,  2 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_STD,				{ {  2,  2 },  {  2,  2 },  {  2,  2 },  {  4,  4 }	}		},
-	{ CYCLES_STI,				{ {  8,  8 },  {  5,  5 },  {  7,  7 },  {  6,  6 }	}		},
-	{ CYCLES_ALU_REG_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_ALU_REG_MEM,		{ {  7,  7 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_ALU_MEM_REG,		{ {  6,  6 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_ALU_IMM_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_ALU_IMM_MEM,		{ {  7,  7 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_ALU_IMM_ACC,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_INC_REG,			{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_INC_MEM,			{ {  6,  6 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_DEC_REG,			{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_DEC_MEM,			{ {  6,  6 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_CMP_REG_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_CMP_REG_MEM,		{ {  5,  5 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_CMP_MEM_REG,		{ {  6,  6 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_CMP_IMM_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_CMP_IMM_MEM,		{ {  5,  5 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_CMP_IMM_ACC,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_TEST_REG_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_TEST_REG_MEM,		{ {  5,  5 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_TEST_IMM_REG,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_TEST_IMM_MEM,		{ {  5,  5 },  {  2,  2 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_TEST_IMM_ACC,		{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_NEG_REG,			{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_NEG_MEM,			{ {  6,  6 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_AAA,				{ {  4,  4 },  {  3,  3 },  {  3,  3 },  {  3,  3 }	}		},
-	{ CYCLES_AAS,				{ {  4,  4 },  {  3,  3 },  {  3,  3 },  {  3,  3 }	}		},
-	{ CYCLES_DAA,				{ {  4,  4 },  {  2,  2 },  {  3,  3 },  {  2,  2 }	}		},
-	{ CYCLES_DAS,				{ {  4,  4 },  {  2,  2 },  {  3,  3 },  {  2,  2 }	}		},
-	{ CYCLES_MUL8_ACC_REG,		{ { 17, 17 },  { 13, 13 },  { 11, 11 },  {  4,  4 }	}		},
-	{ CYCLES_MUL8_ACC_MEM,		{ { 20, 20 },  { 13, 13 },  { 11, 11 },  {  4,  4 }	}		},
-	{ CYCLES_MUL16_ACC_REG,		{ { 25, 25 },  { 13, 13 },  { 11, 11 },  {  5,  5 }	}		},
-	{ CYCLES_MUL16_ACC_MEM,		{ { 28, 28 },  { 13, 13 },  { 11, 11 },  {  5,  5 }	}		},
-	{ CYCLES_MUL32_ACC_REG,		{ { 41, 41 },  { 13, 13 },  { 10, 10 },  { 15, 15 }	}		},
-	{ CYCLES_MUL32_ACC_MEM,		{ { 44, 44 },  { 13, 13 },  { 10, 10 },  { 15, 15 }	}		},
-	{ CYCLES_IMUL8_ACC_REG,		{ { 17, 17 },  { 18, 18 },  { 11, 11 },  {  4,  4 }	}		},
-	{ CYCLES_IMUL8_ACC_MEM,		{ { 20, 20 },  { 18, 18 },  { 11, 11 },  {  4,  4 }	}		},
-	{ CYCLES_IMUL16_ACC_REG,	{ { 25, 25 },  { 26, 26 },  { 11, 11 },  {  5,  5 }	}		},
-	{ CYCLES_IMUL16_ACC_MEM,	{ { 28, 28 },  { 26, 26 },  { 11, 11 },  {  5,  5 }	}		},
-	{ CYCLES_IMUL32_ACC_REG,	{ { 41, 41 },  { 42, 42 },  { 10, 10 },  { 15, 15 }	}		},
-	{ CYCLES_IMUL32_ACC_MEM,	{ { 44, 44 },  { 42, 42 },  { 10, 10 },  { 15, 15 }	}		},
-	{ CYCLES_IMUL8_REG_REG,		{ { 17, 17 },  { 13, 13 },  { 10, 10 },  {  4,  4 }	}		},
-	{ CYCLES_IMUL8_REG_MEM,		{ { 20, 20 },  { 13, 13 },  { 10, 10 },  {  4,  4 }	}		},
-	{ CYCLES_IMUL16_REG_REG,	{ { 25, 25 },  { 13, 13 },  { 10, 10 },  {  5,  5 }	}		},
-	{ CYCLES_IMUL16_REG_MEM,	{ { 28, 28 },  { 13, 13 },  { 10, 10 },  {  5,  5 }	}		},
-	{ CYCLES_IMUL32_REG_REG,	{ { 41, 41 },  { 13, 13 },  { 10, 10 },  { 15, 15 }	}		},
-	{ CYCLES_IMUL32_REG_MEM,	{ { 44, 44 },  { 13, 13 },  { 10, 10 },  { 15, 15 }	}		},
-	{ CYCLES_IMUL16_REG_IMM_REG,{ { 26, 26 },  { 26, 26 },  { 10, 10 },  {  6,  6 }	}		},
-	{ CYCLES_IMUL16_MEM_IMM_REG,{ { 27, 27 },  { 26, 26 },  { 10, 10 },  {  6,  6 }	}		},
-	{ CYCLES_IMUL32_REG_IMM_REG,{ { 42, 42 },  { 42, 42 },  { 10, 10 },  { 16, 16 }	}		},
-	{ CYCLES_IMUL32_MEM_IMM_REG,{ { 43, 43 },  { 42, 42 },  { 10, 10 },  { 16, 16 }	}		},
-	{ CYCLES_DIV8_ACC_REG,		{ { 14, 14 },  { 16, 16 },  { 17, 17 },  { 20, 20 }	}		},
-	{ CYCLES_DIV8_ACC_MEM,		{ { 17, 17 },  { 16, 16 },  { 17, 17 },  { 20, 20 }	}		},
-	{ CYCLES_DIV16_ACC_REG,		{ { 22, 22 },  { 24, 24 },  { 25, 25 },  { 29, 29 }	}		},
-	{ CYCLES_DIV16_ACC_MEM,		{ { 25, 25 },  { 24, 24 },  { 25, 25 },  { 29, 29 }	}		},
-	{ CYCLES_DIV32_ACC_REG,		{ { 38, 38 },  { 40, 40 },  { 41, 41 },  { 45, 45 }	}		},
-	{ CYCLES_DIV32_ACC_MEM,		{ { 41, 41 },  { 40, 40 },  { 41, 41 },  { 45, 45 }	}		},
-	{ CYCLES_IDIV8_ACC_REG,		{ { 19, 19 },  { 19, 19 },  { 22, 22 },  { 20, 20 }	}		},
-	{ CYCLES_IDIV8_ACC_MEM,		{ { 22, 22 },  { 20, 20 },  { 22, 22 },  { 20, 20 }	}		},
-	{ CYCLES_IDIV16_ACC_REG,	{ { 27, 27 },  { 27, 27 },  { 30, 30 },  { 29, 29 }	}		},
-	{ CYCLES_IDIV16_ACC_MEM,	{ { 30, 30 },  { 28, 28 },  { 30, 30 },  { 29, 29 }	}		},
-	{ CYCLES_IDIV32_ACC_REG,	{ { 43, 43 },  { 43, 43 },  { 46, 46 },  { 45, 45 }	}		},
-	{ CYCLES_IDIV32_ACC_MEM,	{ { 46, 46 },  { 44, 44 },  { 46, 46 },  { 45, 45 }	}		},
-	{ CYCLES_AAD,				{ { 19, 19 },  { 14, 14 },  { 10, 10 },  {  7,  7 }	}		},
-	{ CYCLES_AAM,				{ { 17, 17 },  { 15, 15 },  { 18, 18 },  { 19, 19 }	}		},
-	{ CYCLES_CBW,				{ {  3,  3 },  {  3,  3 },  {  3,  3 },  {  3,  3 }	}		},
-	{ CYCLES_CWD,				{ {  2,  2 },  {  3,  3 },  {  2,  2 },  {  2,  2 }	}		},
-	{ CYCLES_ROTATE_REG,		{ {  3,  3 },  {  3,  3 },  {  1,  1 },  {  2,  2 }	}		},
-	{ CYCLES_ROTATE_MEM,		{ {  7,  7 },  {  4,  4 },  {  3,  3 },  {  2,	2 }	}		},
-	{ CYCLES_ROTATE_CARRY_REG,	{ {  9,  9 },  {  8,  8 },  {  7,  7 },  {  8,  8 }	}		},
-	{ CYCLES_ROTATE_CARRY_MEM,	{ { 10, 10 },  {  9,  9 },  {  8,  8 },  {  8,  8 }	}		},
-	{ CYCLES_SHLD_REG,			{ {  3,  3 },  {  2,  2 },  {  4,  4 },  {  3,  3 }	}		},
-	{ CYCLES_SHLD_MEM,			{ {  7,  7 },  {  3,  3 },  {  4,  4 },  {  6,  6 }	}		},
-	{ CYCLES_SHRD_REG,			{ {  3,  3 },  {  2,  2 },  {  4,  4 },  {  3,  3 }	}		},
-	{ CYCLES_SHRD_MEM,			{ {  7,  7 },  {  3,  3 },  {  4,  4 },  {  6,  6 }	}		},
-	{ CYCLES_NOT_REG,			{ {  2,  2 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_NOT_MEM,			{ {  6,  6 },  {  3,  3 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_CMPS,				{ { 10, 10 },  {  8,  8 },  {  5,  5 },  {  6,  6 }	}		},
-	{ CYCLES_INS,				{ { 15, 29 },  { 17, 30 },  {  9, 22 },  { 11, 11 }	}		},
-	{ CYCLES_LODS,				{ {  5,  5 },  {  5,  5 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_MOVS,				{ {  8,  8 },  {  7,  7 },  {  4,  4 },  {  6,  6 }	}		},
-	{ CYCLES_OUTS,				{ { 14, 28 },  { 17, 30 },  { 13, 25 },  { 15, 15 }	}		},
-	{ CYCLES_SCAS,				{ {  8,  8 },  {  6,  6 },  {  4,  4 },  {  2,  2 }	}		},
-	{ CYCLES_STOS,				{ {  5,  5 },  {  5,  5 },  {  3,  3 },  {  2,  2 }	}		},
-	{ CYCLES_XLAT,				{ {  5,  5 },  {  4,  4 },  {  4,  4 },  {  5,  5 }	}		},
-	{ CYCLES_REP_CMPS_BASE,		{ {  5,  5 },  {  0,  0 },  {  0,  0 },  { 11, 11 }	}		},
-	{ CYCLES_REP_INS_BASE,		{ { 14,  8 },  {  0,  0 },  {  0,  0 },  { 17, 17 }	}		},
-	{ CYCLES_REP_LODS_BASE,		{ {  5,  5 },  {  0,  0 },  {  0,  0 },  {  9,  9 }	}		},
-	{ CYCLES_REP_MOVS_BASE,		{ {  8,  8 },  {  0,  0 },  {  0,  0 },  { 12, 12 }	}		},
-	{ CYCLES_REP_OUTS_BASE,		{ { 12,  6 },  {  0,  0 },  {  0,  0 },  { 24, 24 }	}		},
-	{ CYCLES_REP_SCAS_BASE,		{ {  5,  5 },  {  0,  0 },  {  0,  0 },  {  9,  9 }	}		},
-	{ CYCLES_REP_STOS_BASE,		{ {  5,  5 },  {  0,  0 },  {  0,  0 },  {  9,  9 }	}		},
-	{ CYCLES_REP_CMPS,			{ {  5,  5 },  {  8,  8 },  {  5,  5 },  {  4,  4 }	}		},
-	{ CYCLES_REP_INS,			{ { 14,  8 },  { 17, 30 },  {  9, 22 },  {  4,  4 }	}		},
-	{ CYCLES_REP_LODS,			{ {  5,  5 },  {  5,  5 },  {  2,  2 },  {  2,  2 }	}		},
-	{ CYCLES_REP_MOVS,			{ {  8,  8 },  {  7,  7 },  {  4,  4 },  {  2,  2 }	}		},
-	{ CYCLES_REP_OUTS,			{ { 12,  6 },  { 17, 30 },  { 13, 25 },  {  4,  4 }	}		},
-	{ CYCLES_REP_SCAS,			{ {  5,  5 },  {  6,  6 },  {  4,  4 },  {  3,  3 }	}		},
-	{ CYCLES_REP_STOS,			{ {  5,  5 },  {  5,  5 },  {  3,  3 },  {  2,  2 }	}		},
-	{ CYCLES_BSF_BASE,			{ { 11, 11 },  {  6,  6 },  {  6,  6 },  {  4,  4 }	}		},
-	{ CYCLES_BSF,				{ {  3,  3 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_BSR_BASE,			{ {  9,  9 },  {  6,  6 },  {  7,  7 },  {  4,  4 }	}		},
-	{ CYCLES_BSR,				{ {  3,  3 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_BT_IMM_REG,		{ {  3,  3 },  {  3,  3 },  {  4,  4 },  {  1,  1 }	}		},
-	{ CYCLES_BT_IMM_MEM,		{ {  6,  6 },  {  6,  6 },  {  4,  4 },  {  1,  1 }	}		},
-	{ CYCLES_BT_REG_REG,		{ {  3,  3 },  {  3,  3 },  {  4,  4 },  {  1,  1 }	}		},
-	{ CYCLES_BT_REG_MEM,		{ { 12, 12 },  { 12, 12 },  {  9,  9 },  {  7,  7 }	}		},
-	{ CYCLES_BTC_IMM_REG,		{ {  6,  6 },  {  6,  6 },  {  7,  7 },  {  2,  2 }	}		},
-	{ CYCLES_BTC_IMM_MEM,		{ {  8,  8 },  {  8,  8 },  {  8,  8 },  {  2,  2 }	}		},
-	{ CYCLES_BTC_REG_REG,		{ {  6,  6 },  {  6,  6 },  {  7,  7 },  {  2,  2 }	}		},
-	{ CYCLES_BTC_REG_MEM,		{ { 13, 13 },  { 13, 13 },  { 13, 13 },  {  8,  8 }	}		},
-	{ CYCLES_BTR_IMM_REG,		{ {  6,  6 },  {  6,  6 },  {  7,  7 },  {  2,  2 }	}		},
-	{ CYCLES_BTR_IMM_MEM,		{ {  8,  8 },  {  8,  8 },  {  8,  8 },  {  2,  2 }	}		},
-	{ CYCLES_BTR_REG_REG,		{ {  6,  6 },  {  6,  6 },  {  7,  7 },  {  2,  2 }	}		},
-	{ CYCLES_BTR_REG_MEM,		{ { 13, 13 },  { 13, 13 },  { 13, 13 },  {  8,  8 }	}		},
-	{ CYCLES_BTS_IMM_REG,		{ {  6,  6 },  {  6,  6 },  {  7,  7 },  {  2,  2 }	}		},
-	{ CYCLES_BTS_IMM_MEM,		{ {  8,  8 },  {  8,  8 },  {  8,  8 },  {  2,  2 }	}		},
-	{ CYCLES_BTS_REG_REG,		{ {  6,  6 },  {  6,  6 },  {  7,  7 },  {  2,  2 }	}		},
-	{ CYCLES_BTS_REG_MEM,		{ { 13, 13 },  { 13, 13 },  { 13, 13 },  {  8,  8 }	}		},
-	{ CYCLES_CALL,				{ {  7,  7 },  {  3,  3 },  {  1,  1 },  {  3,  3 }	}		},
-	{ CYCLES_CALL_REG,			{ {  7,  7 },  {  5,  5 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_CALL_MEM,			{ { 10, 10 },  {  5,  5 },  {  2,  2 },  {  4,  4 }	}		},
-	{ CYCLES_CALL_INTERSEG,		{ { 17, 34 },  { 18, 20 },  {  4, 13 },  {  9, 14 }	}		},
-	{ CYCLES_CALL_REG_INTERSEG,	{ { 22, 38 },  { 17, 20 },  {  4, 14 },  { 11, 15 }	}		},
-	{ CYCLES_CALL_MEM_INTERSEG,	{ { 22, 38 },  { 17, 20 },  {  4, 14 },  { 11, 15 }	}		},
-	{ CYCLES_JMP_SHORT,			{ {  7,  7 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_JMP,				{ {  7,  7 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_JMP_REG,			{ {  7,  7 },  {  5,  5 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_JMP_MEM,			{ { 10, 10 },  {  5,  5 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_JMP_INTERSEG,		{ { 12, 27 },  { 17, 19 },  {  3,  3 },  {  8, 12 }	}		},
-	{ CYCLES_JMP_REG_INTERSEG,	{ { 17, 31 },  { 13, 18 },  {  4,  4 },  { 10, 10 }	}		},
-	{ CYCLES_JMP_MEM_INTERSEG,	{ { 17, 31 },  { 13, 18 },  {  4,  4 },  { 10, 13 }	}		},
-	{ CYCLES_RET,				{ { 10, 10 },  {  5,  5 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_RET_IMM,			{ { 10, 10 },  {  5,  5 },  {  2,  2 },  {  3,  3 }	}		},
-	{ CYCLES_RET_INTERSEG,		{ { 18, 32 },  { 13, 13 },  {  4,  4 },  { 10, 13 }	}		},
-	{ CYCLES_RET_IMM_INTERSEG,	{ { 18, 32 },  { 14, 14 },  {  4,  4 },  { 10, 13 }	}		},
-	{ CYCLES_JCC_DISP8,			{ {  7,  7 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_JCC_FULL_DISP,		{ {  7,  7 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_JCC_DISP8_NOBRANCH,{ {  3,  3 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_JCC_FULL_DISP_NOBRANCH,{ {  3,  3 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_JCXZ,				{ {  9,  9 },  {  1,  1 },  {  1,  1 },  {  2,  2 }	}		},
-	{ CYCLES_JCXZ_NOBRANCH,		{ {  5,  5 },  {  1,  1 },  {  1,  1 },  {  2,  2 }	}		},
-	{ CYCLES_LOOP,				{ { 11, 11 },  {  6,  6 },  {  5,  5 },  {  2,  2 }	}		},
-	{ CYCLES_LOOPZ,				{ { 11, 11 },  {  9,  9 },  {  8,  8 },  {  2,  2 }	}		},
-	{ CYCLES_LOOPNZ,			{ { 11, 11 },  {  9,  9 },  {  8,  8 },  {  2,	2 }	}		},
-	{ CYCLES_SETCC_REG,			{ {  4,  4 },  {  3,  3 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_SETCC_MEM,			{ {  5,  5 },  {  4,  4 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_ENTER,				{ { 10, 10 },  { 14, 14 },  { 11, 11 },  { 13, 13 }	}		},
-	{ CYCLES_LEAVE,				{ {  4,  4 },  {  5,  5 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_INT,				{ { 37, 37 },  { 30, 30 },  { 16, 16 },  { 19, 19 }	}		},
-	{ CYCLES_INT3,				{ { 33, 33 },  { 26, 26 },  { 13, 13 },  { 19, 19 }	}		},
-	{ CYCLES_INTO_OF1,			{ { 35, 35 },  { 28, 28 },  { 13, 13 },  { 19, 19 }	}		},
-	{ CYCLES_INTO_OF0,			{ {  3,  3 },  {  3,  3 },  {  4,  4 },  {  4,  4 }	}		},
-	{ CYCLES_BOUND_IN_RANGE,	{ { 10, 10 },  {  7,  7 },  {  8,  8 },  {  7,  7 }	}		},
-	{ CYCLES_BOUND_OUT_RANGE,	{ { 44, 44 },  {  7,  7 },  {  8,  8 },  {  8,  8 }	}		},
-	{ CYCLES_IRET,				{ { 22, 22 },  { 15, 15 },  {  8,  8 },  { 13, 13 }	}		},
-	{ CYCLES_HLT,				{ {  5,  5 },  {  4,  4 },  {  4,  4 },  { 10, 10 }	}		},
-	{ CYCLES_MOV_REG_CR0,		{ { 11, 11 },  { 16, 16 },  { 16, 16 },  { 20, 18 }	}		},
-	{ CYCLES_MOV_REG_CR2,		{ {  4,  4 },  {  4,  4 },  {  4,  4 },  {  5,  5 }	}		},
-	{ CYCLES_MOV_REG_CR3,		{ {  5,  5 },  {  4,  4 },  {  4,  4 },  {  5,  6 }	}		},
-	{ CYCLES_MOV_CR_REG,		{ {  6,  6 },  {  4,  4 },  {  4,  4 },  {  6,  6 }	}		},
-	{ CYCLES_MOV_REG_DR0_3,		{ { 22, 22 },  { 10, 10 },  { 10, 10 },  { 10, 10 }	}		},
-	{ CYCLES_MOV_REG_DR6_7,		{ { 16, 16 },  { 10, 10 },  { 10, 10 },  { 10, 10 }	}		},
-	{ CYCLES_MOV_DR6_7_REG,		{ { 14, 14 },  { 11, 11 },  { 11, 11 },  {  9,  9 }	}		},
-	{ CYCLES_MOV_DR0_3_REG,		{ { 22, 22 },  { 11, 11 },  { 11, 11 },  {  9,  9 }	}		},
-	{ CYCLES_MOV_REG_TR6_7,		{ { 12, 12 },  {  4,  4 },  {  4,  4 },  { 11, 11 }	}		},
-	{ CYCLES_MOV_TR6_7_REG,		{ { 12, 12 },  {  3,  3 },  {  3,  3 },  {  3,  3 }	}		},
-	{ CYCLES_NOP,				{ {  3,  3 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_WAIT,				{ {  7,  7 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_ARPL_REG,			{ {  0, 20 },  {  0,  9 },  {  0,  7 },  {  0,  9 }	}		},
-	{ CYCLES_ARPL_MEM,			{ {  0, 21 },  {  0,  9 },  {  0,  7 },  {  0,  9 }	}		},
-	{ CYCLES_LAR_REG,			{ {  0, 15 },  { 11, 11 },  {  8,  8 },  {  0,  9 }	}		},
-	{ CYCLES_LAR_MEM,			{ {  0, 16 },  { 11, 11 },  {  8,  8 },  {  0,  9 }	}		},
-	{ CYCLES_LGDT,				{ { 11, 11 },  { 11, 11 },  {  6,  6 },  { 10, 10 }	}		},
-	{ CYCLES_LIDT,				{ { 11, 11 },  { 11, 11 },  {  6,  6 },  { 10, 10 }	}		},
-	{ CYCLES_LLDT_REG,			{ {  0, 20 },  { 11, 11 },  {  9,  9 },  {  0,  8 }	}		},
-	{ CYCLES_LLDT_MEM,			{ {  0, 24 },  { 11, 11 },  {  9,  9 },  {  0,  8 }	}		},
-	{ CYCLES_LMSW_REG,			{ { 11, 11 },  { 13, 13 },  {  8,  8 },  { 11, 11 }	}		},
-	{ CYCLES_LMSW_MEM,			{ { 14, 14 },  { 13, 13 },  {  8,  8 },  { 11, 11 }	}		},
-	{ CYCLES_LSL_REG,			{ {  0, 21 },  { 10, 10 },  {  8,  8 },  {  0,  9 }	}		},
-	{ CYCLES_LSL_MEM,			{ {  0, 22 },  { 10, 10 },  {  8,  8 },  {  0,  9 }	}		},
-	{ CYCLES_LTR_REG,			{ {  0, 23 },  { 20, 20 },  { 10, 10 },  {  0,  9 }	}		},
-	{ CYCLES_LTR_MEM,			{ {  0, 27 },  { 20, 20 },  { 10, 10 },  {  0,  9 }	}		},
-	{ CYCLES_SGDT,				{ {  9,  9 },  { 10, 10 },  {  4,  4 },  {  6,  6 }	}		},
-	{ CYCLES_SIDT,				{ {  9,  9 },  { 10, 10 },  {  4,  4 },  {  6,  6 }	}		},
-	{ CYCLES_SLDT_REG,			{ {  0,  2 },  {  2,  2 },  {  2,  2 },  {  0,  1 }	}		},
-	{ CYCLES_SLDT_MEM,			{ {  0,  2 },  {  3,  3 },  {  2,  2 },  {  0,  1 }	}		},
-	{ CYCLES_SMSW_REG,			{ {  2,  2 },  {  2,  2 },  {  4,  4 },  {  4,  4 }	}		},
-	{ CYCLES_SMSW_MEM,			{ {  2,  2 },  {  3,  3 },  {  4,  4 },  {  4,  4 }	}		},
-	{ CYCLES_STR_REG,			{ {  0,  2 },  {  2,  2 },  {  2,  2 },  {  0,  3 }	}		},
-	{ CYCLES_STR_MEM,			{ {  0,  2 },  {  3,  3 },  {  2,  2 },  {  0,  3 }	}		},
-	{ CYCLES_VERR_REG,			{ {  0, 10 },  { 11, 11 },  {  7,  7 },  {  0,  8 }	}		},
-	{ CYCLES_VERR_MEM,			{ {  0, 11 },  { 11, 11 },  {  7,  7 },  {  0,  8 }	}		},
-	{ CYCLES_VERW_REG,			{ {  0, 15 },  { 11, 11 },  {  7,  7 },  {  0,  8 }	}		},
-	{ CYCLES_VERW_MEM,			{ {  0, 16 },  { 11, 11 },  {  7,  7 },  {  0,  8 }	}		},
-	{ CYCLES_LOCK,				{ {  0,  0 },  {  1,  1 },  {  1,  1 },  {  1,  1 }	}		},
-
-	/* i486+ */
-	{ CYCLES_BSWAP,				{ {  0,  0 },  {  1,  1 },  {  1,  1 },  {  6,  6 }	}		},
-	{ CYCLES_CMPXCHG,			{ {  0,  0 },  {  6,  6 },  {  5,  5 },  {  6,  6 }	}		},
-	{ CYCLES_INVD,				{ {  0,  0 },  {  4,  4 },  { 15, 15 },  { 20, 20 }	}		},
-	{ CYCLES_XADD,				{ {  0,  0 },  {  4,  4 },  {  4,  4 },  {  2,  2 }	}		},
-
-	/* Pentium+ */
-	{ CYCLES_CMPXCHG8B,			{ {  0,  0 },  {  0,  0 },  { 10, 10 },  {  6,  6 }	}		},
-	{ CYCLES_CPUID,				{ {  0,  0 },  {  0,  0 },  { 14, 14 },  { 12, 12 }	}		},
-	{ CYCLES_CPUID_EAX1,		{ {  0,  0 },  {  0,  0 },  { 14, 14 },  { 12, 12 }	}		},
-	{ CYCLES_RDTSC,				{ {  0,  0 },  {  0,  0 },  { 20, 20 },  {  1,  1 }	}		},
-	{ CYCLES_RSM,				{ {  0,  0 },  {  0,  0 },  { 82, 82 },  { 57, 57 }	}		},
-	{ CYCLES_RDMSR,				{ {  0,  0 },  {  0,  0 },  { 20, 20 },  {  1,  1 }	}		},
-
-	/* FPU */
-	{ CYCLES_FABS,				{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FADD,				{ {  0,  0 },  {  8,  8 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_FBLD,				{ {  0,  0 },  { 70, 70 },  { 48, 48 },  {  1,  1 }	}		},
-	{ CYCLES_FBSTP,				{ {  0,  0 },  {172,172 },  {148,148 },  {  1,  1 }	}		},
-	{ CYCLES_FCHS,				{ {  0,  0 },  {  6,  6 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FCLEX,				{ {  0,  0 },  {  7,  7 },  {  9,  9 },  {  1,  1 }	}		},
-	{ CYCLES_FCOM,				{ {  0,  0 },  {  4,  4 },  {  4,  4 },  {  1,  1 }	}		},
-	{ CYCLES_FCOS,				{ {  0,  0 },  {255,255 },  {124,124 },  {  1,  1 }	}		},
-	{ CYCLES_FDECSTP,			{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FDISI,				{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FDIV,				{ {  0,  0 },  { 73, 73 },  { 39, 39 },  {  1,  1 }	}		},
-	{ CYCLES_FDIVR,				{ {  0,  0 },  { 73, 73 },  { 39, 39 },  {  1,  1 }	}		},
-	{ CYCLES_FENI,				{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FFREE,				{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FIADD,				{ {  0,  0 },  { 20, 20 },  {  7,  7 },  {  1,  1 }	}		},
-	{ CYCLES_FICOM,				{ {  0,  0 },  { 16, 16 },  {  8,  8 },  {  1,  1 }	}		},
-	{ CYCLES_FIDIV,				{ {  0,  0 },  { 85, 85 },  { 42, 42 },  {  1,  1 }	}		},
-	{ CYCLES_FILD,				{ {  0,  0 },  { 13, 13 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_FIMUL,				{ {  0,  0 },  { 23, 23 },  {  7,  7 },  {  1,  1 }	}		},
-	{ CYCLES_FINCSTP,			{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FINIT,				{ {  0,  0 },  { 17, 17 },  { 16, 16 },  {  1,  1 }	}		},
-	{ CYCLES_FIST,				{ {  0,  0 },  { 29, 29 },  {  6,  6 },  {  1,  1 }	}		},
-	{ CYCLES_FISUB,				{ {  0,  0 },  { 20, 20 },  {  7,  7 },  {  1,  1 }	}		},
-	{ CYCLES_FLD,				{ {  0,  0 },  {  4,  4 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FLDZ,				{ {  0,  0 },  {  4,  4 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_FLD1,				{ {  0,  0 },  {  4,  4 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_FLDL2E,			{ {  0,  0 },  {  8,  8 },  {  5,  5 },  {  1,  1 }	}		},
-	{ CYCLES_FLDL2T,			{ {  0,  0 },  {  8,  8 },  {  5,  5 },  {  1,  1 }	}		},
-	{ CYCLES_FLDLG2,			{ {  0,  0 },  {  8,  8 },  {  5,  5 },  {  1,  1 }	}		},
-	{ CYCLES_FLDLN2,			{ {  0,  0 },  {  8,  8 },  {  5,  5 },  {  1,  1 }	}		},
-	{ CYCLES_FLDPI,				{ {  0,  0 },  {  8,  8 },  {  5,  5 },  {  1,  1 }	}		},
-	{ CYCLES_FLDCW,				{ {  0,  0 },  {  4,  4 },  {  7,  7 },  {  1,  1 }	}		},
-	{ CYCLES_FLDENV,			{ {  0,  0 },  { 44, 44 },  { 37, 37 },  {  1,  1 }	}		},
-	{ CYCLES_FMUL,				{ {  0,  0 },  { 16, 16 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_FNOP,				{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FPATAN,			{ {  0,  0 },  {218,218 },  {173,173 },  {  1,  1 }	}		},
-	{ CYCLES_FPREM,				{ {  0,  0 },  { 70, 70 },  { 16, 16 },  {  1,  1 }	}		},
-	{ CYCLES_FPREM1,			{ {  0,  0 },  { 72, 72 },  { 20, 20 },  {  1,  1 }	}		},
-	{ CYCLES_FPTAN,				{ {  0,  0 },  {200,200 },  {173,173 },  {  1,  1 }	}		},
-	{ CYCLES_FRNDINT,			{ {  0,  0 },  { 21, 21 },  {  9,  9 },  {  1,  1 }	}		},
-	{ CYCLES_FRSTOR,			{ {  0,  0 },  {131,131 },  { 75, 75 },  {  1,  1 }	}		},
-	{ CYCLES_FSAVE,				{ {  0,  0 },  {154,154 },  {127,127 },  {  1,  1 }	}		},
-	{ CYCLES_FSCALE,			{ {  0,  0 },  { 30, 30 },  { 20, 20 },  {  1,  1 }	}		},
-	{ CYCLES_FSETPM,			{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FSIN,				{ {  0,  0 },  {255,255 },  {126,126 },  {  1,  1 }	}		},
-	{ CYCLES_FSINCOS,			{ {  0,  0 },  {255,255 },  {137,137 },  {  1,  1 }	}		},
-	{ CYCLES_FSQRT,				{ {  0,  0 },  { 83, 83 },  { 70, 70 },  {  1,  1 }	}		},
-	{ CYCLES_FST,				{ {  0,  0 },  {  3,  3 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FSTCW,				{ {  0,  0 },  {  3,  3 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_FSTENV,			{ {  0,  0 },  { 67, 67 },  { 48, 48 },  {  1,  1 }	}		},
-	{ CYCLES_FSTSW,				{ {  0,  0 },  {  3,  3 },  {  2,  2 },  {  1,  1 }	}		},
-	{ CYCLES_FSUB,				{ {  0,  0 },  {  8,  8 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_FSUBR,				{ {  0,  0 },  {  8,  8 },  {  3,  3 },  {  1,  1 }	}		},
-	{ CYCLES_FTST,				{ {  0,  0 },  {  4,  4 },  {  4,  4 },  {  1,  1 }	}		},
-	{ CYCLES_FUCOM,				{ {  0,  0 },  {  4,  4 },  {  4,  4 },  {  1,  1 }	}		},
-	{ CYCLES_FXAM,				{ {  0,  0 },  {  8,  8 },  { 21, 21 },  {  1,  1 }	}		},
-	{ CYCLES_FXCH,				{ {  0,  0 },  {  4,  4 },  {  1,  1 },  {  1,  1 }	}		},
-	{ CYCLES_FXTRACT,			{ {  0,  0 },  { 16, 16 },  { 13, 13 },  {  1,  1 }	}		},
-	{ CYCLES_FYL2X,				{ {  0,  0 },  {196,196 },  {111,111 },  {  1,  1 }	}		},
-	{ CYCLES_FYL2XPI,			{ {  0,  0 },  {171,171 },  {103,103 },  {  1,  1 }	}		},
-	{ CYCLES_CMPXCHG_REG_REG_T,	{ {  0,  0 },  {  6,  6 },  {  6,  6 },  {  6,  6 } }		},
-	{ CYCLES_CMPXCHG_REG_REG_F,	{ {  0,  0 },  {  9,  9 },  {  9,  9 },  {  9,  9 } }		},
-	{ CYCLES_CMPXCHG_REG_MEM_T,	{ {  0,  0 },  {  7,  7 },  {  7,  7 },  {  7,  7 } }		},
-	{ CYCLES_CMPXCHG_REG_MEM_F,	{ {  0,  0 },  { 10, 10 },  { 10, 10 },  { 10, 10 } }		},
-};
-
-#endif /* __CYCLES_H__ */
@@ -1,868 +0,0 @@
-/*
-    Intel 386 emulator
-
-    Written by Ville Linde
-
-    Currently supports:
-        Intel 386
-        Intel 486
-        Intel Pentium
-        Cyrix MediaGX
-*/
-
-#include <string.h>
-#include "driver.h"
-#include "state.h"
-#include "i386priv.h"
-#include "i386.h"
-#include "mamedbg.h"
-
-int i386_ICount;
-
-/* the 0.139 core stops on what it does not implement; here it is logged once */
-static void i386_fatal(const char *fmt, ...)
-{
-	static int reported;
-	if (!reported)
-	{
-		char buf[256];
-		va_list va;
-		va_start(va, fmt);
-		vsprintf(buf, fmt, va);
-		va_end(va);
-		log_cb(RETRO_LOG_ERROR, LOGPRE "%s\n", buf);
-		reported = 1;
-	}
-}
-
-/* seems to be defined on mingw-gcc */
-#undef i386
-
-int i386_parity_table[256];
-MODRM_TABLE i386_MODRM_table[256];
-
-/*************************************************************************/
-
-#define INT_DEBUG	1
-
-static void i386_load_protected_mode_segment(i386_state *cpustate, I386_SREG *seg )
-{
-	UINT32 v1,v2;
-	UINT32 base, limit;
-	int entry;
-
-	if ( seg->selector & 0x4 )
-	{
-		base = cpustate->ldtr.base;
-		limit = cpustate->ldtr.limit;
-	} else {
-		base = cpustate->gdtr.base;
-		limit = cpustate->gdtr.limit;
-	}
-
-	if (limit == 0 || seg->selector + 7 > limit)
-		return;
-	entry = seg->selector & ~0x7;
-
-	v1 = READ32(cpustate, base + entry );
-	v2 = READ32(cpustate, base + entry + 4 );
-
-	seg->flags = (v2 >> 8) & 0xf0ff;
-	seg->base = (v2 & 0xff000000) | ((v2 & 0xff) << 16) | ((v1 >> 16) & 0xffff);
-	seg->limit = (v2 & 0xf0000) | (v1 & 0xffff);
-	if (seg->flags & 0x8000)
-		seg->limit = (seg->limit << 12) | 0xfff;
-	seg->d = (seg->flags & 0x4000) ? 1 : 0;
-}
-
-static void i386_load_segment_descriptor(i386_state *cpustate, int segment )
-{
-	if (PROTECTED_MODE)
-	{
-		if (!V8086_MODE)
-			i386_load_protected_mode_segment(cpustate, &cpustate->sreg[segment] );
-		else
-		{
-			cpustate->sreg[segment].base = cpustate->sreg[segment].selector << 4;
-			cpustate->sreg[segment].limit = 0xffff;
-			cpustate->sreg[segment].flags = (segment == CS) ? 0x009a : 0x0092;
-		}
-	}
-	else
-	{
-		cpustate->sreg[segment].base = cpustate->sreg[segment].selector << 4;
-
-		if( segment == CS && !cpustate->performed_intersegment_jump )
-			cpustate->sreg[segment].base |= 0xfff00000;
-	}
-}
-
-static UINT32 get_flags(i386_state *cpustate)
-{
-	UINT32 f = 0x2;
-	f |= cpustate->CF;
-	f |= cpustate->PF << 2;
-	f |= cpustate->AF << 4;
-	f |= cpustate->ZF << 6;
-	f |= cpustate->SF << 7;
-	f |= cpustate->TF << 8;
-	f |= cpustate->IF << 9;
-	f |= cpustate->DF << 10;
-	f |= cpustate->OF << 11;
-	f |= cpustate->IOP1 << 12;
-	f |= cpustate->IOP2 << 13;
-	f |= cpustate->NT << 14;
-	return (cpustate->eflags & cpustate->eflags_mask) | (f & 0xffff);
-}
-
-static void set_flags(i386_state *cpustate, UINT32 f )
-{
-	cpustate->CF = (f & 0x1) ? 1 : 0;
-	cpustate->PF = (f & 0x4) ? 1 : 0;
-	cpustate->AF = (f & 0x10) ? 1 : 0;
-	cpustate->ZF = (f & 0x40) ? 1 : 0;
-	cpustate->SF = (f & 0x80) ? 1 : 0;
-	cpustate->TF = (f & 0x100) ? 1 : 0;
-	cpustate->IF = (f & 0x200) ? 1 : 0;
-	cpustate->DF = (f & 0x400) ? 1 : 0;
-	cpustate->OF = (f & 0x800) ? 1 : 0;
-	cpustate->IOP1 = (f & 0x1000) ? 1 : 0;
-	cpustate->IOP2 = (f & 0x2000) ? 1 : 0;
-	cpustate->NT = (f & 0x4000) ? 1 : 0;
-	cpustate->eflags = f & cpustate->eflags_mask;
-}
-
-static void sib_byte(i386_state *cpustate,UINT8 mod, UINT32* out_ea, UINT8* out_segment)
-{
-	UINT32 ea = 0;
-	UINT8 segment = 0;
-	UINT8 scale, i, base;
-	UINT8 sib = FETCH(cpustate);
-	scale = (sib >> 6) & 0x3;
-	i = (sib >> 3) & 0x7;
-	base = sib & 0x7;
-
-	switch( base )
-	{
-		case 0: ea = REG32(EAX); segment = DS; break;
-		case 1: ea = REG32(ECX); segment = DS; break;
-		case 2: ea = REG32(EDX); segment = DS; break;
-		case 3: ea = REG32(EBX); segment = DS; break;
-		case 4: ea = REG32(ESP); segment = SS; break;
-		case 5:
-			if( mod == 0 ) {
-				ea = FETCH32(cpustate);
-				segment = DS;
-			} else if( mod == 1 ) {
-				ea = REG32(EBP);
-				segment = SS;
-			} else if( mod == 2 ) {
-				ea = REG32(EBP);
-				segment = SS;
-			}
-			break;
-		case 6: ea = REG32(ESI); segment = DS; break;
-		case 7: ea = REG32(EDI); segment = DS; break;
-	}
-	switch( i )
-	{
-		case 0: ea += REG32(EAX) * (1 << scale); break;
-		case 1: ea += REG32(ECX) * (1 << scale); break;
-		case 2: ea += REG32(EDX) * (1 << scale); break;
-		case 3: ea += REG32(EBX) * (1 << scale); break;
-		case 4: break;
-		case 5: ea += REG32(EBP) * (1 << scale); break;
-		case 6: ea += REG32(ESI) * (1 << scale); break;
-		case 7: ea += REG32(EDI) * (1 << scale); break;
-	}
-	*out_ea = ea;
-	*out_segment = segment;
-}
-
-static void modrm_to_EA(i386_state *cpustate,UINT8 mod_rm, UINT32* out_ea, UINT8* out_segment)
-{
-	INT8 disp8;
-	INT16 disp16;
-	INT32 disp32;
-	UINT8 mod = (mod_rm >> 6) & 0x3;
-	UINT8 rm = mod_rm & 0x7;
-	UINT32 ea;
-	UINT8 segment;
-
-	if( mod_rm >= 0xc0 )
-		i386_fatal("i386: Called modrm_to_EA with modrm value %02X !",mod_rm);
-
-	if( cpustate->address_size ) {
-		switch( rm )
-		{
-			default:
-			case 0: ea = REG32(EAX); segment = DS; break;
-			case 1: ea = REG32(ECX); segment = DS; break;
-			case 2: ea = REG32(EDX); segment = DS; break;
-			case 3: ea = REG32(EBX); segment = DS; break;
-			case 4: sib_byte(cpustate, mod, &ea, &segment ); break;
-			case 5:
-				if( mod == 0 ) {
-					ea = FETCH32(cpustate); segment = DS;
-				} else {
-					ea = REG32(EBP); segment = SS;
-				}
-				break;
-			case 6: ea = REG32(ESI); segment = DS; break;
-			case 7: ea = REG32(EDI); segment = DS; break;
-		}
-		if( mod == 1 ) {
-			disp8 = FETCH(cpustate);
-			ea += (INT32)disp8;
-		} else if( mod == 2 ) {
-			disp32 = FETCH32(cpustate);
-			ea += disp32;
-		}
-
-		if( cpustate->segment_prefix )
-			segment = cpustate->segment_override;
-
-		*out_ea = ea;
-		*out_segment = segment;
-
-	} else {
-		switch( rm )
-		{
-			default:
-			case 0: ea = REG16(BX) + REG16(SI); segment = DS; break;
-			case 1: ea = REG16(BX) + REG16(DI); segment = DS; break;
-			case 2: ea = REG16(BP) + REG16(SI); segment = SS; break;
-			case 3: ea = REG16(BP) + REG16(DI); segment = SS; break;
-			case 4: ea = REG16(SI); segment = DS; break;
-			case 5: ea = REG16(DI); segment = DS; break;
-			case 6:
-				if( mod == 0 ) {
-					ea = FETCH16(cpustate); segment = DS;
-				} else {
-					ea = REG16(BP); segment = SS;
-				}
-				break;
-			case 7: ea = REG16(BX); segment = DS; break;
-		}
-		if( mod == 1 ) {
-			disp8 = FETCH(cpustate);
-			ea += (INT32)disp8;
-		} else if( mod == 2 ) {
-			disp16 = FETCH16(cpustate);
-			ea += (INT32)disp16;
-		}
-
-		if( cpustate->segment_prefix )
-			segment = cpustate->segment_override;
-
-		*out_ea = ea & 0xffff;
-		*out_segment = segment;
-	}
-}
-
-static UINT32 GetNonTranslatedEA(i386_state *cpustate,UINT8 modrm)
-{
-	UINT8 segment;
-	UINT32 ea;
-	modrm_to_EA(cpustate, modrm, &ea, &segment );
-	return ea;
-}
-
-static UINT32 GetEA(i386_state *cpustate,UINT8 modrm)
-{
-	UINT8 segment;
-	UINT32 ea;
-	modrm_to_EA(cpustate, modrm, &ea, &segment );
-	return i386_translate(cpustate, segment, ea );
-}
-
-static void i386_trap(i386_state *cpustate,int irq, int irq_gate)
-{
-	/*  I386 Interrupts/Traps/Faults:
-     *
-     *  0x00    Divide by zero
-     *  0x01    Debug exception
-     *  0x02    NMI
-     *  0x03    Int3
-     *  0x04    Overflow
-     *  0x05    Array bounds check
-     *  0x06    Illegal Opcode
-     *  0x07    FPU not available
-     *  0x08    Double fault
-     *  0x09    Coprocessor segment overrun
-     *  0x0a    Invalid task state
-     *  0x0b    Segment not present
-     *  0x0c    Stack exception
-     *  0x0d    General Protection Fault
-     *  0x0e    Page fault
-     *  0x0f    Reserved
-     *  0x10    Coprocessor error
-     */
-	UINT32 v1, v2;
-	UINT32 offset;
-	UINT16 segment;
-	int entry = irq * (PROTECTED_MODE ? 8 : 4);
-
-	/* Check if IRQ is out of IDTR's bounds */
-	if( entry > cpustate->idtr.limit ) {
-		i386_fatal("I386 Interrupt: IRQ out of IDTR bounds (IRQ: %d, IDTR Limit: %d)", irq, cpustate->idtr.limit);
-	}
-
-	if( !(PROTECTED_MODE) )
-	{
-		/* 16-bit */
-		PUSH16(cpustate, get_flags(cpustate) & 0xffff );
-		PUSH16(cpustate, cpustate->sreg[CS].selector );
-		PUSH16(cpustate, cpustate->eip );
-
-		cpustate->sreg[CS].selector = READ16(cpustate, cpustate->idtr.base + entry + 2 );
-		cpustate->eip = READ16(cpustate, cpustate->idtr.base + entry );
-
-		/* Interrupts that vector through either interrupt gates or trap gates cause TF */
-		/* (the trap flag) to be reset after the current value of TF is saved on the stack as part of EFLAGS. */
-		cpustate->TF = 0;
-
-		if (irq_gate)
-		{
-			cpustate->IF = 0;
-		}
-
-	}
-	else
-	{
-		int type;
-		/* 32-bit */
-
-		v1 = READ32(cpustate, cpustate->idtr.base + entry );
-		v2 = READ32(cpustate, cpustate->idtr.base + entry + 4 );
-		offset = (v2 & 0xffff0000) | (v1 & 0xffff);
-		segment = (v1 >> 16) & 0xffff;
-		type = (v2>>8) & 0x1F;
-
-		if(type != 0x0e && type != 0x0f)  /* if not 386 interrupt or trap gate */
-		{
-			PUSH16(cpustate, get_flags(cpustate) & 0xffff );
-			PUSH16(cpustate, cpustate->sreg[CS].selector );
-			PUSH16(cpustate, cpustate->eip );
-		}
-		else
-		{
-			PUSH32(cpustate, get_flags(cpustate) & 0x00fcffff );
-			PUSH32(cpustate, cpustate->sreg[CS].selector );
-			PUSH32(cpustate, cpustate->eip );
-		}
-
-		cpustate->sreg[CS].selector = segment;
-		cpustate->eip = offset;
-
-		/* Interrupts that vector through either interrupt gates or trap gates cause TF */
-		/* (the trap flag) to be reset after the current value of TF is saved on the stack as part of EFLAGS. */
-		if ((type == 14) || (type==15))
-			cpustate->TF = 0;
-
-		if (type == 14)
-		{
-			cpustate->IF = 0;
-		}
-
-	}
-
-	i386_load_segment_descriptor(cpustate,CS);
-	CHANGE_PC(cpustate,cpustate->eip);
-
-}
-
-static void i386_check_irq_line(i386_state *cpustate)
-{
-	/* Check if the interrupts are enabled */
-	if ( (cpustate->irq_state) && cpustate->IF )
-	{
-		i386_ICount -= 2;
-		i386_trap(cpustate,cpustate->irq_callback(0), 1);
-	}
-}
-
-#include "cycles.h"
-
-static UINT8 *cycle_table_rm[X86_NUM_CPUS];
-static UINT8 *cycle_table_pm[X86_NUM_CPUS];
-
-#define CYCLES_NUM(x)	(i386_ICount -= (x))
-
-static INLINE void CYCLES(i386_state *cpustate,int x)
-{
-	if (PROTECTED_MODE)
-	{
-		i386_ICount -= cpustate->cycle_table_pm[x];
-	}
-	else
-	{
-		i386_ICount -= cpustate->cycle_table_rm[x];
-	}
-}
-
-static INLINE void CYCLES_RM(i386_state *cpustate,int modrm, int r, int m)
-{
-	if (modrm >= 0xc0)
-	{
-		if (PROTECTED_MODE)
-		{
-			i386_ICount -= cpustate->cycle_table_pm[r];
-		}
-		else
-		{
-			i386_ICount -= cpustate->cycle_table_rm[r];
-		}
-	}
-	else
-	{
-		if (PROTECTED_MODE)
-		{
-			i386_ICount -= cpustate->cycle_table_pm[m];
-		}
-		else
-		{
-			i386_ICount -= cpustate->cycle_table_rm[m];
-		}
-	}
-}
-
-static UINT8 cycle_tables[X86_NUM_CPUS][2][CYCLES_NUM_OPCODES];
-
-static void build_cycle_table(void)
-{
-	int i, j;
-	for (j=0; j < X86_NUM_CPUS; j++)
-	{
-		cycle_table_rm[j] = cycle_tables[j][0];
-		cycle_table_pm[j] = cycle_tables[j][1];
-
-		for (i=0; i < sizeof(x86_cycle_table)/sizeof(X86_CYCLE_TABLE); i++)
-		{
-			int opcode = x86_cycle_table[i].op;
-			cycle_table_rm[j][opcode] = x86_cycle_table[i].cpu_cycles[j][0];
-			cycle_table_pm[j][opcode] = x86_cycle_table[i].cpu_cycles[j][1];
-		}
-	}
-}
-
-/* Forward declarations */
-static void I386OP(decode_opcode)(i386_state *cpustate);
-static void I386OP(decode_two_byte)(i386_state *cpustate);
-
-
-
-#include "i386ops.c"
-#include "i386op16.c"
-#include "i386op32.c"
-#include "i486ops.c"
-#include "pentops.c"
-#include "x87ops.c"
-#include "i386ops.h"
-
-static void I386OP(decode_opcode)(i386_state *cpustate)
-{
-	cpustate->opcode = FETCH(cpustate);
-	if( cpustate->operand_size )
-		cpustate->opcode_table1_32[cpustate->opcode](cpustate);
-	else
-		cpustate->opcode_table1_16[cpustate->opcode](cpustate);
-}
-
-/* Two-byte opcode prefix */
-static void I386OP(decode_two_byte)(i386_state *cpustate)
-{
-	cpustate->opcode = FETCH(cpustate);
-	if( cpustate->operand_size )
-		cpustate->opcode_table2_32[cpustate->opcode](cpustate);
-	else
-		cpustate->opcode_table2_16[cpustate->opcode](cpustate);
-}
-
-/*************************************************************************/
-
-static void build_opcode_table(i386_state *cpustate, UINT32 features)
-{
-	int i;
-	for (i=0; i < 256; i++)
-	{
-		cpustate->opcode_table1_16[i] = I386OP(invalid);
-		cpustate->opcode_table1_32[i] = I386OP(invalid);
-		cpustate->opcode_table2_16[i] = I386OP(invalid);
-		cpustate->opcode_table2_32[i] = I386OP(invalid);
-	}
-
-	for (i=0; i < sizeof(x86_opcode_table)/sizeof(X86_OPCODE); i++)
-	{
-		const X86_OPCODE *op = &x86_opcode_table[i];
-
-		if ((op->flags & features))
-		{
-			if (op->flags & OP_2BYTE)
-			{
-				cpustate->opcode_table2_32[op->opcode] = op->handler32;
-				cpustate->opcode_table2_16[op->opcode] = op->handler16;
-			}
-			else
-			{
-				cpustate->opcode_table1_32[op->opcode] = op->handler32;
-				cpustate->opcode_table1_16[op->opcode] = op->handler16;
-			}
-		}
-	}
-}
-
-
-/*************************************************************************
-
-    The interface of the CPU core (MAME 0.78 style): one context, copied
-    in and out by the CPU switch
-
-*************************************************************************/
-
-static i386_state I;
-
-static void i386_postload(void)
-{
-	i386_state *cpustate = &I;
-	int i;
-	for (i = 0; i < 6; i++)
-		i386_load_segment_descriptor(cpustate,i);
-	CHANGE_PC(cpustate,cpustate->eip);
-}
-
-/* the fast memory regions of the driver */
-static struct
-{
-	UINT32 start, end;
-	UINT8 *base;
-	int flags;
-} i386_fastmem[I386_FASTMEM_MAX];
-static int i386_fastmem_count;
-
-void i386_set_fastmem(UINT32 start, UINT32 end, UINT8 *base, int flags)
-{
-	if (i386_fastmem_count < I386_FASTMEM_MAX)
-	{
-		i386_fastmem[i386_fastmem_count].start = start;
-		i386_fastmem[i386_fastmem_count].end = end;
-		i386_fastmem[i386_fastmem_count].base = base;
-		i386_fastmem[i386_fastmem_count].flags = flags;
-		i386_fastmem_count++;
-	}
-	/* empty the caches */
-	memset(I.fast_size, 0, sizeof(I.fast_size));
-}
-
-/* a miss of the cache: the region of the address, cached; NULL if none */
-static UINT8 *i386_fast_lookup(i386_state *cpustate, UINT32 address, UINT32 len, int kind)
-{
-	int i;
-
-	for (i = 0; i < i386_fastmem_count; i++)
-	{
-		if ((i386_fastmem[i].flags & (1 << kind)) && address >= i386_fastmem[i].start &&
-			address <= i386_fastmem[i].end && i386_fastmem[i].end - address >= len - 1)
-		{
-			cpustate->fast_start[kind] = i386_fastmem[i].start;
-			cpustate->fast_size[kind] = i386_fastmem[i].end - i386_fastmem[i].start + 1;
-			cpustate->fast_base[kind] = i386_fastmem[i].base;
-			return i386_fastmem[i].base + (address - i386_fastmem[i].start);
-		}
-	}
-	return NULL;
-}
-
-void i386_init(void)
-{
-	int i, j;
-	static const int regs8[8] = {AL,CL,DL,BL,AH,CH,DH,BH};
-	static const int regs16[8] = {AX,CX,DX,BX,SP,BP,SI,DI};
-	static const int regs32[8] = {EAX,ECX,EDX,EBX,ESP,EBP,ESI,EDI};
-	int cpu = cpu_getactivecpu();
-	i386_state *cpustate = &I;
-	static const char *const sregname[6] = { "es", "cs", "ss", "ds", "fs", "gs" };
-
-	i386_fastmem_count = 0;
-	memset(I.fast_size, 0, sizeof(I.fast_size));
-	build_cycle_table();
-
-	for( i=0; i < 256; i++ ) {
-		int c=0;
-		for( j=0; j < 8; j++ ) {
-			if( i & (1 << j) )
-				c++;
-		}
-		i386_parity_table[i] = ~(c & 0x1) & 0x1;
-	}
-
-	for( i=0; i < 256; i++ ) {
-		i386_MODRM_table[i].reg.b = regs8[(i >> 3) & 0x7];
-		i386_MODRM_table[i].reg.w = regs16[(i >> 3) & 0x7];
-		i386_MODRM_table[i].reg.d = regs32[(i >> 3) & 0x7];
-
-		i386_MODRM_table[i].rm.b = regs8[i & 0x7];
-		i386_MODRM_table[i].rm.w = regs16[i & 0x7];
-		i386_MODRM_table[i].rm.d = regs32[i & 0x7];
-	}
-
-	state_save_register_UINT32("i386", cpu, "reg", cpustate->reg.d, 8);
-	for (i = 0; i < 6; i++)
-	{
-		char name[16];
-		sprintf(name, "%s_sel", sregname[i]);
-		state_save_register_UINT16("i386", cpu, name, &cpustate->sreg[i].selector, 1);
-		sprintf(name, "%s_flags", sregname[i]);
-		state_save_register_UINT16("i386", cpu, name, &cpustate->sreg[i].flags, 1);
-		sprintf(name, "%s_base", sregname[i]);
-		state_save_register_UINT32("i386", cpu, name, &cpustate->sreg[i].base, 1);
-		sprintf(name, "%s_limit", sregname[i]);
-		state_save_register_UINT32("i386", cpu, name, &cpustate->sreg[i].limit, 1);
-		sprintf(name, "%s_d", sregname[i]);
-		state_save_register_int("i386", cpu, name, &cpustate->sreg[i].d);
-	}
-	state_save_register_UINT32("i386", cpu, "eip", &cpustate->eip, 1);
-	state_save_register_UINT32("i386", cpu, "pc", &cpustate->pc, 1);
-	state_save_register_UINT32("i386", cpu, "prev_eip", &cpustate->prev_eip, 1);
-	state_save_register_UINT32("i386", cpu, "eflags", &cpustate->eflags, 1);
-	state_save_register_UINT32("i386", cpu, "eflags_mask", &cpustate->eflags_mask, 1);
-	state_save_register_UINT8("i386", cpu, "CF", &cpustate->CF, 1);
-	state_save_register_UINT8("i386", cpu, "DF", &cpustate->DF, 1);
-	state_save_register_UINT8("i386", cpu, "SF", &cpustate->SF, 1);
-	state_save_register_UINT8("i386", cpu, "OF", &cpustate->OF, 1);
-	state_save_register_UINT8("i386", cpu, "ZF", &cpustate->ZF, 1);
-	state_save_register_UINT8("i386", cpu, "PF", &cpustate->PF, 1);
-	state_save_register_UINT8("i386", cpu, "AF", &cpustate->AF, 1);
-	state_save_register_UINT8("i386", cpu, "IF", &cpustate->IF, 1);
-	state_save_register_UINT8("i386", cpu, "TF", &cpustate->TF, 1);
-	state_save_register_UINT8("i386", cpu, "IOP1", &cpustate->IOP1, 1);
-	state_save_register_UINT8("i386", cpu, "IOP2", &cpustate->IOP2, 1);
-	state_save_register_UINT8("i386", cpu, "NT", &cpustate->NT, 1);
-	state_save_register_UINT32("i386", cpu, "cr", cpustate->cr, 5);
-	state_save_register_UINT32("i386", cpu, "dr", cpustate->dr, 8);
-	state_save_register_UINT32("i386", cpu, "tr", cpustate->tr, 8);
-	state_save_register_UINT32("i386", cpu, "idtr_base", &cpustate->idtr.base, 1);
-	state_save_register_UINT16("i386", cpu, "idtr_limit", &cpustate->idtr.limit, 1);
-	state_save_register_UINT32("i386", cpu, "gdtr_base", &cpustate->gdtr.base, 1);
-	state_save_register_UINT16("i386", cpu, "gdtr_limit", &cpustate->gdtr.limit, 1);
-	state_save_register_UINT32("i386", cpu, "task_base", &cpustate->task.base, 1);
-	state_save_register_UINT16("i386", cpu, "task_segment", &cpustate->task.segment, 1);
-	state_save_register_UINT32("i386", cpu, "task_limit", &cpustate->task.limit, 1);
-	state_save_register_UINT16("i386", cpu, "task_flags", &cpustate->task.flags, 1);
-	state_save_register_UINT32("i386", cpu, "ldtr_base", &cpustate->ldtr.base, 1);
-	state_save_register_UINT16("i386", cpu, "ldtr_segment", &cpustate->ldtr.segment, 1);
-	state_save_register_UINT32("i386", cpu, "ldtr_limit", &cpustate->ldtr.limit, 1);
-	state_save_register_UINT16("i386", cpu, "ldtr_flags", &cpustate->ldtr.flags, 1);
-	state_save_register_int("i386", cpu, "halted", &cpustate->halted);
-	state_save_register_UINT8("i386", cpu, "irq_state", &cpustate->irq_state, 1);
-	state_save_register_UINT8("i386", cpu, "performed_intersegment_jump", &cpustate->performed_intersegment_jump, 1);
-	state_save_register_UINT32("i386", cpu, "a20_mask", &cpustate->a20_mask, 1);
-	state_save_register_func_postload(i386_postload);
-}
-
-void i386_reset(void *param)
-{
-	i386_state *cpustate = &I;
-	int (*save_irqcallback)(int);
-
-	save_irqcallback = cpustate->irq_callback;
-	memset( cpustate, 0, sizeof(*cpustate) );
-	cpustate->irq_callback = save_irqcallback;
-
-	cpustate->sreg[CS].selector = 0xf000;
-	cpustate->sreg[CS].base		= 0xffff0000;
-	cpustate->sreg[CS].limit	= 0xffff;
-
-	cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
-	cpustate->sreg[DS].limit = cpustate->sreg[ES].limit = cpustate->sreg[FS].limit = cpustate->sreg[GS].limit = cpustate->sreg[SS].limit = 0xffff;
-	cpustate->sreg[DS].flags = cpustate->sreg[ES].flags = cpustate->sreg[FS].flags = cpustate->sreg[GS].flags = cpustate->sreg[SS].flags = 0x0092;
-
-	cpustate->idtr.base = 0;
-	cpustate->idtr.limit = 0x3ff;
-
-	cpustate->a20_mask = ~0;
-
-	cpustate->cr[0] = 0x7ffffff0; /* reserved bits set to 1 */
-	cpustate->eflags = 0;
-	cpustate->eflags_mask = 0x00030000;
-	cpustate->eip = 0xfff0;
-
-	/* Family 3 (386), Model 0 (DX), Stepping 8 (D1) */
-	REG32(EAX) = 0;
-	REG32(EDX) = (3 << 8) | (0 << 4) | (8);
-
-	build_opcode_table(cpustate, OP_I386);
-	cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_I386];
-	cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_I386];
-
-	CHANGE_PC(cpustate,cpustate->eip);
-}
-
-void i386_exit(void)
-{
-}
-
-int i386_execute(int cycles)
-{
-	i386_state *cpustate = &I;
-
-	i386_ICount = cycles;
-	cpustate->base_cycles = cycles;
-	CHANGE_PC(cpustate,cpustate->eip);
-
-	if (cpustate->halted)
-	{
-		cpustate->tsc += cycles;
-		i386_ICount = 0;
-		return cycles;
-	}
-
-	while( i386_ICount > 0 )
-	{
-		cpustate->operand_size = cpustate->sreg[CS].d;
-		cpustate->address_size = cpustate->sreg[CS].d;
-
-		cpustate->segment_prefix = 0;
-		cpustate->prev_eip = cpustate->eip;
-
-		CALL_MAME_DEBUG;
-
-		i386_check_irq_line(cpustate);
-		I386OP(decode_opcode)(cpustate);
-	}
-	cpustate->tsc += (cycles - i386_ICount);
-	return cycles - i386_ICount;
-}
-
-unsigned i386_get_context(void *dst)
-{
-	if (dst)
-		*(i386_state *)dst = I;
-	return sizeof(i386_state);
-}
-
-void i386_set_context(void *src)
-{
-	if (src)
-		I = *(i386_state *)src;
-}
-
-unsigned i386_get_reg(int regnum)
-{
-	i386_state *cpustate = &I;
-
-	switch (regnum)
-	{
-	case REG_PC:			return cpustate->pc;
-	case REG_PREVIOUSPC:	return cpustate->sreg[CS].base + cpustate->prev_eip;
-	case REG_SP:			return cpustate->sreg[SS].base + REG32(ESP);
-	case I386_EIP:			return cpustate->eip;
-	case I386_EAX:			return REG32(EAX);
-	case I386_EBX:			return REG32(EBX);
-	case I386_ECX:			return REG32(ECX);
-	case I386_EDX:			return REG32(EDX);
-	case I386_ESI:			return REG32(ESI);
-	case I386_EDI:			return REG32(EDI);
-	case I386_EBP:			return REG32(EBP);
-	case I386_ESP:			return REG32(ESP);
-	case I386_EFLAGS:		return get_flags(cpustate);
-	case I386_CS:			return cpustate->sreg[CS].selector;
-	case I386_SS:			return cpustate->sreg[SS].selector;
-	case I386_DS:			return cpustate->sreg[DS].selector;
-	case I386_ES:			return cpustate->sreg[ES].selector;
-	case I386_FS:			return cpustate->sreg[FS].selector;
-	case I386_GS:			return cpustate->sreg[GS].selector;
-	case I386_CR0:			return cpustate->cr[0];
-	}
-	return 0;
-}
-
-void i386_set_reg(int regnum, unsigned val)
-{
-	i386_state *cpustate = &I;
-
-	switch (regnum)
-	{
-	case REG_PC:
-		cpustate->eip = val - cpustate->sreg[CS].base;
-		CHANGE_PC(cpustate,cpustate->eip);
-		break;
-	case REG_SP:			REG32(ESP) = val - cpustate->sreg[SS].base; break;
-	case I386_EIP:			cpustate->eip = val; CHANGE_PC(cpustate,cpustate->eip); break;
-	case I386_EAX:			REG32(EAX) = val; break;
-	case I386_EBX:			REG32(EBX) = val; break;
-	case I386_ECX:			REG32(ECX) = val; break;
-	case I386_EDX:			REG32(EDX) = val; break;
-	case I386_ESI:			REG32(ESI) = val; break;
-	case I386_EDI:			REG32(EDI) = val; break;
-	case I386_EBP:			REG32(EBP) = val; break;
-	case I386_ESP:			REG32(ESP) = val; break;
-	case I386_EFLAGS:		set_flags(cpustate, val); break;
-	}
-}
-
-void i386_set_irq_line(int irqline, int state)
-{
-	i386_state *cpustate = &I;
-
-	if (state != CLEAR_LINE && cpustate->halted)
-	{
-		cpustate->halted = 0;
-	}
-
-	if ( irqline == IRQ_LINE_NMI )
-	{
-		/* NMI (I do not think that this is 100% right) */
-		if ( state )
-			i386_trap(cpustate,2, 1);
-	}
-	else if ( irqline == I386_INPUT_LINE_A20 )
-	{
-		cpustate->a20_mask = state ? ~0 : ~(1 << 20);
-	}
-	else
-	{
-		cpustate->irq_state = state;
-	}
-}
-
-void i386_set_irq_callback(int (*callback)(int irqline))
-{
-	I.irq_callback = callback;
-}
-
-const char *i386_info(void *context, int regnum)
-{
-	static char buffer[16][47+1];
-	static int which = 0;
-	i386_state *r = context ? (i386_state *)context : &I;
-
-	which = (which + 1) % 16;
-	buffer[which][0] = '\0';
-
-	switch( regnum )
-	{
-	case CPU_INFO_REG+I386_EIP:	sprintf(buffer[which], "EIP:%08X", r->eip); break;
-	case CPU_INFO_REG+I386_EAX:	sprintf(buffer[which], "EAX:%08X", r->reg.d[EAX]); break;
-	case CPU_INFO_REG+I386_EBX:	sprintf(buffer[which], "EBX:%08X", r->reg.d[EBX]); break;
-	case CPU_INFO_REG+I386_ECX:	sprintf(buffer[which], "ECX:%08X", r->reg.d[ECX]); break;
-	case CPU_INFO_REG+I386_EDX:	sprintf(buffer[which], "EDX:%08X", r->reg.d[EDX]); break;
-	case CPU_INFO_REG+I386_ESI:	sprintf(buffer[which], "ESI:%08X", r->reg.d[ESI]); break;
-	case CPU_INFO_REG+I386_EDI:	sprintf(buffer[which], "EDI:%08X", r->reg.d[EDI]); break;
-	case CPU_INFO_REG+I386_EBP:	sprintf(buffer[which], "EBP:%08X", r->reg.d[EBP]); break;
-	case CPU_INFO_REG+I386_ESP:	sprintf(buffer[which], "ESP:%08X", r->reg.d[ESP]); break;
-	case CPU_INFO_FLAGS:		sprintf(buffer[which], "%08X", r->eflags); break;
-	case CPU_INFO_NAME:			return "I386";
-	case CPU_INFO_FAMILY:		return "Intel 386";
-	case CPU_INFO_VERSION:		return "1.0";
-	case CPU_INFO_FILE:			return __FILE__;
-	case CPU_INFO_CREDITS:		return "Copyright Ville Linde";
-	}
-	return buffer[which];
-}
-
-unsigned i386_dasm(char *buffer, unsigned pc)
-{
-	sprintf(buffer, "$%02X", cpu_readmem32ledw(pc));
-	return 1;
-}
@@ -1,39 +0,0 @@
-/***************************************************************************
-
-  Intel 386 emulator (Ville Linde), from MAME 0.139
-
-***************************************************************************/
-
-#ifndef I386INTF_H
-#define I386INTF_H
-
-#include "cpuintrf.h"
-
-/* the A20 gate, as an input line */
-#define I386_INPUT_LINE_A20		1
-
-extern int i386_ICount;
-
-/* the fast memory: a range of plain RAM or ROM at base, which the CPU */
-/* fetches, reads or writes directly (flags), without the memory handlers; */
-/* set from DRIVER_INIT, emptied at the CPU init. Little endian hosts only */
-#define I386_FASTMEM_MAX		8
-#define I386_FASTMEM_FETCH		1
-#define I386_FASTMEM_READ		2
-#define I386_FASTMEM_WRITE		4
-void i386_set_fastmem(UINT32 start, UINT32 end, UINT8 *base, int flags);
-
-void i386_init(void);
-void i386_reset(void *param);
-void i386_exit(void);
-int i386_execute(int cycles);
-unsigned i386_get_context(void *dst);
-void i386_set_context(void *src);
-unsigned i386_get_reg(int regnum);
-void i386_set_reg(int regnum, unsigned val);
-void i386_set_irq_line(int irqline, int state);
-void i386_set_irq_callback(int (*callback)(int irqline));
-const char *i386_info(void *context, int regnum);
-unsigned i386_dasm(char *buffer, unsigned pc);
-
-#endif
@@ -1,377 +0,0 @@
-typedef struct {
-	UINT8 opcode;
-	UINT32 flags;
-	void (*handler16)(i386_state *cpustate);
-	void (*handler32)(i386_state *cpustate);
-} X86_OPCODE;
-
-#define OP_I386			0x1
-#define OP_FPU			0x2
-#define OP_I486			0x4
-#define OP_PENTIUM		0x8
-#define OP_MMX			0x10
-#define OP_PPRO			0x20
-#define OP_SSE			0x40
-#define OP_SSE2			0x80
-#define OP_SSE3			0x100
-#define OP_CYRIX		0x8000
-#define OP_2BYTE		0x80000000
-
-static const X86_OPCODE x86_opcode_table[] =
-{
-/*  Opcode      Flags                       16-bit handler                  32-bit handler */
-	{ 0x00,		OP_I386,					I386OP(add_rm8_r8),				I386OP(add_rm8_r8),			},
-	{ 0x01,		OP_I386,					I386OP(add_rm16_r16),			I386OP(add_rm32_r32),		},
-	{ 0x02,		OP_I386,					I386OP(add_r8_rm8),				I386OP(add_r8_rm8),			},
-	{ 0x03,		OP_I386,					I386OP(add_r16_rm16),			I386OP(add_r32_rm32),		},
-	{ 0x04,		OP_I386,					I386OP(add_al_i8),				I386OP(add_al_i8),			},
-	{ 0x05,		OP_I386,					I386OP(add_ax_i16),				I386OP(add_eax_i32),		},
-	{ 0x06,		OP_I386,					I386OP(push_es16),				I386OP(push_es32),			},
-	{ 0x07,		OP_I386,					I386OP(pop_es16),				I386OP(pop_es32),			},
-	{ 0x08,		OP_I386,					I386OP(or_rm8_r8),				I386OP(or_rm8_r8),			},
-	{ 0x09,		OP_I386,					I386OP(or_rm16_r16),			I386OP(or_rm32_r32),		},
-	{ 0x0A,		OP_I386,					I386OP(or_r8_rm8),				I386OP(or_r8_rm8),			},
-	{ 0x0B,		OP_I386,					I386OP(or_r16_rm16),			I386OP(or_r32_rm32),		},
-	{ 0x0C,		OP_I386,					I386OP(or_al_i8),				I386OP(or_al_i8),			},
-	{ 0x0D,		OP_I386,					I386OP(or_ax_i16),				I386OP(or_eax_i32),			},
-	{ 0x0E,		OP_I386,					I386OP(push_cs16),				I386OP(push_cs32),			},
-	{ 0x0F,		OP_I386,					I386OP(decode_two_byte),		I386OP(decode_two_byte),	},
-	{ 0x10,		OP_I386,					I386OP(adc_rm8_r8),				I386OP(adc_rm8_r8),			},
-	{ 0x11,		OP_I386,					I386OP(adc_rm16_r16),			I386OP(adc_rm32_r32),		},
-	{ 0x12,		OP_I386,					I386OP(adc_r8_rm8),				I386OP(adc_r8_rm8),			},
-	{ 0x13,		OP_I386,					I386OP(adc_r16_rm16),			I386OP(adc_r32_rm32),		},
-	{ 0x14,		OP_I386,					I386OP(adc_al_i8),				I386OP(adc_al_i8),			},
-	{ 0x15,		OP_I386,					I386OP(adc_ax_i16),				I386OP(adc_eax_i32),		},
-	{ 0x16,		OP_I386,					I386OP(push_ss16),				I386OP(push_ss32),			},
-	{ 0x17,		OP_I386,					I386OP(pop_ss16),				I386OP(pop_ss32),			},
-	{ 0x18,		OP_I386,					I386OP(sbb_rm8_r8),				I386OP(sbb_rm8_r8),			},
-	{ 0x19,		OP_I386,					I386OP(sbb_rm16_r16),			I386OP(sbb_rm32_r32),		},
-	{ 0x1A,		OP_I386,					I386OP(sbb_r8_rm8),				I386OP(sbb_r8_rm8),			},
-	{ 0x1B,		OP_I386,					I386OP(sbb_r16_rm16),			I386OP(sbb_r32_rm32),		},
-	{ 0x1C,		OP_I386,					I386OP(sbb_al_i8),				I386OP(sbb_al_i8),			},
-	{ 0x1D,		OP_I386,					I386OP(sbb_ax_i16),				I386OP(sbb_eax_i32),		},
-	{ 0x1E,		OP_I386,					I386OP(push_ds16),				I386OP(push_ds32),			},
-	{ 0x1F,		OP_I386,					I386OP(pop_ds16),				I386OP(pop_ds32),			},
-	{ 0x20,		OP_I386,					I386OP(and_rm8_r8),				I386OP(and_rm8_r8),			},
-	{ 0x21,		OP_I386,					I386OP(and_rm16_r16),			I386OP(and_rm32_r32),		},
-	{ 0x22,		OP_I386,					I386OP(and_r8_rm8),				I386OP(and_r8_rm8),			},
-	{ 0x23,		OP_I386,					I386OP(and_r16_rm16),			I386OP(and_r32_rm32),		},
-	{ 0x24,		OP_I386,					I386OP(and_al_i8),				I386OP(and_al_i8),			},
-	{ 0x25,		OP_I386,					I386OP(and_ax_i16),				I386OP(and_eax_i32),		},
-	{ 0x26,		OP_I386,					I386OP(segment_ES),				I386OP(segment_ES),			},
-	{ 0x27,		OP_I386,					I386OP(daa),					I386OP(daa),				},
-	{ 0x28,		OP_I386,					I386OP(sub_rm8_r8),				I386OP(sub_rm8_r8),			},
-	{ 0x29,		OP_I386,					I386OP(sub_rm16_r16),			I386OP(sub_rm32_r32),		},
-	{ 0x2A,		OP_I386,					I386OP(sub_r8_rm8),				I386OP(sub_r8_rm8),			},
-	{ 0x2B,		OP_I386,					I386OP(sub_r16_rm16),			I386OP(sub_r32_rm32),		},
-	{ 0x2C,		OP_I386,					I386OP(sub_al_i8),				I386OP(sub_al_i8),			},
-	{ 0x2D,		OP_I386,					I386OP(sub_ax_i16),				I386OP(sub_eax_i32),		},
-	{ 0x2E,		OP_I386,					I386OP(segment_CS),				I386OP(segment_CS),			},
-	{ 0x2F,		OP_I386,					I386OP(das),					I386OP(das),				},
-	{ 0x30,		OP_I386,					I386OP(xor_rm8_r8),				I386OP(xor_rm8_r8),			},
-	{ 0x31,		OP_I386,					I386OP(xor_rm16_r16),			I386OP(xor_rm32_r32),		},
-	{ 0x32,		OP_I386,					I386OP(xor_r8_rm8),				I386OP(xor_r8_rm8),			},
-	{ 0x33,		OP_I386,					I386OP(xor_r16_rm16),			I386OP(xor_r32_rm32),		},
-	{ 0x34,		OP_I386,					I386OP(xor_al_i8),				I386OP(xor_al_i8),			},
-	{ 0x35,		OP_I386,					I386OP(xor_ax_i16),				I386OP(xor_eax_i32),		},
-	{ 0x36,		OP_I386,					I386OP(segment_SS),				I386OP(segment_SS),			},
-	{ 0x37,		OP_I386,					I386OP(aaa),					I386OP(aaa),				},
-	{ 0x38,		OP_I386,					I386OP(cmp_rm8_r8),				I386OP(cmp_rm8_r8),			},
-	{ 0x39,		OP_I386,					I386OP(cmp_rm16_r16),			I386OP(cmp_rm32_r32),		},
-	{ 0x3A,		OP_I386,					I386OP(cmp_r8_rm8),				I386OP(cmp_r8_rm8),			},
-	{ 0x3B,		OP_I386,					I386OP(cmp_r16_rm16),			I386OP(cmp_r32_rm32),		},
-	{ 0x3C,		OP_I386,					I386OP(cmp_al_i8),				I386OP(cmp_al_i8),			},
-	{ 0x3D,		OP_I386,					I386OP(cmp_ax_i16),				I386OP(cmp_eax_i32),		},
-	{ 0x3E,		OP_I386,					I386OP(segment_DS),				I386OP(segment_DS),			},
-	{ 0x3F,		OP_I386,					I386OP(aas),					I386OP(aas),				},
-	{ 0x40,		OP_I386,					I386OP(inc_ax),					I386OP(inc_eax),			},
-	{ 0x41,		OP_I386,					I386OP(inc_cx),					I386OP(inc_ecx),			},
-	{ 0x42,		OP_I386,					I386OP(inc_dx),					I386OP(inc_edx),			},
-	{ 0x43,		OP_I386,					I386OP(inc_bx),					I386OP(inc_ebx),			},
-	{ 0x44,		OP_I386,					I386OP(inc_sp),					I386OP(inc_esp),			},
-	{ 0x45,		OP_I386,					I386OP(inc_bp),					I386OP(inc_ebp),			},
-	{ 0x46,		OP_I386,					I386OP(inc_si),					I386OP(inc_esi),			},
-	{ 0x47,		OP_I386,					I386OP(inc_di),					I386OP(inc_edi),			},
-	{ 0x48,		OP_I386,					I386OP(dec_ax),					I386OP(dec_eax),			},
-	{ 0x49,		OP_I386,					I386OP(dec_cx),					I386OP(dec_ecx),			},
-	{ 0x4A,		OP_I386,					I386OP(dec_dx),					I386OP(dec_edx),			},
-	{ 0x4B,		OP_I386,					I386OP(dec_bx),					I386OP(dec_ebx),			},
-	{ 0x4C,		OP_I386,					I386OP(dec_sp),					I386OP(dec_esp),			},
-	{ 0x4D,		OP_I386,					I386OP(dec_bp),					I386OP(dec_ebp),			},
-	{ 0x4E,		OP_I386,					I386OP(dec_si),					I386OP(dec_esi),			},
-	{ 0x4F,		OP_I386,					I386OP(dec_di),					I386OP(dec_edi),			},
-	{ 0x50,		OP_I386,					I386OP(push_ax),				I386OP(push_eax),			},
-	{ 0x51,		OP_I386,					I386OP(push_cx),				I386OP(push_ecx),			},
-	{ 0x52,		OP_I386,					I386OP(push_dx),				I386OP(push_edx),			},
-	{ 0x53,		OP_I386,					I386OP(push_bx),				I386OP(push_ebx),			},
-	{ 0x54,		OP_I386,					I386OP(push_sp),				I386OP(push_esp),			},
-	{ 0x55,		OP_I386,					I386OP(push_bp),				I386OP(push_ebp),			},
-	{ 0x56,		OP_I386,					I386OP(push_si),				I386OP(push_esi),			},
-	{ 0x57,		OP_I386,					I386OP(push_di),				I386OP(push_edi),			},
-	{ 0x58,		OP_I386,					I386OP(pop_ax),					I386OP(pop_eax),			},
-	{ 0x59,		OP_I386,					I386OP(pop_cx),					I386OP(pop_ecx),			},
-	{ 0x5A,		OP_I386,					I386OP(pop_dx),					I386OP(pop_edx),			},
-	{ 0x5B,		OP_I386,					I386OP(pop_bx),					I386OP(pop_ebx),			},
-	{ 0x5C,		OP_I386,					I386OP(pop_sp),					I386OP(pop_esp),			},
-	{ 0x5D,		OP_I386,					I386OP(pop_bp),					I386OP(pop_ebp),			},
-	{ 0x5E,		OP_I386,					I386OP(pop_si),					I386OP(pop_esi),			},
-	{ 0x5F,		OP_I386,					I386OP(pop_di),					I386OP(pop_edi),			},
-	{ 0x60,		OP_I386,					I386OP(pusha),					I386OP(pushad),				},
-	{ 0x61,		OP_I386,					I386OP(popa),					I386OP(popad),				},
-	{ 0x62,		OP_I386,					I386OP(bound_r16_m16_m16),		I386OP(bound_r32_m32_m32),	},
-	{ 0x63,		OP_I386,					I386OP(arpl),					I386OP(arpl),				},
-	{ 0x64,		OP_I386,					I386OP(segment_FS),				I386OP(segment_FS),			},
-	{ 0x65,		OP_I386,					I386OP(segment_GS),				I386OP(segment_GS),			},
-	{ 0x66,		OP_I386,					I386OP(operand_size),			I386OP(operand_size),		},
-	{ 0x67,		OP_I386,					I386OP(address_size),			I386OP(address_size),		},
-	{ 0x68,		OP_I386,					I386OP(push_i16),				I386OP(push_i32),			},
-	{ 0x69,		OP_I386,					I386OP(imul_r16_rm16_i16),		I386OP(imul_r32_rm32_i32),	},
-	{ 0x6A,		OP_I386,					I386OP(push_i8),				I386OP(push_i8),			},
-	{ 0x6B,		OP_I386,					I386OP(imul_r16_rm16_i8),		I386OP(imul_r32_rm32_i8),	},
-	{ 0x6C,		OP_I386,					I386OP(insb),					I386OP(insb),				},
-	{ 0x6D,		OP_I386,					I386OP(insw),					I386OP(insd),				},
-	{ 0x6E,		OP_I386,					I386OP(outsb),					I386OP(outsb),				},
-	{ 0x6F,		OP_I386,					I386OP(outsw),					I386OP(outsd),				},
-	{ 0x70,		OP_I386,					I386OP(jo_rel8),				I386OP(jo_rel8),			},
-	{ 0x71,		OP_I386,					I386OP(jno_rel8),				I386OP(jno_rel8),			},
-	{ 0x72,		OP_I386,					I386OP(jc_rel8),				I386OP(jc_rel8),			},
-	{ 0x73,		OP_I386,					I386OP(jnc_rel8),				I386OP(jnc_rel8),			},
-	{ 0x74,		OP_I386,					I386OP(jz_rel8),				I386OP(jz_rel8),			},
-	{ 0x75,		OP_I386,					I386OP(jnz_rel8),				I386OP(jnz_rel8),			},
-	{ 0x76,		OP_I386,					I386OP(jbe_rel8),				I386OP(jbe_rel8),			},
-	{ 0x77,		OP_I386,					I386OP(ja_rel8),				I386OP(ja_rel8),			},
-	{ 0x78,		OP_I386,					I386OP(js_rel8),				I386OP(js_rel8),			},
-	{ 0x79,		OP_I386,					I386OP(jns_rel8),				I386OP(jns_rel8),			},
-	{ 0x7A,		OP_I386,					I386OP(jp_rel8),				I386OP(jp_rel8),			},
-	{ 0x7B,		OP_I386,					I386OP(jnp_rel8),				I386OP(jnp_rel8),			},
-	{ 0x7C,		OP_I386,					I386OP(jl_rel8),				I386OP(jl_rel8),			},
-	{ 0x7D,		OP_I386,					I386OP(jge_rel8),				I386OP(jge_rel8),			},
-	{ 0x7E,		OP_I386,					I386OP(jle_rel8),				I386OP(jle_rel8),			},
-	{ 0x7F,		OP_I386,					I386OP(jg_rel8),				I386OP(jg_rel8),			},
-	{ 0x80,		OP_I386,					I386OP(group80_8),				I386OP(group80_8),			},
-	{ 0x81,		OP_I386,					I386OP(group81_16),				I386OP(group81_32),			},
-	{ 0x82,		OP_I386,					I386OP(group80_8),				I386OP(group80_8),			},
-	{ 0x83,		OP_I386,					I386OP(group83_16),				I386OP(group83_32),			},
-	{ 0x84,		OP_I386,					I386OP(test_rm8_r8),			I386OP(test_rm8_r8),		},
-	{ 0x85,		OP_I386,					I386OP(test_rm16_r16),			I386OP(test_rm32_r32),		},
-	{ 0x86,		OP_I386,					I386OP(xchg_r8_rm8),			I386OP(xchg_r8_rm8),		},
-	{ 0x87,		OP_I386,					I386OP(xchg_r16_rm16),			I386OP(xchg_r32_rm32),		},
-	{ 0x88,		OP_I386,					I386OP(mov_rm8_r8),				I386OP(mov_rm8_r8),			},
-	{ 0x89,		OP_I386,					I386OP(mov_rm16_r16),			I386OP(mov_rm32_r32),		},
-	{ 0x8A,		OP_I386,					I386OP(mov_r8_rm8),				I386OP(mov_r8_rm8),			},
-	{ 0x8B,		OP_I386,					I386OP(mov_r16_rm16),			I386OP(mov_r32_rm32),		},
-	{ 0x8C,		OP_I386,					I386OP(mov_rm16_sreg),			I386OP(mov_rm16_sreg),		},
-	{ 0x8D,		OP_I386,					I386OP(lea16),					I386OP(lea32),				},
-	{ 0x8E,		OP_I386,					I386OP(mov_sreg_rm16),			I386OP(mov_sreg_rm16),		},
-	{ 0x8F,		OP_I386,					I386OP(pop_rm16),				I386OP(pop_rm32),			},
-	{ 0x90,		OP_I386,					I386OP(nop),					I386OP(nop),				},
-	{ 0x91,		OP_I386,					I386OP(xchg_ax_cx),				I386OP(xchg_eax_ecx),		},
-	{ 0x92,		OP_I386,					I386OP(xchg_ax_dx),				I386OP(xchg_eax_edx),		},
-	{ 0x93,		OP_I386,					I386OP(xchg_ax_bx),				I386OP(xchg_eax_ebx),		},
-	{ 0x94,		OP_I386,					I386OP(xchg_ax_sp),				I386OP(xchg_eax_esp),		},
-	{ 0x95,		OP_I386,					I386OP(xchg_ax_bp),				I386OP(xchg_eax_ebp),		},
-	{ 0x96,		OP_I386,					I386OP(xchg_ax_si),				I386OP(xchg_eax_esi),		},
-	{ 0x97,		OP_I386,					I386OP(xchg_ax_di),				I386OP(xchg_eax_edi),		},
-	{ 0x98,		OP_I386,					I386OP(cbw),					I386OP(cwde),				},
-	{ 0x99,		OP_I386,					I386OP(cwd),					I386OP(cdq),				},
-	{ 0x9A,		OP_I386,					I386OP(call_abs16),				I386OP(call_abs32),			},
-	{ 0x9B,		OP_I386,					I386OP(wait),					I386OP(wait),				},
-	{ 0x9C,		OP_I386,					I386OP(pushf),					I386OP(pushfd),				},
-	{ 0x9D,		OP_I386,					I386OP(popf),					I386OP(popfd),				},
-	{ 0x9E,		OP_I386,					I386OP(sahf),					I386OP(sahf),				},
-	{ 0x9F,		OP_I386,					I386OP(lahf),					I386OP(lahf),				},
-	{ 0xA0,		OP_I386,					I386OP(mov_al_m8),				I386OP(mov_al_m8),			},
-	{ 0xA1,		OP_I386,					I386OP(mov_ax_m16),				I386OP(mov_eax_m32),		},
-	{ 0xA2,		OP_I386,					I386OP(mov_m8_al),				I386OP(mov_m8_al),			},
-	{ 0xA3,		OP_I386,					I386OP(mov_m16_ax),				I386OP(mov_m32_eax),		},
-	{ 0xA4,		OP_I386,					I386OP(movsb),					I386OP(movsb),				},
-	{ 0xA5,		OP_I386,					I386OP(movsw),					I386OP(movsd),				},
-	{ 0xA6,		OP_I386,					I386OP(cmpsb),					I386OP(cmpsb),				},
-	{ 0xA7,		OP_I386,					I386OP(cmpsw),					I386OP(cmpsd),				},
-	{ 0xA8,		OP_I386,					I386OP(test_al_i8),				I386OP(test_al_i8),			},
-	{ 0xA9,		OP_I386,					I386OP(test_ax_i16),			I386OP(test_eax_i32),		},
-	{ 0xAA,		OP_I386,					I386OP(stosb),					I386OP(stosb),				},
-	{ 0xAB,		OP_I386,					I386OP(stosw),					I386OP(stosd),				},
-	{ 0xAC,		OP_I386,					I386OP(lodsb),					I386OP(lodsb),				},
-	{ 0xAD,		OP_I386,					I386OP(lodsw),					I386OP(lodsd),				},
-	{ 0xAE,		OP_I386,					I386OP(scasb),					I386OP(scasb),				},
-	{ 0xAF,		OP_I386,					I386OP(scasw),					I386OP(scasd),				},
-	{ 0xB0,		OP_I386,					I386OP(mov_al_i8),				I386OP(mov_al_i8),			},
-	{ 0xB1,		OP_I386,					I386OP(mov_cl_i8),				I386OP(mov_cl_i8),			},
-	{ 0xB2,		OP_I386,					I386OP(mov_dl_i8),				I386OP(mov_dl_i8),			},
-	{ 0xB3,		OP_I386,					I386OP(mov_bl_i8),				I386OP(mov_bl_i8),			},
-	{ 0xB4,		OP_I386,					I386OP(mov_ah_i8),				I386OP(mov_ah_i8),			},
-	{ 0xB5,		OP_I386,					I386OP(mov_ch_i8),				I386OP(mov_ch_i8),			},
-	{ 0xB6,		OP_I386,					I386OP(mov_dh_i8),				I386OP(mov_dh_i8),			},
-	{ 0xB7,		OP_I386,					I386OP(mov_bh_i8),				I386OP(mov_bh_i8),			},
-	{ 0xB8,		OP_I386,					I386OP(mov_ax_i16),				I386OP(mov_eax_i32),		},
-	{ 0xB9,		OP_I386,					I386OP(mov_cx_i16),				I386OP(mov_ecx_i32),		},
-	{ 0xBA,		OP_I386,					I386OP(mov_dx_i16),				I386OP(mov_edx_i32),		},
-	{ 0xBB,		OP_I386,					I386OP(mov_bx_i16),				I386OP(mov_ebx_i32),		},
-	{ 0xBC,		OP_I386,					I386OP(mov_sp_i16),				I386OP(mov_esp_i32),		},
-	{ 0xBD,		OP_I386,					I386OP(mov_bp_i16),				I386OP(mov_ebp_i32),		},
-	{ 0xBE,		OP_I386,					I386OP(mov_si_i16),				I386OP(mov_esi_i32),		},
-	{ 0xBF,		OP_I386,					I386OP(mov_di_i16),				I386OP(mov_edi_i32),		},
-	{ 0xC0,		OP_I386,					I386OP(groupC0_8),				I386OP(groupC0_8),			},
-	{ 0xC1,		OP_I386,					I386OP(groupC1_16),				I386OP(groupC1_32),			},
-	{ 0xC2,		OP_I386,					I386OP(ret_near16_i16),			I386OP(ret_near32_i16),		},
-	{ 0xC3,		OP_I386,					I386OP(ret_near16),				I386OP(ret_near32),			},
-	{ 0xC4,		OP_I386,					I386OP(les16),					I386OP(les32),				},
-	{ 0xC5,		OP_I386,					I386OP(lds16),					I386OP(lds32),				},
-	{ 0xC6,		OP_I386,					I386OP(mov_rm8_i8),				I386OP(mov_rm8_i8),			},
-	{ 0xC7,		OP_I386,					I386OP(mov_rm16_i16),			I386OP(mov_rm32_i32),		},
-	{ 0xC8,		OP_I386,					I386OP(enter16),				I386OP(enter32),			},
-	{ 0xC9,		OP_I386,					I386OP(leave16),				I386OP(leave32),			},
-	{ 0xCA,		OP_I386,					I386OP(retf_i16),				I386OP(retf_i32),			},
-	{ 0xCB,		OP_I386,					I386OP(retf16),					I386OP(retf32),				},
-	{ 0xCC,		OP_I386,					I386OP(int3),					I386OP(int3),				},
-	{ 0xCD,		OP_I386,					I386OP(int),					I386OP(int),				},
-	{ 0xCE,		OP_I386,					I386OP(into),					I386OP(into),				},
-	{ 0xCF,		OP_I386,					I386OP(iret16),					I386OP(iret32),				},
-	{ 0xD0,		OP_I386,					I386OP(groupD0_8),				I386OP(groupD0_8),			},
-	{ 0xD1,		OP_I386,					I386OP(groupD1_16),				I386OP(groupD1_32),			},
-	{ 0xD2,		OP_I386,					I386OP(groupD2_8),				I386OP(groupD2_8),			},
-	{ 0xD3,		OP_I386,					I386OP(groupD3_16),				I386OP(groupD3_32),			},
-	{ 0xD4,		OP_I386,					I386OP(aam),					I386OP(aam),				},
-	{ 0xD5,		OP_I386,					I386OP(aad),					I386OP(aad),				},
-	{ 0xD6,		OP_I386,					I386OP(setalc),					I386OP(setalc),				},
-	{ 0xD7,		OP_I386,					I386OP(xlat16),					I386OP(xlat32),				},
-	{ 0xD8,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xD9,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xDA,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xDB,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xDC,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xDD,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xDE,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xDF,		OP_I386,					I386OP(escape),					I386OP(escape),				},
-	{ 0xD8,		OP_FPU,						I386OP(fpu_group_d8),			I386OP(fpu_group_d8),		},
-	{ 0xD9,		OP_FPU,						I386OP(fpu_group_d9),			I386OP(fpu_group_d9),		},
-	{ 0xDA,		OP_FPU,						I386OP(fpu_group_da),			I386OP(fpu_group_da),		},
-	{ 0xDB,		OP_FPU,						I386OP(fpu_group_db),			I386OP(fpu_group_db),		},
-	{ 0xDC,		OP_FPU,						I386OP(fpu_group_dc),			I386OP(fpu_group_dc),		},
-	{ 0xDD,		OP_FPU,						I386OP(fpu_group_dd),			I386OP(fpu_group_dd),		},
-	{ 0xDE,		OP_FPU,						I386OP(fpu_group_de),			I386OP(fpu_group_de),		},
-	{ 0xDF,		OP_FPU,						I386OP(fpu_group_df),			I386OP(fpu_group_df),		},
-	{ 0xE0,		OP_I386,					I386OP(loopne16),				I386OP(loopne32),			},
-	{ 0xE1,		OP_I386,					I386OP(loopz16),				I386OP(loopz32),			},
-	{ 0xE2,		OP_I386,					I386OP(loop16),					I386OP(loop32),				},
-	{ 0xE3,		OP_I386,					I386OP(jcxz16),					I386OP(jcxz32),				},
-	{ 0xE4,		OP_I386,					I386OP(in_al_i8),				I386OP(in_al_i8),			},
-	{ 0xE5,		OP_I386,					I386OP(in_ax_i8),				I386OP(in_eax_i8),			},
-	{ 0xE6,		OP_I386,					I386OP(out_al_i8),				I386OP(out_al_i8),			},
-	{ 0xE7,		OP_I386,					I386OP(out_ax_i8),				I386OP(out_eax_i8),			},
-	{ 0xE8,		OP_I386,					I386OP(call_rel16),				I386OP(call_rel32),			},
-	{ 0xE9,		OP_I386,					I386OP(jmp_rel16),				I386OP(jmp_rel32),			},
-	{ 0xEA,		OP_I386,					I386OP(jmp_abs16),				I386OP(jmp_abs32),			},
-	{ 0xEB,		OP_I386,					I386OP(jmp_rel8),				I386OP(jmp_rel8),			},
-	{ 0xEC,		OP_I386,					I386OP(in_al_dx),				I386OP(in_al_dx),			},
-	{ 0xED,		OP_I386,					I386OP(in_ax_dx),				I386OP(in_eax_dx),			},
-	{ 0xEE,		OP_I386,					I386OP(out_al_dx),				I386OP(out_al_dx),			},
-	{ 0xEF,		OP_I386,					I386OP(out_ax_dx),				I386OP(out_eax_dx),			},
-	{ 0xF0,		OP_I386,					I386OP(lock),					I386OP(lock),				},
-	{ 0xF1,		OP_I386,					I386OP(invalid),				I386OP(invalid),			},
-	{ 0xF2,		OP_I386,					I386OP(repne),					I386OP(repne),				},
-	{ 0xF3,		OP_I386,					I386OP(rep),					I386OP(rep),				},
-	{ 0xF4,		OP_I386,					I386OP(hlt),					I386OP(hlt),				},
-	{ 0xF5,		OP_I386,					I386OP(cmc),					I386OP(cmc),				},
-	{ 0xF6,		OP_I386,					I386OP(groupF6_8),				I386OP(groupF6_8),			},
-	{ 0xF7,		OP_I386,					I386OP(groupF7_16),				I386OP(groupF7_32),			},
-	{ 0xF8,		OP_I386,					I386OP(clc),					I386OP(clc),				},
-	{ 0xF9,		OP_I386,					I386OP(stc),					I386OP(stc),				},
-	{ 0xFA,		OP_I386,					I386OP(cli),					I386OP(cli),				},
-	{ 0xFB,		OP_I386,					I386OP(sti),					I386OP(sti),				},
-	{ 0xFC,		OP_I386,					I386OP(cld),					I386OP(cld),				},
-	{ 0xFD,		OP_I386,					I386OP(std),					I386OP(std),				},
-	{ 0xFE,		OP_I386,					I386OP(groupFE_8),				I386OP(groupFE_8),			},
-	{ 0xFF,		OP_I386,					I386OP(groupFF_16),				I386OP(groupFF_32),			},
-	{ 0x00,		OP_2BYTE|OP_I386,			I386OP(group0F00_16),			I386OP(group0F00_32),		},
-	{ 0x01,		OP_2BYTE|OP_I386,			I386OP(group0F01_16),			I386OP(group0F01_32),		},
-	{ 0x01,		OP_2BYTE|OP_I486,			I486OP(group0F01_16),			I486OP(group0F01_32),		},
-	{ 0x02,		OP_2BYTE|OP_I386,			I386OP(unimplemented),			I386OP(unimplemented),		},
-	{ 0x03,		OP_2BYTE|OP_I386,			I386OP(lsl_r16_rm16),			I386OP(lsl_r32_rm32),		},
-	{ 0x06,		OP_2BYTE|OP_I386,			I386OP(clts),					I386OP(clts),				},
-	{ 0x08,		OP_2BYTE|OP_I486,			I486OP(invd),					I486OP(invd),				},
-	{ 0x09,		OP_2BYTE|OP_I486,			I486OP(wbinvd),					I486OP(wbinvd),				},
-	{ 0x0B,		OP_2BYTE|OP_I386,			I386OP(unimplemented),			I386OP(unimplemented),		},
-	{ 0x20,		OP_2BYTE|OP_I386,			I386OP(mov_r32_cr),				I386OP(mov_r32_cr),			},
-	{ 0x21,		OP_2BYTE|OP_I386,			I386OP(mov_r32_dr),				I386OP(mov_r32_dr),			},
-	{ 0x22,		OP_2BYTE|OP_I386,			I386OP(mov_cr_r32),				I386OP(mov_cr_r32),			},
-	{ 0x23,		OP_2BYTE|OP_I386,			I386OP(mov_dr_r32),				I386OP(mov_dr_r32),			},
-	{ 0x24,		OP_2BYTE|OP_I386,			I386OP(mov_r32_tr),				I386OP(mov_r32_tr),			},
-	{ 0x26,		OP_2BYTE|OP_I386,			I386OP(mov_tr_r32),				I386OP(mov_tr_r32),			},
-	{ 0x30,		OP_2BYTE|OP_PENTIUM,		PENTIUMOP(wrmsr),				PENTIUMOP(wrmsr),			},
-	{ 0x31,		OP_2BYTE|OP_PENTIUM,		PENTIUMOP(rdtsc),				PENTIUMOP(rdtsc),			},
-	{ 0x32,		OP_2BYTE|OP_PENTIUM,		PENTIUMOP(rdmsr),				PENTIUMOP(rdmsr),			},
-	{ 0x74,		OP_2BYTE|OP_CYRIX,			I386OP(cyrix_unknown),			I386OP(cyrix_unknown),		},
-	{ 0x80,		OP_2BYTE|OP_I386,			I386OP(jo_rel16),				I386OP(jo_rel32),			},
-	{ 0x81,		OP_2BYTE|OP_I386,			I386OP(jno_rel16),				I386OP(jno_rel32),			},
-	{ 0x82,		OP_2BYTE|OP_I386,			I386OP(jc_rel16),				I386OP(jc_rel32),			},
-	{ 0x83,		OP_2BYTE|OP_I386,			I386OP(jnc_rel16),				I386OP(jnc_rel32),			},
-	{ 0x84,		OP_2BYTE|OP_I386,			I386OP(jz_rel16),				I386OP(jz_rel32),			},
-	{ 0x85,		OP_2BYTE|OP_I386,			I386OP(jnz_rel16),				I386OP(jnz_rel32),			},
-	{ 0x86,		OP_2BYTE|OP_I386,			I386OP(jbe_rel16),				I386OP(jbe_rel32),			},
-	{ 0x87,		OP_2BYTE|OP_I386,			I386OP(ja_rel16),				I386OP(ja_rel32),			},
-	{ 0x88,		OP_2BYTE|OP_I386,			I386OP(js_rel16),				I386OP(js_rel32),			},
-	{ 0x89,		OP_2BYTE|OP_I386,			I386OP(jns_rel16),				I386OP(jns_rel32),			},
-	{ 0x8A,		OP_2BYTE|OP_I386,			I386OP(jp_rel16),				I386OP(jp_rel32),			},
-	{ 0x8B,		OP_2BYTE|OP_I386,			I386OP(jnp_rel16),				I386OP(jnp_rel32),			},
-	{ 0x8C,		OP_2BYTE|OP_I386,			I386OP(jl_rel16),				I386OP(jl_rel32),			},
-	{ 0x8D,		OP_2BYTE|OP_I386,			I386OP(jge_rel16),				I386OP(jge_rel32),			},
-	{ 0x8E,		OP_2BYTE|OP_I386,			I386OP(jle_rel16),				I386OP(jle_rel32),			},
-	{ 0x8F,		OP_2BYTE|OP_I386,			I386OP(jg_rel16),				I386OP(jg_rel32),			},
-	{ 0x90,		OP_2BYTE|OP_I386,			I386OP(seto_rm8),				I386OP(seto_rm8),			},
-	{ 0x91,		OP_2BYTE|OP_I386,			I386OP(setno_rm8),				I386OP(setno_rm8),			},
-	{ 0x92,		OP_2BYTE|OP_I386,			I386OP(setc_rm8),				I386OP(setc_rm8),			},
-	{ 0x93,		OP_2BYTE|OP_I386,			I386OP(setnc_rm8),				I386OP(setnc_rm8),			},
-	{ 0x94,		OP_2BYTE|OP_I386,			I386OP(setz_rm8),				I386OP(setz_rm8),			},
-	{ 0x95,		OP_2BYTE|OP_I386,			I386OP(setnz_rm8),				I386OP(setnz_rm8),			},
-	{ 0x96,		OP_2BYTE|OP_I386,			I386OP(setbe_rm8),				I386OP(setbe_rm8),			},
-	{ 0x97,		OP_2BYTE|OP_I386,			I386OP(seta_rm8),				I386OP(seta_rm8),			},
-	{ 0x98,		OP_2BYTE|OP_I386,			I386OP(sets_rm8),				I386OP(sets_rm8),			},
-	{ 0x99,		OP_2BYTE|OP_I386,			I386OP(setns_rm8),				I386OP(setns_rm8),			},
-	{ 0x9A,		OP_2BYTE|OP_I386,			I386OP(setp_rm8),				I386OP(setp_rm8),			},
-	{ 0x9B,		OP_2BYTE|OP_I386,			I386OP(setnp_rm8),				I386OP(setnp_rm8),			},
-	{ 0x9C,		OP_2BYTE|OP_I386,			I386OP(setl_rm8),				I386OP(setl_rm8),			},
-	{ 0x9D,		OP_2BYTE|OP_I386,			I386OP(setge_rm8),				I386OP(setge_rm8),			},
-	{ 0x9E,		OP_2BYTE|OP_I386,			I386OP(setle_rm8),				I386OP(setle_rm8),			},
-	{ 0x9F,		OP_2BYTE|OP_I386,			I386OP(setg_rm8),				I386OP(setg_rm8),			},
-	{ 0xA0,		OP_2BYTE|OP_I386,			I386OP(push_fs16),				I386OP(push_fs32),			},
-	{ 0xA1,		OP_2BYTE|OP_I386,			I386OP(pop_fs16),				I386OP(pop_fs32),			},
-	{ 0xA2,		OP_2BYTE|OP_I486,			I486OP(cpuid),					I486OP(cpuid),				},
-	{ 0xA3,		OP_2BYTE|OP_I386,			I386OP(bt_rm16_r16),			I386OP(bt_rm32_r32),		},
-	{ 0xA4,		OP_2BYTE|OP_I386,			I386OP(shld16_i8),				I386OP(shld32_i8),			},
-	{ 0xA5,		OP_2BYTE|OP_I386,			I386OP(shld16_cl),				I386OP(shld32_cl),			},
-	{ 0xA8,		OP_2BYTE|OP_I386,			I386OP(push_gs16),				I386OP(push_gs32),			},
-	{ 0xA9,		OP_2BYTE|OP_I386,			I386OP(pop_gs16),				I386OP(pop_gs32),			},
-	{ 0xAA,		OP_2BYTE|OP_I386,			I386OP(unimplemented),			I386OP(unimplemented),		},
-	{ 0xAB,		OP_2BYTE|OP_I386,			I386OP(bts_rm16_r16),			I386OP(bts_rm32_r32),		},
-	{ 0xAC,		OP_2BYTE|OP_I386,			I386OP(shrd16_i8),				I386OP(shrd32_i8),			},
-	{ 0xAD,		OP_2BYTE|OP_I386,			I386OP(shrd16_cl),				I386OP(shrd32_cl),			},
-	{ 0xAE,		OP_2BYTE|OP_I386,			I386OP(invalid),				I386OP(invalid),			},
-	{ 0xAF,		OP_2BYTE|OP_I386,			I386OP(imul_r16_rm16),			I386OP(imul_r32_rm32),		},
-	{ 0xB0,		OP_2BYTE|OP_I486,			I486OP(cmpxchg_rm8_r8),			I486OP(cmpxchg_rm8_r8),		},
-	{ 0xB1,		OP_2BYTE|OP_I486,			I486OP(cmpxchg_rm16_r16),		I486OP(cmpxchg_rm32_r32),	},
-	{ 0xB2,		OP_2BYTE|OP_I386,			I386OP(lss16),					I386OP(lss32),				},
-	{ 0xB3,		OP_2BYTE|OP_I386,			I386OP(btr_rm16_r16),			I386OP(btr_rm32_r32),		},
-	{ 0xB4,		OP_2BYTE|OP_I386,			I386OP(lfs16),					I386OP(lfs32),				},
-	{ 0xB5,		OP_2BYTE|OP_I386,			I386OP(lgs16),					I386OP(lgs32),				},
-	{ 0xB6,		OP_2BYTE|OP_I386,			I386OP(movzx_r16_rm8),			I386OP(movzx_r32_rm8),		},
-	{ 0xB7,		OP_2BYTE|OP_I386,			I386OP(invalid),				I386OP(movzx_r32_rm16),		},
-	{ 0xBA,		OP_2BYTE|OP_I386,			I386OP(group0FBA_16),			I386OP(group0FBA_32),		},
-	{ 0xBB,		OP_2BYTE|OP_I386,			I386OP(btc_rm16_r16),			I386OP(btc_rm32_r32),		},
-	{ 0xBC,		OP_2BYTE|OP_I386,			I386OP(bsf_r16_rm16),			I386OP(bsf_r32_rm32),		},
-	{ 0xBD,		OP_2BYTE|OP_I386,			I386OP(bsr_r16_rm16),			I386OP(bsr_r32_rm32),		},
-	{ 0xBE,		OP_2BYTE|OP_I386,			I386OP(movsx_r16_rm8),			I386OP(movsx_r32_rm8),		},
-	{ 0xBF,		OP_2BYTE|OP_I386,			I386OP(invalid),				I386OP(movsx_r32_rm16),		},
-	{ 0xC0,		OP_2BYTE|OP_I486,			I486OP(xadd_rm8_r8),			I486OP(xadd_rm8_r8),		},
-	{ 0xC1,		OP_2BYTE|OP_I486,			I486OP(xadd_rm16_r16),			I486OP(xadd_rm32_r32),		},
-	{ 0xC7,		OP_2BYTE|OP_PENTIUM,		PENTIUMOP(cmpxchg8b_m64),		PENTIUMOP(cmpxchg8b_m64),	},
-	{ 0xC8,		OP_2BYTE|OP_I486,			I486OP(bswap_eax),				I486OP(bswap_eax),			},
-	{ 0xC9,		OP_2BYTE|OP_I486,			I486OP(bswap_ecx),				I486OP(bswap_ecx),			},
-	{ 0xCA,		OP_2BYTE|OP_I486,			I486OP(bswap_edx),				I486OP(bswap_edx),			},
-	{ 0xCB,		OP_2BYTE|OP_I486,			I486OP(bswap_ebx),				I486OP(bswap_ebx),			},
-	{ 0xCC,		OP_2BYTE|OP_I486,			I486OP(bswap_esp),				I486OP(bswap_esp),			},
-	{ 0xCD,		OP_2BYTE|OP_I486,			I486OP(bswap_ebp),				I486OP(bswap_ebp),			},
-	{ 0xCE,		OP_2BYTE|OP_I486,			I486OP(bswap_esi),				I486OP(bswap_esi),			},
-	{ 0xCF,		OP_2BYTE|OP_I486,			I486OP(bswap_edi),				I486OP(bswap_edi),			}
-};
@@ -1,424 +0,0 @@
-/* Intel 486+ specific opcodes */
-
-static void I486OP(cpuid)(i386_state *cpustate)				/* Opcode 0x0F A2 */
-{
-	if (cpustate->cpuid_id0 == 0)
-	{
-		/* this 486 doesn't support the CPUID instruction */
-		logerror("CPUID not supported at %08x!\n", cpustate->eip);
-		i386_trap(cpustate, 6, 0);
-	}
-	else
-	{
-		switch (REG32(EAX))
-		{
-			case 0:
-			{
-				REG32(EAX) = cpustate->cpuid_max_input_value_eax;
-				REG32(EBX) = cpustate->cpuid_id0;
-				REG32(ECX) = cpustate->cpuid_id2;
-				REG32(EDX) = cpustate->cpuid_id1;
-				CYCLES(cpustate,CYCLES_CPUID);
-				break;
-			}
-
-			case 1:
-			{
-				REG32(EAX) = cpustate->cpu_version;
-				REG32(EDX) = cpustate->feature_flags;
-				CYCLES(cpustate,CYCLES_CPUID_EAX1);
-				break;
-			}
-		}
-	}
-}
-
-static void I486OP(invd)(i386_state *cpustate)				/* Opcode 0x0f 08 */
-{
-	/* Nothing to do ? */
-	CYCLES(cpustate,CYCLES_INVD);
-}
-
-static void I486OP(wbinvd)(i386_state *cpustate)			/* Opcode 0x0f 09 */
-{
-	/* Nothing to do ? */
-}
-
-static void I486OP(cmpxchg_rm8_r8)(i386_state *cpustate)	/* Opcode 0x0f b0 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	if( modrm >= 0xc0 ) {
-		UINT8 dst = LOAD_RM8(modrm);
-		UINT8 src = LOAD_REG8(modrm);
-
-		if( REG8(AL) == dst ) {
-			STORE_RM8(modrm, src);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_T);
-		} else {
-			REG8(AL) = dst;
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_F);
-		}
-	} else {
-		UINT32 ea = GetEA(cpustate,modrm);
-		UINT8 dst = READ8(cpustate,ea);
-		UINT8 src = LOAD_REG8(modrm);
-
-		if( REG8(AL) == dst ) {
-			WRITE8(cpustate,modrm, src);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_T);
-		} else {
-			REG8(AL) = dst;
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_F);
-		}
-	}
-}
-
-static void I486OP(cmpxchg_rm16_r16)(i386_state *cpustate)	/* Opcode 0x0f b1 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	if( modrm >= 0xc0 ) {
-		UINT16 dst = LOAD_RM16(modrm);
-		UINT16 src = LOAD_REG16(modrm);
-
-		if( REG16(AX) == dst ) {
-			STORE_RM16(modrm, src);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_T);
-		} else {
-			REG16(AX) = dst;
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_F);
-		}
-	} else {
-		UINT32 ea = GetEA(cpustate,modrm);
-		UINT16 dst = READ16(cpustate,ea);
-		UINT16 src = LOAD_REG16(modrm);
-
-		if( REG16(AX) == dst ) {
-			WRITE16(cpustate,modrm, src);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_T);
-		} else {
-			REG16(AX) = dst;
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_F);
-		}
-	}
-}
-
-static void I486OP(cmpxchg_rm32_r32)(i386_state *cpustate)	/* Opcode 0x0f b1 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	if( modrm >= 0xc0 ) {
-		UINT32 dst = LOAD_RM32(modrm);
-		UINT32 src = LOAD_REG32(modrm);
-
-		if( REG32(EAX) == dst ) {
-			STORE_RM32(modrm, src);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_T);
-		} else {
-			REG32(EAX) = dst;
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_REG_F);
-		}
-	} else {
-		UINT32 ea = GetEA(cpustate,modrm);
-		UINT32 dst = READ32(cpustate,ea);
-		UINT32 src = LOAD_REG32(modrm);
-
-		if( REG32(EAX) == dst ) {
-			WRITE32(cpustate,ea, src);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_T);
-		} else {
-			REG32(EAX) = dst;
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_F);
-		}
-	}
-}
-
-static void I486OP(xadd_rm8_r8)(i386_state *cpustate)	/* Opcode 0x0f c0 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	if( modrm >= 0xc0 ) {
-		UINT8 dst = LOAD_RM8(modrm);
-		UINT8 src = LOAD_REG8(modrm);
-		STORE_RM16(modrm, dst + src);
-		STORE_REG16(modrm, dst);
-		CYCLES(cpustate,CYCLES_XADD_REG_REG);
-	} else {
-		UINT32 ea = GetEA(cpustate,modrm);
-		UINT8 dst = READ8(cpustate,ea);
-		UINT8 src = LOAD_REG8(modrm);
-		WRITE8(cpustate,ea, dst + src);
-		STORE_REG8(modrm, dst);
-		CYCLES(cpustate,CYCLES_XADD_REG_MEM);
-	}
-}
-
-static void I486OP(xadd_rm16_r16)(i386_state *cpustate)	/* Opcode 0x0f c1 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	if( modrm >= 0xc0 ) {
-		UINT16 dst = LOAD_RM16(modrm);
-		UINT16 src = LOAD_REG16(modrm);
-		STORE_RM16(modrm, dst + src);
-		STORE_REG16(modrm, dst);
-		CYCLES(cpustate,CYCLES_XADD_REG_REG);
-	} else {
-		UINT32 ea = GetEA(cpustate,modrm);
-		UINT16 dst = READ16(cpustate,ea);
-		UINT16 src = LOAD_REG16(modrm);
-		WRITE16(cpustate,ea, dst + src);
-		STORE_REG16(modrm, dst);
-		CYCLES(cpustate,CYCLES_XADD_REG_MEM);
-	}
-}
-
-static void I486OP(xadd_rm32_r32)(i386_state *cpustate)	/* Opcode 0x0f c1 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	if( modrm >= 0xc0 ) {
-		UINT32 dst = LOAD_RM32(modrm);
-		UINT32 src = LOAD_REG32(modrm);
-		STORE_RM32(modrm, dst + src);
-		STORE_REG32(modrm, dst);
-		CYCLES(cpustate,CYCLES_XADD_REG_REG);
-	} else {
-		UINT32 ea = GetEA(cpustate,modrm);
-		UINT32 dst = READ32(cpustate,ea);
-		UINT32 src = LOAD_REG32(modrm);
-		WRITE32(cpustate,ea, dst + src);
-		STORE_REG32(modrm, dst);
-		CYCLES(cpustate,CYCLES_XADD_REG_MEM);
-	}
-}
-
-static void I486OP(group0F01_16)(i386_state *cpustate)		/* Opcode 0x0f 01 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	UINT16 address;
-	UINT32 ea;
-
-	switch( (modrm >> 3) & 0x7 )
-	{
-		case 0:			/* SGDT */
-			{
-				if( modrm >= 0xc0 ) {
-					address = LOAD_RM16(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				} else {
-					ea = GetEA(cpustate,modrm);
-				}
-				WRITE16(cpustate,ea, cpustate->gdtr.limit);
-				WRITE32(cpustate,ea + 2, cpustate->gdtr.base & 0xffffff);
-				CYCLES(cpustate,CYCLES_SGDT);
-				break;
-			}
-		case 1:			/* SIDT */
-			{
-				if (modrm >= 0xc0)
-				{
-					address = LOAD_RM16(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				}
-				else
-				{
-					ea = GetEA(cpustate,modrm);
-				}
-				WRITE16(cpustate,ea, cpustate->idtr.limit);
-				WRITE32(cpustate,ea + 2, cpustate->idtr.base & 0xffffff);
-				CYCLES(cpustate,CYCLES_SIDT);
-				break;
-			}
-		case 2:			/* LGDT */
-			{
-				if( modrm >= 0xc0 ) {
-					address = LOAD_RM16(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				} else {
-					ea = GetEA(cpustate,modrm);
-				}
-				cpustate->gdtr.limit = READ16(cpustate,ea);
-				cpustate->gdtr.base = READ32(cpustate,ea + 2) & 0xffffff;
-				CYCLES(cpustate,CYCLES_LGDT);
-				break;
-			}
-		case 3:			/* LIDT */
-			{
-				if( modrm >= 0xc0 ) {
-					address = LOAD_RM16(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				} else {
-					ea = GetEA(cpustate,modrm);
-				}
-				cpustate->idtr.limit = READ16(cpustate,ea);
-				cpustate->idtr.base = READ32(cpustate,ea + 2) & 0xffffff;
-				CYCLES(cpustate,CYCLES_LIDT);
-				break;
-			}
-		case 4:			/* SMSW */
-			{
-				if( modrm >= 0xc0 ) {
-					STORE_RM16(modrm, cpustate->cr[0]);
-					CYCLES(cpustate,CYCLES_SMSW_REG);
-				} else {
-					ea = GetEA(cpustate,modrm);
-					WRITE16(cpustate,ea, cpustate->cr[0]);
-					CYCLES(cpustate,CYCLES_SMSW_MEM);
-				}
-				break;
-			}
-		case 6:			/* LMSW */
-			{
-				/* TODO: Check for protection fault */
-				UINT8 b;
-				if( modrm >= 0xc0 ) {
-					b = LOAD_RM8(modrm);
-					CYCLES(cpustate,CYCLES_LMSW_REG);
-				} else {
-					ea = GetEA(cpustate,modrm);
-					CYCLES(cpustate,CYCLES_LMSW_MEM);
-				b = READ8(cpustate,ea);
-				}
-				cpustate->cr[0] &= ~0x03;
-				cpustate->cr[0] |= b & 0x03;
-				break;
-			}
-		case 7:			/* INVLPG */
-			{
-				/* Nothing to do ? */
-				break;
-			}
-		default:
-			i386_fatal("i486: unimplemented opcode 0x0f 01 /%d at %08X", (modrm >> 3) & 0x7, cpustate->eip - 2);
-			break;
-	}
-}
-
-static void I486OP(group0F01_32)(i386_state *cpustate)		/* Opcode 0x0f 01 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	UINT32 address, ea;
-
-	switch( (modrm >> 3) & 0x7 )
-	{
-		case 0:			/* SGDT */
-			{
-				if( modrm >= 0xc0 ) {
-					address = LOAD_RM32(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				} else {
-					ea = GetEA(cpustate,modrm);
-				}
-				WRITE16(cpustate,ea, cpustate->gdtr.limit);
-				WRITE32(cpustate,ea + 2, cpustate->gdtr.base);
-				CYCLES(cpustate,CYCLES_SGDT);
-				break;
-			}
-		case 1:			/* SIDT */
-			{
-				if (modrm >= 0xc0)
-				{
-					address = LOAD_RM32(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				}
-				else
-				{
-					ea = GetEA(cpustate,modrm);
-				}
-				WRITE16(cpustate,ea, cpustate->idtr.limit);
-				WRITE32(cpustate,ea + 2, cpustate->idtr.base);
-				CYCLES(cpustate,CYCLES_SIDT);
-				break;
-			}
-		case 2:			/* LGDT */
-			{
-				if( modrm >= 0xc0 ) {
-					address = LOAD_RM32(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				} else {
-					ea = GetEA(cpustate,modrm);
-				}
-				cpustate->gdtr.limit = READ16(cpustate,ea);
-				cpustate->gdtr.base = READ32(cpustate,ea + 2);
-				CYCLES(cpustate,CYCLES_LGDT);
-				break;
-			}
-		case 3:			/* LIDT */
-			{
-				if( modrm >= 0xc0 ) {
-					address = LOAD_RM32(modrm);
-					ea = i386_translate( cpustate, CS, address );
-				} else {
-					ea = GetEA(cpustate,modrm);
-				}
-				cpustate->idtr.limit = READ16(cpustate,ea);
-				cpustate->idtr.base = READ32(cpustate,ea + 2);
-				CYCLES(cpustate,CYCLES_LIDT);
-				break;
-			}
-		case 7:			/* INVLPG */
-			{
-				/* Nothing to do ? */
-				break;
-			}
-		default:
-			i386_fatal("i486: unimplemented opcode 0x0f 01 /%d at %08X", (modrm >> 3) & 0x7, cpustate->eip - 2);
-			break;
-	}
-}
-
-static void I486OP(bswap_eax)(i386_state *cpustate)		/* Opcode 0x0f 38 */
-{
-	REG32(EAX) = SWITCH_ENDIAN_32(REG32(EAX));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_ecx)(i386_state *cpustate)		/* Opcode 0x0f 39 */
-{
-	REG32(ECX) = SWITCH_ENDIAN_32(REG32(ECX));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_edx)(i386_state *cpustate)		/* Opcode 0x0f 3A */
-{
-	REG32(EDX) = SWITCH_ENDIAN_32(REG32(EDX));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_ebx)(i386_state *cpustate)		/* Opcode 0x0f 3B */
-{
-	REG32(EBX) = SWITCH_ENDIAN_32(REG32(EBX));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_esp)(i386_state *cpustate)		/* Opcode 0x0f 3C */
-{
-	REG32(ESP) = SWITCH_ENDIAN_32(REG32(ESP));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_ebp)(i386_state *cpustate)		/* Opcode 0x0f 3D */
-{
-	REG32(EBP) = SWITCH_ENDIAN_32(REG32(EBP));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_esi)(i386_state *cpustate)		/* Opcode 0x0f 3E */
-{
-	REG32(ESI) = SWITCH_ENDIAN_32(REG32(ESI));
-	CYCLES(cpustate,1);		/* TODO */
-}
-
-static void I486OP(bswap_edi)(i386_state *cpustate)		/* Opcode 0x0f 3F */
-{
-	REG32(EDI) = SWITCH_ENDIAN_32(REG32(EDI));
-	CYCLES(cpustate,1);		/* TODO */
-}
@@ -1,53 +0,0 @@
-/* Pentium+ specific opcodes */
-
-static void PENTIUMOP(rdmsr)(i386_state *cpustate)			/* Opcode 0x0f 32 */
-{
-	/* TODO */
-	CYCLES(cpustate,CYCLES_RDMSR);
-}
-
-static void PENTIUMOP(wrmsr)(i386_state *cpustate)			/* Opcode 0x0f 30 */
-{
-	/* TODO */
-	CYCLES(cpustate,1);		/* TODO: correct cycle count */
-}
-
-static void PENTIUMOP(rdtsc)(i386_state *cpustate)			/* Opcode 0x0f 31 */
-{
-	UINT64 ts = cpustate->tsc + (cpustate->base_cycles - i386_ICount);
-	REG32(EAX) = (UINT32)(ts);
-	REG32(EDX) = (UINT32)(ts >> 32);
-
-	CYCLES(cpustate,CYCLES_RDTSC);
-}
-
-static void I386OP(cyrix_unknown)(i386_state *cpustate)		/* Opcode 0x0f 74 */
-{
-	CYCLES(cpustate,1);
-}
-
-static void PENTIUMOP(cmpxchg8b_m64)(i386_state *cpustate)	/* Opcode 0x0f c7 */
-{
-	UINT8 modm = FETCH(cpustate);
-	if( modm >= 0xc0 ) {
-		i386_fatal("pentium: cmpxchg8b_m64 - invalid modm");
-	} else {
-		UINT32 ea = GetEA(cpustate,modm);
-		UINT64 value = READ64(cpustate,ea);
-		UINT64 edx_eax = (((UINT64) REG32(EDX)) << 32) | REG32(EAX);
-		UINT64 ecx_ebx = (((UINT64) REG32(ECX)) << 32) | REG32(EBX);
-
-		if( value == edx_eax ) {
-			WRITE64(cpustate,ea, ecx_ebx);
-			cpustate->ZF = 1;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_T);
-		} else {
-			REG32(EDX) = (UINT32) (value >> 32);
-			REG32(EAX) = (UINT32) (value >>  0);
-			cpustate->ZF = 0;
-			CYCLES(cpustate,CYCLES_CMPXCHG_REG_MEM_F);
-		}
-	}
-}
-
-
@@ -1,352 +0,0 @@
-/* Intel x87 FPU opcodes */
-
-#define ST(x)	(cpustate->fpu_reg[(cpustate->fpu_top + (x)) & 7])
-#define FPU_INFINITY_DOUBLE		COMBINE_64_32_32(0x7ff00000, 0x00000000)
-#define FPU_INFINITY_SINGLE		(0x7f800000)
-#define FPU_SIGN_BIT_DOUBLE		COMBINE_64_32_32(0x80000000, 0x00000000)
-#define FPU_SIGN_BIT_SINGLE		(0x80000000)
-
-/* FPU control word flags */
-#define FPU_MASK_INVALID_OP			0x0001
-#define FPU_MASK_DENORMAL_OP		0x0002
-#define FPU_MASK_ZERO_DIVIDE		0x0004
-#define FPU_MASK_OVERFLOW			0x0008
-#define FPU_MASK_UNDERFLOW			0x0010
-#define FPU_MASK_PRECISION			0x0020
-
-/* FPU status word flags */
-#define FPU_BUSY					0x8000
-#define FPU_C3						0x4000
-#define FPU_STACK_TOP_MASK			0x3800
-#define FPU_C2						0x0400
-#define FPU_C1						0x0200
-#define FPU_C0						0x0100
-#define FPU_ERROR_SUMMARY			0x0080
-#define FPU_STACK_FAULT				0x0040
-#define FPU_EXCEPTION_PRECISION		0x0020
-#define FPU_EXCEPTION_UNDERFLOW		0x0010
-#define FPU_EXCEPTION_OVERFLOW		0x0008
-#define FPU_EXCEPTION_ZERO_DIVIDE	0x0004
-#define FPU_EXCEPTION_DENORMAL_OP	0x0002
-#define FPU_EXCEPTION_INVALID_OP	0x0001
-
-static INLINE void FPU_PUSH(i386_state *cpustate, X87_REG value)
-{
-	cpustate->fpu_top--;
-	if (cpustate->fpu_top < 0)
-	{
-		cpustate->fpu_top = 7;
-	}
-
-	cpustate->fpu_reg[cpustate->fpu_top] = value;
-}
-
-static INLINE X87_REG FPU_POP(i386_state *cpustate)
-{
-	X87_REG value = cpustate->fpu_reg[cpustate->fpu_top];
-
-	cpustate->fpu_tag_word |= 3 << (cpustate->fpu_top * 2);		/* set FPU register tag to 3 (empty) */
-
-	cpustate->fpu_top++;
-	if (cpustate->fpu_top > 7)
-	{
-		cpustate->fpu_top = 0;
-	}
-
-	return value;
-}
-
-static void I386OP(fpu_group_d8)(i386_state *cpustate)		/* Opcode 0xd8 */
-{
-	UINT8 modrm = FETCH(cpustate);
-	i386_fatal("I386: FPU Op D8 %02X at %08X", modrm, cpustate->pc-2);
-}
-
-static void I386OP(fpu_group_d9)(i386_state *cpustate)		/* Opcode 0xd9 */
-{
-	UINT8 modrm = FETCH(cpustate);
-
-	if (modrm < 0xc0)
-	{
-		UINT32 ea = GetEA(cpustate,modrm);
-
-		switch ((modrm >> 3) & 0x7)
-		{
-			case 5:			/* FLDCW */
-			{
-				cpustate->fpu_control_word = READ16(cpustate,ea);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			case 7:			/* FSTCW */
-			{
-				WRITE16(cpustate,ea, cpustate->fpu_control_word);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			default:
-				i386_fatal("I386: FPU Op D9 %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-	else
-	{
-		switch (modrm & 0x3f)
-		{
-			/* FLD */
-			case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
-			{
-				X87_REG t = ST(modrm & 7);
-				FPU_PUSH(cpustate,t);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			case 0x20:		/* FCHS */
-			{
-				ST(0).i ^= FPU_SIGN_BIT_DOUBLE;
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			case 0x28:		/* FLD1 */
-			{
-				X87_REG t;
-				t.f = 1.0;
-				FPU_PUSH(cpustate,t);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			case 0x2e:		/* FLDZ */
-			{
-				X87_REG t;
-				t.f = 0.0;
-				FPU_PUSH(cpustate,t);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-			default:
-				i386_fatal("I386: FPU Op D9 %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-}
-
-static void I386OP(fpu_group_da)(i386_state *cpustate)		/* Opcode 0xda */
-{
-	UINT8 modrm = FETCH(cpustate);
-	i386_fatal("I386: FPU Op DA %02X at %08X", modrm, cpustate->pc-2);
-}
-
-static void I386OP(fpu_group_db)(i386_state *cpustate)		/* Opcode 0xdb */
-{
-	UINT8 modrm = FETCH(cpustate);
-
-	if (modrm < 0xc0)
-	{
-		i386_fatal("I386: FPU Op DB %02X at %08X", modrm, cpustate->pc-2);
-	}
-	else
-	{
-		switch (modrm & 0x3f)
-		{
-			case 0x23:		/* FINIT */
-			{
-				cpustate->fpu_control_word = 0x37f;
-				cpustate->fpu_status_word = 0;
-				cpustate->fpu_tag_word = 0xffff;
-				cpustate->fpu_data_ptr = 0;
-				cpustate->fpu_inst_ptr = 0;
-				cpustate->fpu_opcode = 0;
-
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			case 0x24:		/* FSETPM (treated as nop on 387+) */
-			{
-				CYCLES(cpustate,1);
-				break;
-			}
-
-			default:
-				i386_fatal("I386: FPU Op DB %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-}
-
-static void I386OP(fpu_group_dc)(i386_state *cpustate)		/* Opcode 0xdc */
-{
-	UINT8 modrm = FETCH(cpustate);
-
-	if (modrm < 0xc0)
-	{
-		/*UINT32 ea = GetEA(cpustate,modrm); */
-
-		switch ((modrm >> 3) & 0x7)
-		{
-			default:
-				i386_fatal("I386: FPU Op DC %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-	else
-	{
-		switch (modrm & 0x3f)
-		{
-			case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
-			{
-				/* FDIVR */
-				if ((ST(modrm & 7).i & COMBINE_64_32_32(0x7fffffff, 0xffffffff)) == 0)
-				{
-					/* set result as infinity if zero divide is masked */
-					if (cpustate->fpu_control_word & FPU_MASK_ZERO_DIVIDE)
-					{
-						ST(modrm & 7).i |= FPU_INFINITY_DOUBLE;
-					}
-				}
-				else
-				{
-					ST(modrm & 7).f = ST(0).f / ST(modrm & 7).f;
-				}
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			default:
-				i386_fatal("I386: FPU Op DC %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-}
-
-static void I386OP(fpu_group_dd)(i386_state *cpustate)		/* Opcode 0xdd */
-{
-	UINT8 modrm = FETCH(cpustate);
-
-	if (modrm < 0xc0)
-	{
-		UINT32 ea = GetEA(cpustate,modrm);
-
-		switch ((modrm >> 3) & 0x7)
-		{
-			case 7:			/* FSTSW */
-			{
-				WRITE16(cpustate,ea, (cpustate->fpu_status_word & ~FPU_STACK_TOP_MASK) | (cpustate->fpu_top << 10));
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			default:
-				i386_fatal("I386: FPU Op DD %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-	else
-	{
-		switch (modrm & 0x3f)
-		{
-			default:
-				i386_fatal("I386: FPU Op DD %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-}
-
-static void I386OP(fpu_group_de)(i386_state *cpustate)		/* Opcode 0xde */
-{
-	UINT8 modrm = FETCH(cpustate);
-
-	if (modrm < 0xc0)
-	{
-	/*  UINT32 ea = GetEA(cpustate,modrm); */
-
-		switch ((modrm >> 3) & 0x7)
-		{
-			default:
-				i386_fatal("I386: FPU Op DE %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-	else
-	{
-		switch (modrm & 0x3f)
-		{
-			case 0x19:			/* FCOMPP */
-			{
-				cpustate->fpu_status_word &= ~(FPU_C3 | FPU_C2 | FPU_C0);
-				if (ST(0).f > ST(1).f)
-				{
-					/* C3 = 0, C2 = 0, C0 = 0 */
-				}
-				else if (ST(0).f < ST(1).f)
-				{
-					cpustate->fpu_status_word |= FPU_C0;
-				}
-				else if (ST(0).f == ST(1).f)
-				{
-					cpustate->fpu_status_word |= FPU_C3;
-				}
-				else
-				{
-					/* unordered */
-					cpustate->fpu_status_word |= (FPU_C3 | FPU_C2 | FPU_C0);
-				}
-				FPU_POP(cpustate);
-				FPU_POP(cpustate);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			/* FDIVP */
-			case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
-			{
-				if ((ST(0).i & COMBINE_64_32_32(0x7fffffff, 0xffffffff)) == 0)
-				{
-					/* set result as infinity if zero divide is masked */
-					if (cpustate->fpu_control_word & FPU_MASK_ZERO_DIVIDE)
-					{
-						ST(modrm & 7).i |= FPU_INFINITY_DOUBLE;
-					}
-				}
-				else
-				{
-					ST(modrm & 7).f = ST(modrm & 7).f / ST(0).f;
-				}
-				FPU_POP(cpustate);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			default:
-				i386_fatal("I386: FPU Op DE %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-}
-
-static void I386OP(fpu_group_df)(i386_state *cpustate)		/* Opcode 0xdf */
-{
-	UINT8 modrm = FETCH(cpustate);
-
-	if (modrm < 0xc0)
-	{
-	/*  UINT32 ea = GetEA(cpustate,modrm); */
-
-		switch ((modrm >> 3) & 0x7)
-		{
-			default:
-				i386_fatal("I386: FPU Op DF %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-	else
-	{
-		switch (modrm & 0x3f)
-		{
-			case 0x20:			/* FSTSW AX */
-			{
-				REG16(AX) = (cpustate->fpu_status_word & ~FPU_STACK_TOP_MASK) | (cpustate->fpu_top << 10);
-				CYCLES(cpustate,1);		/* TODO */
-				break;
-			}
-
-			default:
-				i386_fatal("I386: FPU Op DF %02X at %08X", modrm, cpustate->pc-2);
-		}
-	}
-}
@@ -63,7 +63,6 @@ typedef struct
 	INT8 nmi_state;
 	INT8 irq_state;
 	int extra_cycles;       /* extra cycles for interrupts */
-	INT8 test_state;		/* the TEST input */
 }
 i86_Regs;

@@ -124,53 +123,12 @@ static void i86_state_register(void)
 	state_save_register_INT8(  type, cpu, "NMI_STATE",		&I.nmi_state, 1);
 	state_save_register_INT8(  type, cpu, "IRQ_STATE",		&I.irq_state, 1);
 	state_save_register_int(   type, cpu, "EXTRA_CYCLES",	&I.extra_cycles);
-	state_save_register_INT8(  type, cpu, "TEST_STATE",		&I.test_state, 1);
-}
-
-/* the 16-bit data bus, see i86intf.h */
-int i86_bus16;
-int i86_bus16_word;
-
-unsigned i86_read_word16(unsigned ea)
-{
-	unsigned lo, hi;
-
-	/* an odd address is two byte cycles on the 8086 too */
-	if (ea & 1)
-	{
-		lo = cpu_readmem20(ea);
-		hi = cpu_readmem20((ea + 1) & AMASK);
-		return lo | (hi << 8);
-	}
-	i86_bus16_word = 1;
-	lo = cpu_readmem20(ea);
-	hi = cpu_readmem20(ea + 1);
-	i86_bus16_word = 0;
-	return lo | (hi << 8);
-}
-
-void i86_write_word16(unsigned ea, unsigned val)
-{
-	if (ea & 1)
-	{
-		cpu_writemem20(ea, val & 0xff);
-		cpu_writemem20((ea + 1) & AMASK, (val >> 8) & 0xff);
-		return;
-	}
-	i86_bus16_word = 1;
-	cpu_writemem20(ea, val & 0xff);
-	cpu_writemem20(ea + 1, (val >> 8) & 0xff);
-	i86_bus16_word = 0;
 }

 void i86_init(void)
 {
 	unsigned int i, j, c;
 	BREGS reg_name[8] = {AL, CL, DL, BL, AH, CH, DH, BH};
-
-	/* the 16-bit data bus is off unless the driver turns it on */
-	i86_bus16 = 0;
-	i86_bus16_word = 0;
 	for (i = 0; i < 256; i++)
 	{
 		for (j = i, c = 0; j > 0; j >>= 1)
@@ -199,7 +157,6 @@ void i86_reset(void *param)
 {
 	memset(&I, 0, sizeof (I));

-	I.test_state = 1;
 	I.sregs[CS] = 0xf000;
 	I.base[CS] = SegBase(CS);
 	I.pc = 0xffff0 & AMASK;
@@ -330,11 +287,6 @@ void i86_set_reg(int regnum, unsigned val)

 void i86_set_irq_line(int irqline, int state)
 {
-	if (irqline == I86_TEST_LINE)
-	{
-		I.test_state = (state != CLEAR_LINE);
-		return;
-	}
 	if (irqline == IRQ_LINE_NMI)
 	{
 		if (I.nmi_state == state)
@@ -71,24 +71,20 @@ typedef enum { AL,AH,CL,CH,DL,DH,BL,BH,SPL,SPH,BPL,BPH,SIL,SIH,DIL,DIH } BREGS;

 /************************************************************************/

-/* the 16-bit data bus of the 8086 (see i86intf.h): off unless a driver turns it on */
-unsigned i86_read_word16(unsigned ea);
-void i86_write_word16(unsigned ea, unsigned val);
-
 #define SegBase(Seg) 			(I.sregs[Seg] << 4)

 #define DefaultBase(Seg) 		((seg_prefix && (Seg == DS || Seg == SS)) ? prefix_base : I.base[Seg])

 #define GetMemB(Seg,Off)		(cpu_readmem20((DefaultBase(Seg) + (Off)) & AMASK))
-#define GetMemW(Seg,Off)		(i86_bus16 ? i86_read_word16((DefaultBase(Seg) + (Off)) & AMASK) : ((WORD)GetMemB(Seg, Off) + (WORD)(GetMemB(Seg, (Off) + 1) << 8)))
+#define GetMemW(Seg,Off)		((WORD)GetMemB(Seg, Off) + (WORD)(GetMemB(Seg, (Off) + 1) << 8))
 #define PutMemB(Seg,Off,x)		cpu_writemem20((DefaultBase(Seg) + (Off)) & AMASK, (x))
-#define PutMemW(Seg,Off,x)		{ if (i86_bus16) i86_write_word16((DefaultBase(Seg) + (Off)) & AMASK, (x)); else { PutMemB(Seg, Off, (x) & 0xff); PutMemB(Seg, (Off) + 1, ((x) >> 8) & 0xff); } }
+#define PutMemW(Seg,Off,x)		{ PutMemB(Seg, Off, (x) & 0xff); PutMemB(Seg, (Off) + 1, ((x) >> 8) & 0xff); }

 #define PEEKBYTE(ea) 			(cpu_readmem20((ea) & AMASK))
 #define ReadByte(ea) 			(cpu_readmem20((ea) & AMASK))
-#define ReadWord(ea)			(i86_bus16 ? i86_read_word16((ea) & AMASK) : (cpu_readmem20((ea) & AMASK) + (cpu_readmem20(((ea) + 1) & AMASK) << 8)))
+#define ReadWord(ea)			(cpu_readmem20((ea) & AMASK) + (cpu_readmem20(((ea) + 1) & AMASK) << 8))
 #define WriteByte(ea,val)		cpu_writemem20((ea) & AMASK, val);
-#define WriteWord(ea,val)		{ if (i86_bus16) i86_write_word16((ea) & AMASK, (val)); else { cpu_writemem20((ea) & AMASK, (val) & 0xff); cpu_writemem20(((ea) + 1) & AMASK, ((val) >> 8) & 0xff); } }
+#define WriteWord(ea,val)		{ cpu_writemem20((ea) & AMASK, (val) & 0xff); cpu_writemem20(((ea) + 1) & AMASK, ((val) >> 8) & 0xff); }

 #define read_port(port) 		cpu_readport16(port)
 #define write_port(port,val) 	cpu_writeport16(port,val)
@@ -11,23 +11,9 @@ enum {
 	I86_VECTOR, I86_PENDING, I86_NMI_STATE, I86_IRQ_STATE
 };

-/* the TEST input (WAIT instruction): a CPU waits at a WAIT instruction
-   while it is cleared; it is asserted at reset, so WAIT goes on unless a
-   driver clears it */
-#define I86_TEST_LINE	1
-
 /* Public variables */
 extern int i86_ICount;

-/* The 8086 has a 16-bit data bus, but the core accesses memory a byte at a
-   time. A driver whose hardware needs an aligned word access to be one bus
-   cycle sets i86_bus16 (all the i86 CPUs of the machine): the core then
-   accesses an aligned word as its low byte then its high byte, with
-   i86_bus16_word set during the two accesses, so the handlers can make
-   them one 16-bit access. Off by default: nothing changes for the others. */
-extern int i86_bus16;
-extern int i86_bus16_word;
-
 /* Public functions */

 extern void i86_init(void);
@@ -544,13 +544,8 @@ static void PREFIX(rep)(int flagval)
 		for (; count > 0; count--)
 		{
 			if (ICOUNT <= 0) { I.pc = I.prevpc; break; }
-			if (i86_bus16)
-				PutMemW(ES,I.regs.w[DI],I.regs.w[AX])
-			else
-			{
-				PutMemB(ES,I.regs.w[DI],I.regs.b[AL]);
-				PutMemB(ES,I.regs.w[DI]+1,I.regs.b[AH]);
-			}
+			PutMemB(ES,I.regs.w[DI],I.regs.b[AL]);
+			PutMemB(ES,I.regs.w[DI]+1,I.regs.b[AH]);
 			I.regs.w[DI] += 2 * I.DirVal;
 			ICOUNT -= cycles.rep_stos16_count;
 		}
@@ -1999,15 +1994,6 @@ static void PREFIX86(_call_far)(void)

 static void PREFIX86(_wait)(void)    /* Opcode 0x9b */
 {
-#ifndef I286
-	/* the TEST input cleared: wait on this instruction */
-	if (!I.test_state)
-	{
-		ICOUNT = 0;
-		I.pc--;
-		return;
-	}
-#endif
 	ICOUNT -= cycles.wait;
 }

@@ -2074,13 +2060,8 @@ static void PREFIX86(_mov_axdisp)(void)    /* Opcode 0xa1 */
 	addr += FETCH << 8;

 	ICOUNT -= cycles.mov_am16;
-	if (i86_bus16)
-		I.regs.w[AX] = GetMemW(DS, addr);
-	else
-	{
-		I.regs.b[AL] = GetMemB(DS, addr);
-		I.regs.b[AH] = GetMemB(DS, addr+1);
-	}
+	I.regs.b[AL] = GetMemB(DS, addr);
+	I.regs.b[AH] = GetMemB(DS, addr+1);
 }

 static void PREFIX86(_mov_dispal)(void)    /* Opcode 0xa2 */
@@ -2102,13 +2083,8 @@ static void PREFIX86(_mov_dispax)(void)    /* Opcode 0xa3 */
 	addr += FETCH << 8;

 	ICOUNT -= cycles.mov_ma16;
-	if (i86_bus16)
-		PutMemW(DS, addr, I.regs.w[AX])
-	else
-	{
-		PutMemB(DS, addr, I.regs.b[AL]);
-		PutMemB(DS, addr+1, I.regs.b[AH]);
-	}
+	PutMemB(DS, addr, I.regs.b[AL]);
+	PutMemB(DS, addr+1, I.regs.b[AH]);
 }

 static void PREFIX86(_movsb)(void)    /* Opcode 0xa4 */
@@ -2172,13 +2148,8 @@ static void PREFIX86(_stosb)(void)    /* Opcode 0xaa */

 static void PREFIX86(_stosw)(void)    /* Opcode 0xab */
 {
-	if (i86_bus16)
-		PutMemW(ES,I.regs.w[DI],I.regs.w[AX])
-	else
-	{
-		PutMemB(ES,I.regs.w[DI],I.regs.b[AL]);
-		PutMemB(ES,I.regs.w[DI]+1,I.regs.b[AH]);
-	}
+	PutMemB(ES,I.regs.w[DI],I.regs.b[AL]);
+	PutMemB(ES,I.regs.w[DI]+1,I.regs.b[AH]);
 	I.regs.w[DI] += 2 * I.DirVal;
 	ICOUNT -= cycles.stos16;
 }
@@ -120,33 +120,9 @@ static INLINE int i960_is_burst( UINT32 address )
 	return i960_burst_cb == NULL || i960_burst_cb( address );
 }

-/* port: the opcodes are read straight from the memory block of the last
-   fetch (ROM, RAM or a bank: what cpu_readmem32ledw_dword reads there);
-   anything else goes through the memory system. Forgotten at every
-   timeslice, as the banks are only set up between them */
-static UINT32 i960_fetch_start, i960_fetch_len;
-static const UINT8 *i960_fetch_ptr;
-
-static UINT32 i960_readop_slow( UINT32 address )
-{
-	offs_t start, len;
-	const UINT8 *p = (const UINT8 *)memory_get_read_range( cpu_getactivecpu(), address, &start, &len );
-	if( p != NULL )
-	{
-		/* the block in the CPU's addresses (the mask only drops high bits) */
-		i960_fetch_start = address - ( ( address & mem_amask ) - start );
-		i960_fetch_len = len;
-		i960_fetch_ptr = p;
-	}
-	return cpu_readmem32ledw_dword( address );
-}
-
 static INLINE UINT32 i960_readop( UINT32 address )
 {
-	UINT32 off = address - i960_fetch_start;
-	if( off < i960_fetch_len )
-		return *(const data32_t *)( i960_fetch_ptr + ( off & ~3 ) );
-	return i960_readop_slow( address );
+	return cpu_readmem32ledw_dword( address );
 }

 static void i960_fatal( const char *fmt, ... )
@@ -904,14 +880,7 @@ static void execute_burst_stall_op(UINT32 opcode)
 	check_immediate_irqs();
 }

-/* port: inlined in its only caller, the i960_execute loop: as a function,
-   saving and restoring its registers on every instruction cost a fifth of
-   the time spent in the CPU */
-#if defined(__GNUC__)
-static INLINE __attribute__((always_inline)) void execute_op(UINT32 opcode)
-#else
-static INLINE void execute_op(UINT32 opcode)
-#endif
+static void execute_op(UINT32 opcode)
 {
 	UINT32 t1, t2;
 	double t1f, t2f;
@@ -2552,7 +2521,6 @@ int i960_execute( int cycles )
 	UINT32 opcode;

 	i960_icount = cycles;
-	i960_fetch_len = 0;

 	/* delay checking irqs if we are in burst stall mode */
 	if( m_stall_state.burst_mode == 0 )
@@ -483,7 +483,6 @@ void konami_init(void)
 	state_save_register_UINT8("konami", cpu, "NMI", &konami.nmi_state, 1);
 	state_save_register_UINT8("konami", cpu, "IRQ", &konami.irq_state[0], 1);
 	state_save_register_UINT8("konami", cpu, "FIRQ", &konami.irq_state[1], 1);
-	state_save_register_int("konami", cpu, "extra_cycles", &konami.extra_cycles);	/* the cycles of an interrupt taken outside the execute loop */
 }

 void konami_reset(void *param)
@@ -413,9 +413,6 @@ static void m37710_timer_b2_cb(int param)
 	cpuintrf_pop_context();
 }

-/* timer A output pins (set by the driver just before it clocks the timer, not saved) */
-static int m37710_timer_out[5];
-
 static void m37710_external_tick(int timer, int state)
 {
 	/* we only care if the state is "on" */
@@ -429,22 +426,15 @@ static void m37710_external_tick(int timer, int state)
 	{
 		if ((m37710i_cpu.m37710_regs[0x56+timer] & 0x3) == 1)
 		{
-			/* the count direction, as current MAME: timer B counts down; timer A
-			   follows its output pin (mode bit 4) or the up/down register */
-			int upcount = 0;
-			UINT16 count = m37710i_cpu.m37710_regs[0x46+(timer*2)] | (m37710i_cpu.m37710_regs[0x46+(timer*2)+1] << 8);
-
-			if (timer <= 4)
+			if (m37710i_cpu.m37710_regs[0x46+(timer*2)] == 0xff)
 			{
-				if (m37710i_cpu.m37710_regs[0x56+timer] & 0x10)
-					upcount = m37710_timer_out[timer];
-				else
-					upcount = (m37710i_cpu.m37710_regs[0x44] >> timer) & 1;
+				m37710i_cpu.m37710_regs[0x46+(timer*2)] = 0;
+				m37710i_cpu.m37710_regs[0x46+(timer*2)+1]++;
+			}
+			else
+			{
+				m37710i_cpu.m37710_regs[0x46+(timer*2)]++;
 			}
-
-			count = upcount ? count + 1 : count - 1;
-			m37710i_cpu.m37710_regs[0x46+(timer*2)] = count & 0xff;
-			m37710i_cpu.m37710_regs[0x46+(timer*2)+1] = count >> 8;
 		}
 		else
 		{
@@ -1096,11 +1086,6 @@ void m37710_set_irq_line(int line, int state)
 		m37710_external_tick(line - M37710_LINE_TIMERA0TICK, state);
 		return;
 	}
-	if (line >= M37710_LINE_TIMERA0OUT && line <= M37710_LINE_TIMERA4OUT)
-	{
-		m37710_timer_out[line - M37710_LINE_TIMERA0OUT] = (state != CLEAR_LINE);
-		return;
-	}
 	FTABLE_SET_LINE(line, state);
 }

@@ -63,13 +63,6 @@ enum
 	M37710_LINE_TIMERB1TICK,
 	M37710_LINE_TIMERB2TICK,

-	/* timer A output pins: the count direction of an event counter in up/down pin mode */
-	M37710_LINE_TIMERA0OUT,
-	M37710_LINE_TIMERA1OUT,
-	M37710_LINE_TIMERA2OUT,
-	M37710_LINE_TIMERA3OUT,
-	M37710_LINE_TIMERA4OUT,
-
 	M37710_LINE_MAX
 };

@@ -554,24 +554,6 @@ static void state_register(const char *type)
 	state_save_register_UINT8 (type, cpu, "NMI_STATE", &m6800.nmi_state, 1);
 	state_save_register_UINT8 (type, cpu, "IRQ_STATE", &m6800.irq_state[M6800_IRQ_LINE], 1);
 	state_save_register_UINT8 (type, cpu, "TIN_STATE", &m6800.irq_state[M6800_TIN_LINE], 1);
-	state_save_register_UINT16(type, cpu, "PPC", &m6800.ppc.w.l, 1);
-	state_save_register_UINT8 (type, cpu, "WAI_STATE", &m6800.wai_state, 1);
-	state_save_register_UINT8 (type, cpu, "IC_EDDGE", &m6800.ic_eddge, 1);
-	state_save_register_int   (type, cpu, "EXTRA_CYCLES", &m6800.extra_cycles);
-	/* the internal registers of the 6801/6803/63701: ports, timer, RAM control */
-	state_save_register_UINT8 (type, cpu, "PORT1_DDR", &m6800.port1_ddr, 1);
-	state_save_register_UINT8 (type, cpu, "PORT2_DDR", &m6800.port2_ddr, 1);
-	state_save_register_UINT8 (type, cpu, "PORT1_DATA", &m6800.port1_data, 1);
-	state_save_register_UINT8 (type, cpu, "PORT2_DATA", &m6800.port2_data, 1);
-	state_save_register_UINT8 (type, cpu, "TCSR", &m6800.tcsr, 1);
-	state_save_register_UINT8 (type, cpu, "PENDING_TCSR", &m6800.pending_tcsr, 1);
-	state_save_register_UINT8 (type, cpu, "IRQ2", &m6800.irq2, 1);
-	state_save_register_UINT8 (type, cpu, "RAM_CTRL", &m6800.ram_ctrl, 1);
-	state_save_register_UINT32(type, cpu, "COUNTER", &m6800.counter.d, 1);
-	state_save_register_UINT32(type, cpu, "OUTPUT_COMPARE", &m6800.output_compare.d, 1);
-	state_save_register_UINT16(type, cpu, "INPUT_CAPTURE", &m6800.input_capture, 1);
-	state_save_register_UINT32(type, cpu, "TIMER_OVER", &m6800.timer_over.d, 1);
-	state_save_register_UINT32(type, cpu, "TIMER_NEXT", &timer_next, 1);
 }

 void m6800_init(void)
@@ -260,14 +260,6 @@ void m68k_set_fc_callback(void  (*callback)(unsigned int new_fc));
 */
 void m68k_set_instr_hook_callback(void  (*callback)(void));

-/* Called after CMPI.L #imm,Dn with the immediate value and the register
- * number, and when an RTE is executed in supervisor mode. The FD1094 changes
- * its decryption state on these. Shared by all the 68000 CPUs; m68k_init()
- * clears them.
- */
-extern void (*m68k_cmpild_callback)(unsigned int val, int reg);
-extern void (*m68k_rte_callback)(void);
-


 /* ======================================================================== */
@@ -4178,14 +4178,6 @@ M68KMAKE_OP(cmpi, 32, ., d)
 	FLAG_Z = MASK_OUT_ABOVE_32(res);
 	FLAG_V = VFLAG_SUB_32(src, dst, res);
 	FLAG_C = CFLAG_SUB_32(src, dst, res);
-
-	if (m68k_cmpild_callback)
-	{
-		m68k_cmpild_callback(src, REG_IR & 7);
-#if M68K_EMULATE_PREFETCH
-		CPU_PREF_ADDR = 1;	/* the next words are fetched again (FD1094 state change) */
-#endif
-	}
 }


@@ -8976,14 +8968,6 @@ M68KMAKE_OP(rte, 32, ., .)

 		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */

-		if (m68k_rte_callback)
-		{
-			m68k_rte_callback();
-#if M68K_EMULATE_PREFETCH
-			CPU_PREF_ADDR = 1;	/* fetched again with the new state */
-#endif
-		}
-
 		if(CPU_TYPE_IS_000(CPU_TYPE))
 		{
 			new_sr = m68ki_pull_16();
@@ -68,10 +68,6 @@ char* m68ki_cpu_names[9] =
 /* The CPU core */
 m68ki_cpu_core m68ki_cpu = {0};

-/* FD1094 hooks, shared by all the 68000 CPUs (see m68k.h) */
-void (*m68k_cmpild_callback)(unsigned int val, int reg) = NULL;
-void (*m68k_rte_callback)(void) = NULL;
-
 #if M68K_EMULATE_ADDRESS_ERROR
 jmp_buf m68ki_aerr_trap;
 #endif /* M68K_EMULATE_ADDRESS_ERROR */
@@ -759,8 +755,6 @@ void m68k_init(void)
 	m68k_set_pc_changed_callback(NULL);
 	m68k_set_fc_callback(NULL);
 	m68k_set_instr_hook_callback(NULL);
-	m68k_cmpild_callback = NULL;
-	m68k_rte_callback = NULL;
 }

 /* Pulse the RESET line on the CPU */
@@ -11782,14 +11782,6 @@ void m68k_op_cmpi_32_d(void)
 	FLAG_Z = MASK_OUT_ABOVE_32(res);
 	FLAG_V = VFLAG_SUB_32(src, dst, res);
 	FLAG_C = CFLAG_SUB_32(src, dst, res);
-
-	if (m68k_cmpild_callback)
-	{
-		m68k_cmpild_callback(src, REG_IR & 7);
-#if M68K_EMULATE_PREFETCH
-		CPU_PREF_ADDR = 1;	/* the next words are fetched again (FD1094 state change) */
-#endif
-	}
 }


@@ -3924,14 +3924,6 @@ void m68k_op_rte_32(void)

 		m68ki_trace_t0();			   /* auto-disable (see m68kcpu.h) */

-		if (m68k_rte_callback)
-		{
-			m68k_rte_callback();
-#if M68K_EMULATE_PREFETCH
-			CPU_PREF_ADDR = 1;	/* fetched again with the new state */
-#endif
-		}
-
 		if(CPU_TYPE_IS_000(CPU_TYPE))
 		{
 			new_sr = m68ki_pull_16();
@@ -512,14 +512,12 @@ void m6809_init(void)
 	state_save_register_UINT16("m6809", cpu, "S", &S, 1);
 	state_save_register_UINT16("m6809", cpu, "X", &X, 1);
 	state_save_register_UINT16("m6809", cpu, "Y", &Y, 1);
-	state_save_register_UINT16("m6809", cpu, "D", &D, 1);	/* the accumulators A and B */
 	state_save_register_UINT8("m6809", cpu, "DP", &DP, 1);
 	state_save_register_UINT8("m6809", cpu, "CC", &CC, 1);
 	state_save_register_UINT8("m6809", cpu, "INT", &m6809.int_state, 1);
 	state_save_register_UINT8("m6809", cpu, "NMI", &m6809.nmi_state, 1);
 	state_save_register_UINT8("m6809", cpu, "IRQ", &m6809.irq_state[0], 1);
 	state_save_register_UINT8("m6809", cpu, "FIRQ", &m6809.irq_state[1], 1);
-	state_save_register_int("m6809", cpu, "extra_cycles", &m6809.extra_cycles);	/* the cycles of an interrupt taken outside the execute loop */
 }

 void m6809_reset(void *param)
@@ -1160,8 +1160,6 @@ void mb86233_init( void )
 	state_save_register_int( "mb86233", cpu, "gpio1", &mb.gpio[ 1 ] );
 	state_save_register_int( "mb86233", cpu, "gpio2", &mb.gpio[ 2 ] );
 	state_save_register_int( "mb86233", cpu, "gpio3", &mb.gpio[ 3 ] );
-	/* a stalled FIFO access is retried when the CPU runs again */
-	state_save_register_int( "mb86233", cpu, "stall", &mb.stall );
 }

 void mb86233_reset( void *param )
@@ -223,9 +223,6 @@ extern void psxcpu_ram_written(const void *host, UINT32 bytes);
   per machine. */
 extern int psxcpu_jit_available(void);
 extern void psxcpu_set_jit(int enable);
-/* fn is called before the instruction at pc runs (NULL: none); set at */
-/* machine init, cleared at the CPU init */
-extern void psxcpu_set_pc_hook(UINT32 pc, void (*fn)(void));

 #ifdef MAME_DEBUG
 extern unsigned DasmMIPS(char *buff, unsigned _pc);
@@ -348,12 +348,6 @@ static INLINE void psx_write32( offs_t address, data32_t data )
 	cpu_writemem32ledw_dword( address, data );
 }

-/* a driver hook called before the instruction at one address runs (the */
-/* hacks MAME does with a debugger breakpoint or a read tap on the code) */
-#define PC_HOOK_NONE	1	/* never an instruction address */
-static UINT32 pc_hook_pc = PC_HOOK_NONE;
-static void ( *pc_hook_fn )( void );
-
 static void loop_arrive( UINT32 l, UINT32 from );
 static int loop_kind( UINT32 l );
 static int loop_pure_armed;
@@ -545,8 +539,6 @@ void mips_init( void )
 	fastram_count = 0;
 	fastram_last = &fastram[ 0 ];
 	psxcpu_set_jit( 0 );
-	pc_hook_pc = PC_HOOK_NONE;
-	pc_hook_fn = NULL;

 	state_save_register_UINT32( "psxcpu", cpu, "op", &mipscpu.op, 1 );
 	state_save_register_UINT32( "psxcpu", cpu, "pc", &mipscpu.pc, 1 );
@@ -573,16 +565,6 @@ void mips_reset( void *param )
 void mips_exit( void )
 {
 	psxcpu_set_jit( 0 );
-	pc_hook_pc = PC_HOOK_NONE;
-	pc_hook_fn = NULL;
-}
-
-void psxcpu_set_pc_hook( UINT32 pc, void ( *fn )( void ) )
-{
-	pc_hook_pc = fn != NULL && ( pc & 3 ) == 0 ? pc : PC_HOOK_NONE;
-	pc_hook_fn = fn;
-	/* the recompiler leaves that instruction to the interpreter */
-	jit_reset_flush();
 }

 /* one instruction at mipscpu.pc (opcode in mipscpu.op), without the cycle */
@@ -1807,10 +1789,6 @@ int mips_execute( int cycles )
 		}
 		{
 			UINT32 from = mipscpu.pc;
-			if( from == pc_hook_pc )
-			{
-				pc_hook_fn();
-			}
 			mipscpu.op = cpu_readop32( from );
 			mips_step();
 			mips_ICount--;
@@ -1377,11 +1377,6 @@ static void jit_compile( struct jit_block *block, UINT32 pc )
 	{
 		maxcount = JIT_MAX_BLOCK;
 	}
-	/* the hooked instruction runs in the interpreter: the block stops before it */
-	if( pc_hook_pc != PC_HOOK_NONE && pc_hook_pc >= pc && ( pc_hook_pc - pc ) / 4 < maxcount )
-	{
-		maxcount = ( pc_hook_pc - pc ) / 4;
-	}
 	for( i = 0; i < maxcount; i++ )
 	{
 		ops[ i ] = *(const UINT32 *)( host + i * 4 );
@@ -1,75 +0,0 @@
-/***************************************************************************
-
-    Namco C71 (TMS320C25 with Namco internal ROM) - fast DSP core
-
-    Written for Namco System 22 / Super System 22. The instruction
-    semantics follow the TMS320C2x core of current MAME; the memory
-    system is a page table set up by the driver, so the core does not
-    go through the generic memory handlers.
-
-    Word addresses everywhere: program, data and I/O are 16-bit word
-    spaces.
-
-***************************************************************************/
-
-#ifndef C71_H
-#define C71_H
-
-#include "osd_cpu.h"
-#include "cpuintrf.h"
-#include "memory.h"
-
-/* interrupt lines (IFR bits) */
-#define C71_INT0		0
-#define C71_INT1		1
-#define C71_INT2		2
-#define C71_TINT		3
-#define C71_RINT		4
-#define C71_XINT		5
-
-enum
-{
-	C71_PC=1,
-	C71_PFC,  C71_STR0, C71_STR1, C71_IFR,
-	C71_RPTC, C71_ACC,  C71_PREG, C71_TREG,
-	C71_AR0,  C71_AR1,  C71_AR2,  C71_AR3,
-	C71_AR4,  C71_AR5,  C71_AR6,  C71_AR7,
-	C71_STK0, C71_STK1, C71_STK2, C71_STK3,
-	C71_STK4, C71_STK5, C71_STK6, C71_STK7,
-	C71_DRR,  C71_DXR,  C71_TIM,  C71_PRD,
-	C71_IMR,  C71_GREG
-};
-
-/* the generic memory interface is not used: give the CPU empty maps */
-#define NAMCOC71_PGM_OFFSET 0
-
-typedef data16_t (*c71_read_fn)(offs_t offset);
-typedef void (*c71_write_fn)(offs_t offset, data16_t data);
-
-/* driver configuration, by CPU number; call from DRIVER_INIT or MACHINE_INIT */
-void c71_set_internal_rom(int cpunum, const data16_t *rom);		/* 0x1000 words, native order (a CPU region) */
-void c71_map_data(int cpunum, offs_t start, offs_t end, data16_t *base, int writable);
-void c71_map_program(int cpunum, offs_t start, offs_t end, data16_t *base, int writable);
-void c71_set_data_handlers(int cpunum, c71_read_fn rd, c71_write_fn wr);	/* everything not mapped */
-void c71_set_io(int cpunum, int port, c71_read_fn rd, c71_write_fn wr);
-void c71_set_bio(int cpunum, int (*bio)(void));
-void c71_set_serial(int cpunum, data16_t (*dr_in)(void), void (*dx_out)(data16_t));
-/* the DSP spins in [pc_start, pc_end] waiting for BIO or an interrupt: burn the timeslice there */
-void c71_set_idle_loop(int cpunum, int slot, UINT16 pc_start, UINT16 pc_end);
-
-extern int c71_icount;
-
-void c71_init(void);
-void c71_reset(void *param);
-void c71_exit(void);
-int c71_execute(int cycles);
-unsigned c71_get_context(void *dst);
-void c71_set_context(void *src);
-unsigned c71_get_reg(int regnum);
-void c71_set_reg(int regnum, unsigned val);
-void c71_set_irq_line(int irqline, int state);
-void c71_set_irq_callback(int (*callback)(int irqline));
-const char *c71_info(void *context, int regnum);
-unsigned c71_dasm(char *buffer, unsigned pc);
-
-#endif
@@ -1,53 +0,0 @@
-/*****************************************************************************
-
-    NEC V25 (and V25+) CPU, see v25.c
-
-    license:BSD-3-Clause
-    copyright-holders:Bryan McPhail, Alex W. Jackson
-
-*****************************************************************************/
-
-#ifndef V25_H
-#define V25_H
-
-#include "memory.h"
-#include "osd_cpu.h"
-
-/* input lines, besides 0 (INT) and IRQ_LINE_NMI */
-#define V25_INPUT_LINE_INTP0	10
-#define V25_INPUT_LINE_INTP1	11
-#define V25_INPUT_LINE_INTP2	12
-#define V25_INPUT_LINE_POLL		20
-
-enum
-{
-	V25_PC=1, V25_IP, V25_AW, V25_CW, V25_DW, V25_BW, V25_SP, V25_BP, V25_IX, V25_IY,
-	V25_DS1, V25_PS, V25_SS, V25_DS0, V25_PSW, V25_IDB, V25_PENDING
-};
-
-extern int v25_ICount;
-
-extern void v25_init(void);
-extern void v25_reset(void *param);
-extern void v25_exit(void);
-extern int v25_execute(int cycles);
-extern unsigned v25_get_context(void *dst);
-extern void v25_set_context(void *src);
-extern unsigned v25_get_reg(int regnum);
-extern void v25_set_reg(int regnum, unsigned val);
-extern void v25_set_irq_line(int irqline, int state);
-extern void v25_set_irq_callback(int (*callback)(int irqline));
-extern const char *v25_info(void *context, int regnum);
-extern unsigned v25_dasm(char *buffer, unsigned pc);
-
-/* Configuration, from DRIVER_INIT (before the CPU is reset).
-   The opcodes are decrypted with the table when the CPU is in secure
-   mode (the default when there is a table). */
-extern void v25_set_decryption_table(int cpunum, const UINT8 *table);
-
-/* the port pins: PT (input only), P0, P1 (upper 4 bits), P2 */
-extern void v25_set_port_handlers(int cpunum,
-	read8_handler pt_in, read8_handler p0_in, read8_handler p1_in, read8_handler p2_in,
-	write8_handler p0_out, write8_handler p1_out, write8_handler p2_out);
-
-#endif
@@ -704,9 +704,11 @@ void pic16C5x_init(void)
 	state_save_register_UINT8("pic16C5x", cpu, "TRISA", &R.TRISA, 1);
 	state_save_register_UINT8("pic16C5x", cpu, "TRISB", &R.TRISB, 1);
 	state_save_register_UINT8("pic16C5x", cpu, "TRISC", &R.TRISC, 1);
+	state_save_register_UINT8("pic16C5x", cpu, "PORTA", &R.PORTA, 1);
+	state_save_register_UINT8("pic16C5x", cpu, "PORTB", &R.PORTB, 1);
+	state_save_register_UINT8("pic16C5x", cpu, "PORTC", &R.PORTC, 1);
 	state_save_register_UINT8("pic16C5x", cpu, "Old_T0", &old_T0, 1);
-	/* STATUS and the ports are in the data RAM (picRAM), saved with the memory
-	   of the CPU: R.picRAM is not set yet here */
+	state_save_register_UINT8("pic16C5x", cpu, "STR", &R.STATUS, 1);
 	state_save_register_UINT8("pic16C5x", cpu, "RAM_mask", &picRAMmask, 1);
 	state_save_register_UINT16("pic16C5x", cpu, "WDT", &R.WDT, 1);
 	state_save_register_UINT16("pic16C5x", cpu, "Prescaler", &R.prescaler, 1);
@@ -856,7 +858,7 @@ int pic16C5x_execute(int cycles)
 			CALL_MAME_DEBUG;

 			R.opcode.d = M_RDOP(R.PC);
-			R.PC = (R.PC + 1) & ADDR_MASK;	/* wraps to 0 after the reset vector 0x7ff of the 2K parts */
+			R.PC++;
 			R.PCL++;

 			if ((R.opcode.w.l & 0xff0) != 0x000)	{	/* Do all opcodes except the 00? ones */
@@ -147,23 +147,10 @@ typedef struct
 	int     is_slave, cpu_number;
 	data16_t (*opcode_read)(offs_t pc);
 	data32_t (*dma_read_hook)(UINT32 src, UINT32 dst, data32_t data, int size);
-
-	UINT8	**jit_rpage;	/* sh2jit.c: this CPU's page tables for direct reads and writes */
-	UINT8	**jit_wpage;
 } SH2;

 int sh2_icount;
-
-/*
-	The state of the active SH-2 is its own context buffer: switching
-	CPUs (every timeslice, many thousand times a frame on the ST-V with
-	its tight interleave) only moves this pointer instead of copying
-	the whole state out and in. Each CPU's saved state items point into
-	its buffer too, so a state save reads it whether it is active or not.
-*/
-static SH2 sh2_boot;			/* before a CPU's buffer is known */
-static SH2 *sh2p = &sh2_boot;
-#define sh2 (*sh2p)
+static SH2 sh2;

 /* Atrocious hack that makes the soldivid music correct*/

@@ -192,16 +179,6 @@ static void sh2_timer_callback(int data);
 #define Rn	((opcode>>8)&15)
 #define Rm	((opcode>>4)&15)

-
-#ifdef SH2JIT_VERIFY
-extern int sh2_jit_verify_logging;
-void sh2_jit_verify_store(UINT32 address, int size);
-#define SH2JIT_STORE(A, size)	do { if (sh2_jit_verify_logging) sh2_jit_verify_store(A, size); if (sh2_jit_code_present) sh2_jit_ram_written((A) & AM, size); } while (0)
-#else
-/* a store over translated code flushes the recompiler's cache */
-#define SH2JIT_STORE(A, size)	do { if (sh2_jit_code_present) sh2_jit_ram_written((A) & AM, size); } while (0)
-#endif
-
 static INLINE data8_t RB(offs_t A)
 {
 	if (A >= 0xe0000000)
@@ -256,7 +233,6 @@ static INLINE void WB(offs_t A, data8_t V)
 	if (A >= 0xc0000000)
 	{
 		cpu_writemem32bedw(A,V);
-		SH2JIT_STORE(A, 1);
 		return;
 	}

@@ -264,7 +240,6 @@ static INLINE void WB(offs_t A, data8_t V)
 		return;

 	cpu_writemem32bedw(A & AM,V);
-	SH2JIT_STORE(A, 1);
 }

 static INLINE void WW(offs_t A, data16_t V)
@@ -278,7 +253,6 @@ static INLINE void WW(offs_t A, data16_t V)
 	if (A >= 0xc0000000)
 	{
 		cpu_writemem32bedw_word(A,V);
-		SH2JIT_STORE(A, 2);
 		return;
 	}

@@ -286,7 +260,6 @@ static INLINE void WW(offs_t A, data16_t V)
 		return;

 	cpu_writemem32bedw_word(A & AM,V);
-	SH2JIT_STORE(A, 2);
 }

 static INLINE void WL(offs_t A, data32_t V)
@@ -300,7 +273,6 @@ static INLINE void WL(offs_t A, data32_t V)
 	if (A >= 0xc0000000)
 	{
 		cpu_writemem32bedw_dword(A,V);
-		SH2JIT_STORE(A, 4);
 		return;
 	}

@@ -308,7 +280,6 @@ static INLINE void WL(offs_t A, data32_t V)
 		return;

 	cpu_writemem32bedw_dword(A & AM,V);
-	SH2JIT_STORE(A, 4);
 }

 static INLINE void sh2_exception(const char *message, int irqline)
@@ -2320,61 +2291,6 @@ static INLINE void op1111(UINT16 opcode)
 	NOP();
 }

-/* one instruction (in the interpreter's loop and for the recompiler's checks) */
-static INLINE void sh2_dispatch(UINT16 opcode)
-{
-	switch ((opcode >> 12) & 15)
-	{
-	case  0: op0000(opcode); break;
-	case  1: op0001(opcode); break;
-	case  2: op0010(opcode); break;
-	case  3: op0011(opcode); break;
-	case  4: op0100(opcode); break;
-	case  5: op0101(opcode); break;
-	case  6: op0110(opcode); break;
-	case  7: op0111(opcode); break;
-	case  8: op1000(opcode); break;
-	case  9: op1001(opcode); break;
-	case 10: op1010(opcode); break;
-	case 11: op1011(opcode); break;
-	case 12: op1100(opcode); break;
-	case 13: op1101(opcode); break;
-	case 14: op1110(opcode); break;
-	default: op1111(opcode); break;
-	}
-}
-
-static INLINE void sh2_step(void)
-{
-	UINT32 opcode;
-
-	if (sh2.delay)
-	{
-		opcode = sh2.opcode_read ? sh2.opcode_read(sh2.delay) : RW(sh2.delay & AM);
-		change_pc32bedw(sh2.pc & AM);
-		sh2.pc -= 2;
-	}
-	else
-		opcode = sh2.opcode_read ? sh2.opcode_read(sh2.pc) : RW(sh2.pc & AM);
-
-	CALL_MAME_DEBUG;
-
-	sh2.delay = 0;
-	sh2.pc += 2;
-	sh2.ppc = sh2.pc;
-
-	sh2_dispatch(opcode);
-
-	if(sh2.test_irq && !sh2.delay)
-	{
-		CHECK_PENDING_IRQ("mame_sh2_execute");
-		sh2.test_irq = 0;
-	}
-	sh2_icount--;
-}
-
-#include "sh2jit.c"
-
 /*****************************************************************************
 *	MAME CPU INTERFACE
 *****************************************************************************/
@@ -2408,10 +2324,6 @@ void sh2_reset(void *param)

 	sh2.cpu_number = cpu_getactivecpu();

-	/* code and memory handlers may differ after a reset */
-	if (jit_enabled)
-		jit_flush();
-
 	sh2.pc = RL(0);
 	sh2.r[15] = RL(4);
 	sh2.sr = I;
@@ -2423,15 +2335,11 @@ void sh2_reset(void *param)
 /* Shut down CPU core */
 void sh2_exit(void)
 {
-	sh2_jit_set(0);
 	if (sh2.m)
 		free(sh2.m);
 	sh2.m = NULL;
-	/* the core frees the buffers after this */
-	sh2p = &sh2_boot;
 }

-
 /* Execute cycles - returns number of cycles actually run */
 int sh2_execute(int cycles)
 {
@@ -2442,10 +2350,49 @@ int sh2_execute(int cycles)

 	do
 	{
-		/* a block, when there is one for the PC (no slot or interrupt test pending) */
-		if (jit_enabled && !sh2.delay && !sh2.test_irq && sh2_jit_run())
-			continue;
-		sh2_step();
+		UINT32 opcode;
+
+		if (sh2.delay)
+		{
+			opcode = sh2.opcode_read ? sh2.opcode_read(sh2.delay) : RW(sh2.delay & AM);
+			change_pc32bedw(sh2.pc & AM);
+			sh2.pc -= 2;
+		}
+		else
+			opcode = sh2.opcode_read ? sh2.opcode_read(sh2.pc) : RW(sh2.pc & AM);
+
+		CALL_MAME_DEBUG;
+
+		sh2.delay = 0;
+		sh2.pc += 2;
+		sh2.ppc = sh2.pc;
+
+		switch ((opcode >> 12) & 15)
+		{
+		case  0: op0000(opcode); break;
+		case  1: op0001(opcode); break;
+		case  2: op0010(opcode); break;
+		case  3: op0011(opcode); break;
+		case  4: op0100(opcode); break;
+		case  5: op0101(opcode); break;
+		case  6: op0110(opcode); break;
+		case  7: op0111(opcode); break;
+		case  8: op1000(opcode); break;
+		case  9: op1001(opcode); break;
+		case 10: op1010(opcode); break;
+		case 11: op1011(opcode); break;
+		case 12: op1100(opcode); break;
+		case 13: op1101(opcode); break;
+		case 14: op1110(opcode); break;
+		default: op1111(opcode); break;
+		}
+
+		if(sh2.test_irq && !sh2.delay)
+		{
+			CHECK_PENDING_IRQ("mame_sh2_execute");
+			sh2.test_irq = 0;
+		}
+		sh2_icount--;
 	} while( sh2_icount > 0 );

 	return cycles - sh2_icount;
@@ -2454,17 +2401,16 @@ int sh2_execute(int cycles)
 /* Get registers, return context size */
 unsigned sh2_get_context(void *dst)
 {
-	if( dst && dst != (void *)sh2p )
-		memcpy(dst, sh2p, sizeof(SH2));
+	if( dst )
+		memcpy(dst, &sh2, sizeof(SH2));
 	return sizeof(SH2);
 }

 /* Set registers */
 void sh2_set_context(void *src)
 {
-	/* the core passes a CPU's own buffer: it becomes the live state */
 	if( src )
-		sh2p = (SH2 *)src;
+		memcpy(&sh2, src, sizeof(SH2));
 }

 static void sh2_timer_resync(void)
@@ -2651,7 +2597,6 @@ static void sh2_dmac_check(int dma)
 					if(incd == 2)
 						dst --;
 					cpu_writemem32bedw(dst, DMA_READ(src, dst, cpu_readmem32bedw(src), 0));
-					SH2JIT_STORE(dst, 1);
 					if(incs == 1)
 						src ++;
 					if(incd == 1)
@@ -2668,7 +2613,6 @@ static void sh2_dmac_check(int dma)
 					if(incd == 2)
 						dst -= 2;
 					cpu_writemem32bedw_word(dst, DMA_READ(src, dst, cpu_readmem32bedw_word(src), 1));
-					SH2JIT_STORE(dst, 2);
 					if(incs == 1)
 						src += 2;
 					if(incd == 1)
@@ -2685,7 +2629,6 @@ static void sh2_dmac_check(int dma)
 					if(incd == 2)
 						dst -= 4;
 					cpu_writemem32bedw_dword(dst, DMA_READ(src, dst, cpu_readmem32bedw_dword(src), 2));
-					SH2JIT_STORE(dst, 4);
 					if(incs == 1)
 						src += 4;
 					if(incd == 1)
@@ -2704,7 +2647,6 @@ static void sh2_dmac_check(int dma)
 					cpu_writemem32bedw_dword(dst+4, DMA_READ(src+4, dst+4, cpu_readmem32bedw_dword(src+4), 2));
 					cpu_writemem32bedw_dword(dst+8, DMA_READ(src+8, dst+8, cpu_readmem32bedw_dword(src+8), 2));
 					cpu_writemem32bedw_dword(dst+12, DMA_READ(src+12, dst+12, cpu_readmem32bedw_dword(src+12), 2));
-					SH2JIT_STORE(dst, 16);
 					src += 16;
 					if(incd == 1)
 						dst += 16;
@@ -2724,46 +2666,6 @@ static void sh2_dmac_check(int dma)
 	}
 }

-/* the division unit, as in current MAME (sh7604.cpp) */
-static void sh2_divu_start(INT64 dividend)
-{
-	INT32 divisor = (INT32)sh2.m[0x40];
-	INT64 remainder;
-	UINT32 quotient;
-	int i, negative;
-
-	sh2.m[0x41] = (UINT32)dividend;
-
-	if (divisor && (dividend != (INT64)((UINT64)1 << 63) || divisor != -1))
-	{
-		INT64 q = dividend / divisor;
-		if (q == (INT32)q)
-		{
-			sh2.m[0x45] = (UINT32)q;
-			sh2.m[0x44] = (UINT32)(dividend % divisor);
-			return;
-		}
-	}
-
-	/* overflow (zero divisor or a quotient outside 32 bits): the unit stops after three
-	   steps, leaving the partial remainder in DVDNTH; with OVFIE clear DVDNTL saturates */
-	remainder = dividend >> 32;
-	quotient = (UINT32)dividend;
-	for (i = 0; i < 3; i++)
-	{
-		int subtract = (remainder < 0) == (divisor < 0);
-		remainder = (remainder << 1) | ((quotient >> 31) & 1);
-		quotient <<= 1;
-		remainder += subtract ? -(INT64)divisor : (INT64)divisor;
-		quotient |= ((remainder < 0) == (divisor < 0)) ? 1 : 0;
-	}
-	negative = (dividend < 0) != (divisor < 0);
-	sh2.m[0x44] = (UINT32)remainder;
-	sh2.m[0x45] = (sh2.m[0x42] & 2) ? quotient : negative ? 0x80000000 : 0x7fffffff;
-	sh2.m[0x42] |= 1;
-	sh2_recalc_irq();
-}
-
 WRITE32_HANDLER( sh2_internal_w )
 {
 	UINT32 old = sh2.m[offset];
@@ -2826,19 +2728,64 @@ WRITE32_HANDLER( sh2_internal_w )
 		/* Division box*/
 	case 0x40: /* DVSR*/
 		break;
-	case 0x41: /* DVDNT: a 32-bit division, the dividend sign-extended into DVDNTH */
-		sh2_divu_start((INT32)sh2.m[0x41]);
-		break;
-	case 0x42: /* DVCR: OVF (bit 0) and OVFIE (bit 1) are plain read/write bits */
+	case 0x41: /* DVDNT*/
+		{
+			INT32 a = sh2.m[0x41];
+			INT32 b = sh2.m[0x40];
+			log_cb(RETRO_LOG_DEBUG, LOGPRE "SH2 #%d div+mod %d/%d\n", cpu_getactivecpu(), a, b);
+			if (b)
+			{
+				sh2.m[0x45] = a / b;
+				sh2.m[0x44] = a % b;
+			}
+			else
+			{
+				sh2.m[0x42] |= 0x00010000;
+				sh2.m[0x45] = 0x7fffffff;
+				sh2.m[0x44] = 0x7fffffff;
+				sh2_recalc_irq();
+			}
+			break;
+		}
+	case 0x42: /* DVCR*/
+		sh2.m[0x42] = (sh2.m[0x42] & ~0x00001000) | (old & sh2.m[0x42] & 0x00010000);
+		sh2_recalc_irq();
 		break;
 	case 0x43: /* VCRDIV*/
 		sh2_recalc_irq();
 		break;
 	case 0x44: /* DVDNTH*/
 		break;
-	case 0x45: /* DVDNTL: a 64-bit division of DVDNTH:DVDNTL */
-		sh2_divu_start((INT64)(((UINT64)sh2.m[0x44] << 32) | sh2.m[0x45]));
-		break;
+	case 0x45: /* DVDNTL*/
+		{
+			INT64 a = sh2.m[0x45] | ((UINT64)(sh2.m[0x44]) << 32);
+			INT64 b = sh2.m[0x40];
+			log_cb(RETRO_LOG_DEBUG, LOGPRE "SH2 #%d div+mod %08x%08x/%08x\n", cpu_getactivecpu(), sh2.m[0x44], sh2.m[0x45], sh2.m[0x40]);
+			if (b)
+			{
+				INT64 q = a / b;
+				if (q != (INT32)q)
+				{
+					sh2.m[0x42] |= 0x00010000;
+					sh2.m[0x45] = 0x7fffffff;
+					sh2.m[0x44] = 0x7fffffff;
+					sh2_recalc_irq();
+				}
+				else
+				{
+					sh2.m[0x45] = q;
+					sh2.m[0x44] = a % b;
+				}
+			}
+			else
+			{
+				sh2.m[0x42] |= 0x00010000;
+				sh2.m[0x45] = 0x7fffffff;
+				sh2.m[0x44] = 0x7fffffff;
+				sh2_recalc_irq();
+			}
+			break;
+		}

 		/* DMA controller*/
 	case 0x60: /* SAR0*/
@@ -2893,11 +2840,7 @@ READ32_HANDLER( sh2_internal_r )
 	switch( offset )
 	{
 	case 0x04: /* TIER, FTCSR, FRC*/
-		/* only a read of FRC brings it up to date, as in current MAME (frc_r):
-		   reading TIER or FTCSR does not (a slave CPU waiting for its input
-		   capture flag reads FTCSR tens of thousands of times a frame) */
-		if ((mem_mask & 0xffff) != 0xffff)
-			sh2_timer_resync();
+		sh2_timer_resync();
 		return (sh2.m[4] & 0xffff0000) | sh2.frc;
 	case 0x05: /* OCRx, TCR, TOCR*/
 		if(sh2.m[5] & 0x10)
@@ -3153,12 +3096,6 @@ void sh2_init(void)
 {
 	int cpu = cpu_getactivecpu();

-	/* this CPU's buffer from now on (the core allocated it before the init) */
-	sh2p = (SH2 *)cpunum_get_context_buffer(cpu);
-	if (!sh2p)
-		sh2p = &sh2_boot;
-	memset(sh2p, 0, sizeof(SH2));
-
 	sh2.timer = timer_alloc(sh2_timer_callback);
 	timer_adjust(sh2.timer, TIME_NEVER, 0, 0);

@@ -3199,29 +3136,5 @@ void sh2_init(void)
 	state_save_register_UINT32("sh2", cpu, "R13", &sh2.r[13], 1);
 	state_save_register_UINT32("sh2", cpu, "R14", &sh2.r[14], 1);
 	state_save_register_UINT32("sh2", cpu, "EA", &sh2.ea, 1);
-	/* the rest of the CPU: the delay slot, the divider, the interrupts and
-	   the on-chip modules (their registers, the free running timer, the DMA) */
-	state_save_register_UINT32("sh2", cpu, "PPC", &sh2.ppc, 1);
-	state_save_register_UINT32("sh2", cpu, "delay", &sh2.delay, 1);
-	state_save_register_UINT32("sh2", cpu, "cpu_off", &sh2.cpu_off, 1);
-	state_save_register_UINT32("sh2", cpu, "dvsr", &sh2.dvsr, 1);
-	state_save_register_UINT32("sh2", cpu, "dvdnth", &sh2.dvdnth, 1);
-	state_save_register_UINT32("sh2", cpu, "dvdntl", &sh2.dvdntl, 1);
-	state_save_register_UINT32("sh2", cpu, "dvcr", &sh2.dvcr, 1);
-	state_save_register_UINT32("sh2", cpu, "pending_irq", &sh2.pending_irq, 1);
-	state_save_register_UINT32("sh2", cpu, "test_irq", &sh2.test_irq, 1);
-	state_save_register_INT32("sh2", cpu, "irq_queue", (INT32 *)sh2.irq_queue, 16 * 2);
-	state_save_register_INT8("sh2", cpu, "irq_line_state", sh2.irq_line_state, 16);
-	state_save_register_INT8("sh2", cpu, "nmi_line_state", &sh2.nmi_line_state, 1);
-	state_save_register_UINT32("sh2", cpu, "m", sh2.m, 0x200 / 4);
-	state_save_register_UINT16("sh2", cpu, "frc", &sh2.frc, 1);
-	state_save_register_UINT16("sh2", cpu, "ocra", &sh2.ocra, 1);
-	state_save_register_UINT16("sh2", cpu, "ocrb", &sh2.ocrb, 1);
-	state_save_register_UINT16("sh2", cpu, "icr", &sh2.icr, 1);
-	state_save_register_UINT32("sh2", cpu, "frc_base", &sh2.frc_base, 1);
-	state_save_register_int("sh2", cpu, "frt_input", &sh2.frt_input);
-	state_save_register_int("sh2", cpu, "internal_irq_level", &sh2.internal_irq_level);
-	state_save_register_int("sh2", cpu, "internal_irq_vector", &sh2.internal_irq_vector);
-	state_save_register_INT32("sh2", cpu, "dma_timer_active", (INT32 *)sh2.dma_timer_active, 2);
 	return;
 }
@@ -69,17 +69,6 @@ struct sh2_config
  data32_t (*dma_read_hook)(UINT32 src, UINT32 dst, data32_t data, int size);
 };

-/* optional recompiler (sh2jit.c): a driver declares the RAM the CPUs run
-   from and read directly ('base': host memory of 'start', as the memory
-   system keeps it), then enables it; anything else stays with the
-   interpreter. Writes the driver makes there by other means than the
-   CPUs (DMA) must be reported with sh2_jit_ram_written. */
-int sh2_jit_available(void);
-void sh2_jit_add_fastram(offs_t start, offs_t end, int readonly, void *base);
-void sh2_jit_set(int enable);
-void sh2_jit_ram_written(UINT32 address, UINT32 bytes);
-extern int sh2_jit_code_present;
-
 extern void sh2_init(void);
 extern void sh2_reset (void *param);		  /* Reset registers to the initial values */
 extern void sh2_exit  (void);				  /* Shut down CPU core */
@@ -1,87 +0,0 @@
-/*****************************************************************************
-
-	sh3.h
-
-	Hitachi SH-3 (SH7709S) CPU core, from current MAME (sh.cpp, sh4.cpp,
-	sh3comn.cpp, sh4comn.cpp, sh4tmu.cpp, sh7709s.cpp: R. Belmont,
-	David Haywood, Jesus Ramos and the other authors of those files).
-
-	Big endian, 32-bit data bus (32bedw). No FPU and no MMU (current MAME
-	doesn't emulate the SH-3 MMU either). The internal registers of the
-	SH7709S are emulated in the core; the I/O ports call the driver.
-
-*****************************************************************************/
-
-#ifndef _SH3_H
-#define _SH3_H
-
-#include "cpuintrf.h"
-#include "osd_cpu.h"
-
-/* the external interrupt lines IRL0-IRL3 (current MAME: SH4_IRL0-SH4_IRL3) */
-#define SH3_IRL0		0
-#define SH3_IRL1		1
-#define SH3_IRL2		2
-#define SH3_IRL3		3
-
-/* the I/O ports, for the port callbacks */
-enum
-{
-	SH3_PORT_A = 0, SH3_PORT_B, SH3_PORT_C, SH3_PORT_D, SH3_PORT_E, SH3_PORT_F,
-	SH3_PORT_G, SH3_PORT_H, SH3_PORT_J, SH3_PORT_K, SH3_PORT_L, SH3_PORT_COUNT
-};
-
-enum
-{
-	SH3_PC=1, SH3_SR, SH3_PR, SH3_GBR, SH3_VBR, SH3_MACH, SH3_MACL,
-	SH3_R0, SH3_R1, SH3_R2, SH3_R3, SH3_R4, SH3_R5, SH3_R6, SH3_R7,
-	SH3_R8, SH3_R9, SH3_R10, SH3_R11, SH3_R12, SH3_R13, SH3_R14, SH3_R15,
-	SH3_SSR, SH3_SPC, SH3_EA
-};
-
-struct sh3_config
-{
-	/* the SH7709S cache and bus timing of current MAME (sh7709s.cpp, made
-	   for the CV1000): data accesses and cache misses cost cycles */
-	int cache_timing;
-	/* the clock of the peripheral modules (TMU), Hz */
-	int pm_clock;
-	/* the I/O ports (SH3_PORT_x); NULL reads 0 */
-	data8_t (*port_r)(int port);
-	void (*port_w)(int port, data8_t data);
-};
-
-extern int sh3_ICount;
-
-/* the fast memory: plain RAM or ROM at base (an array of data32_t, as the
-   memory system keeps a 32-bit big-endian space), read, written and fetched
-   without the memory handlers; physical addresses (29 bits). Set from
-   DRIVER_INIT, emptied at the CPU init */
-#define SH3_FASTRAM_MAX		4
-void sh3_set_fastram(UINT32 start, UINT32 end, int readonly, data32_t *base);
-
-/* the cache and bus timing of an access done by a memory handler (current
-   MAME: sh7709s_device::update_access_cycles) */
-void sh3_update_access_cycles(UINT32 address, int write);
-
-/* the recompiler (sh3jit.c): available on this host, and on/off (off by default) */
-int sh3_jit_available(void);
-void sh3_set_jit(int enable);
-
-/* the total number of cycles run */
-UINT32 sh3_total_cycles_lo(void);
-
-void sh3_init(void);
-void sh3_reset(void *param);
-void sh3_exit(void);
-int sh3_execute(int cycles);
-unsigned sh3_get_context(void *dst);
-void sh3_set_context(void *src);
-unsigned sh3_get_reg(int regnum);
-void sh3_set_reg(int regnum, unsigned val);
-void sh3_set_irq_line(int irqline, int state);
-void sh3_set_irq_callback(int (*callback)(int irqline));
-const char *sh3_info(void *context, int regnum);
-unsigned sh3_dasm(char *buffer, unsigned pc);
-
-#endif
@@ -1188,8 +1188,7 @@ int sharc_execute(int cycles)
 			}
 		}

-		/* port: no call when channels 6 and 7 are idle (most instructions) */
-		if (!m_core->write_stalled && (m_core->dma_status & ((1 << 6) | (1 << 7))))
+		if (!m_core->write_stalled)
 		{
 			dma_stalled = dma_run_cycle(6);
 			dma_stalled |= dma_run_cycle(7);
@@ -3487,7 +3487,6 @@ if( _BC > 1 && _PCD < 0xfffc ) {									\
 		if( op3==0x20 && op4==0xfb )								\
 		{															\
 			int cnt =												\
-				cc[Z80_TABLE_op][0x0b] +							\
 				cc[Z80_TABLE_op][0x78] +							\
 				cc[Z80_TABLE_op][0xb1] +							\
 				cc[Z80_TABLE_op][0x20] +							\
@@ -3506,7 +3505,6 @@ if( _BC > 1 && _PCD < 0xfffc ) {									\
 			if( (ad1 + 256 * ad2) == (_PCD - 1) )					\
 			{														\
 				int cnt =											\
-					cc[Z80_TABLE_op][0x0b] +						\
 					cc[Z80_TABLE_op][0x78] +						\
 					cc[Z80_TABLE_op][0xb1] +						\
 					cc[Z80_TABLE_op][0xc2] +						\
@@ -3532,7 +3530,6 @@ if( _DE > 1 && _PCD < 0xfffc ) {									\
 		if( op3==0x20 && op4==0xfb )								\
 		{															\
 			int cnt =												\
-				cc[Z80_TABLE_op][0x1b] +							\
 				cc[Z80_TABLE_op][0x7a] +							\
 				cc[Z80_TABLE_op][0xb3] +							\
 				cc[Z80_TABLE_op][0x20] +							\
@@ -3551,7 +3548,6 @@ if( _DE > 1 && _PCD < 0xfffc ) {									\
 			if( (ad1 + 256 * ad2) == (_PCD - 1) )					\
 			{														\
 				int cnt =											\
-					cc[Z80_TABLE_op][0x1b] +						\
 					cc[Z80_TABLE_op][0x7a] +						\
 					cc[Z80_TABLE_op][0xb3] +						\
 					cc[Z80_TABLE_op][0xc2] +						\
@@ -3577,7 +3573,6 @@ if( _HL > 1 && _PCD < 0xfffc ) {									\
 		if( op3==0x20 && op4==0xfb )								\
 		{															\
 			int cnt =												\
-				cc[Z80_TABLE_op][0x2b] +							\
 				cc[Z80_TABLE_op][0x7c] +							\
 				cc[Z80_TABLE_op][0xb5] +							\
 				cc[Z80_TABLE_op][0x20] +							\
@@ -3596,7 +3591,6 @@ if( _HL > 1 && _PCD < 0xfffc ) {									\
 			if( (ad1 + 256 * ad2) == (_PCD - 1) )					\
 			{														\
 				int cnt =											\
-					cc[Z80_TABLE_op][0x2b] +						\
 					cc[Z80_TABLE_op][0x7c] +						\
 					cc[Z80_TABLE_op][0xb5] +						\
 					cc[Z80_TABLE_op][0xc2] +						\
@@ -4123,8 +4117,6 @@ void z80_init(void)
 	state_save_register_UINT8("z80", cpu, "int_state", Z80.int_state, 4);
 	state_save_register_UINT8("z80", cpu, "nmi_state", &Z80.nmi_state, 1);
 	state_save_register_UINT8("z80", cpu, "irq_state", &Z80.irq_state, 1);
-	/* the cycles of an interrupt taken outside of z80_execute, counted at the next one */
-	state_save_register_INT32("z80", cpu, "extra_cycles", (INT32 *)&Z80.extra_cycles, 1);
 	/* daisy chain needs to be saved by z80ctc.c somehow */
 }

@@ -142,8 +142,7 @@ struct cpuinfo

 	UINT64 	totalcycles;			/* total CPU cycles executed */
 	double	localtime;				/* local time, relative to the timer system's global time */
-	double	clockscale;				/* current active clock scale factor, set by drivers and CPU cores */
-	double	overclock;				/* user overclock factor (core options), applied on top of clockscale */
+	double	clockscale;				/* current active clock scale factor */

 	int 	vblankint_countdown;	/* number of vblank callbacks left until we interrupt */
 	int 	vblankint_multiplier;	/* number of vblank callbacks per interrupt */
@@ -181,40 +180,10 @@ static INT32 saved_suspend[MAX_CPU];
 static double saved_localtime[MAX_CPU];
 static UINT32 saved_cycles[MAX_CPU * 2];

-/* With the timer system in the save state (timer_state_loaded()), the
-   rest of the scheduling is loaded exactly too: all the suspend reasons
-   and the triggers they wait for, the interrupts left in the frame, the
-   VBLANK countdowns and the frame number. The timers they depend on (spin,
-   trigger time, VBLANK) are then the ones of the save. */
-#define EXACT_PER_CPU	7
-static INT32 saved_exact[MAX_CPU * EXACT_PER_CPU];
-static INT32 saved_exact_globals[3];
-/* the triggers of cpu_spinuntil_time() and cpu_yielduntil_time(): numbered in
-   turn, the number is in the state (the CPU waits on it, a timer pulls it) */
-static INT32 spin_timetrig, yield_timetrig;
-static int vblank;
-static int current_frame;
-static int vblank_countdown;
-
 static void cpu_suspend_presave(void)
 {
 	int cpunum;

-	for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
-	{
-		INT32 *e = &saved_exact[cpunum * EXACT_PER_CPU];
-		e[0] = cpu[cpunum].suspend;
-		e[1] = cpu[cpunum].nextsuspend;
-		e[2] = cpu[cpunum].eatcycles;
-		e[3] = cpu[cpunum].nexteatcycles;
-		e[4] = cpu[cpunum].trigger;
-		e[5] = cpu[cpunum].iloops;
-		e[6] = cpu[cpunum].vblankint_countdown;
-	}
-	saved_exact_globals[0] = vblank;
-	saved_exact_globals[1] = current_frame;
-	saved_exact_globals[2] = vblank_countdown;
-
 	for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
 	{
 		saved_suspend[cpunum] = cpu[cpunum].nextsuspend & SUSPEND_LASTING_REASONS;
@@ -235,31 +204,14 @@ static void cpu_suspend_postload(void)
 			cpu[cpunum].eatcycles = cpu[cpunum].nexteatcycles = 1;
 		cpu[cpunum].localtime = saved_localtime[cpunum];
 		cpu[cpunum].totalcycles = ((UINT64)saved_cycles[cpunum * 2 + 1] << 32) | saved_cycles[cpunum * 2];
-
-		if (timer_state_loaded())
-		{
-			INT32 *e = &saved_exact[cpunum * EXACT_PER_CPU];
-			cpu[cpunum].suspend = e[0];
-			cpu[cpunum].nextsuspend = e[1];
-			cpu[cpunum].eatcycles = e[2];
-			cpu[cpunum].nexteatcycles = e[3];
-			cpu[cpunum].trigger = e[4];
-			cpu[cpunum].iloops = e[5];
-			cpu[cpunum].vblankint_countdown = e[6];
-		}
-	}
-
-	if (timer_state_loaded())
-	{
-		vblank = saved_exact_globals[0];
-		current_frame = saved_exact_globals[1];
-		vblank_countdown = saved_exact_globals[2];
 	}
 }

 static int time_to_reset;
 static int time_to_quit;

+static int vblank;
+static int current_frame;
 static INT32 watchdog_counter;

 static int cycles_running;
@@ -274,6 +226,7 @@ static int cycles_stolen;
 *************************************/

 static void *vblank_timer;
+static int vblank_countdown;
 static int vblank_multiplier;
 static double vblank_period;

@@ -344,10 +297,9 @@ int cpu_init(void)
 		memset(&cpu[cpunum], 0, sizeof(cpu[cpunum]));
 		cpu[cpunum].suspend = SUSPEND_REASON_RESET;
 		cpu[cpunum].clockscale = cputype_get_interface(cputype)->overclock;
-		cpu[cpunum].overclock = 1.0;

 		/* compute the cycle times */
-		sec_to_cycles[cpunum] = cpu[cpunum].clockscale * cpu[cpunum].overclock * Machine->drv->cpu[cpunum].cpu_clock;
+		sec_to_cycles[cpunum] = cpu[cpunum].clockscale * Machine->drv->cpu[cpunum].cpu_clock;
 		cycles_to_sec[cpunum] = 1.0 / sec_to_cycles[cpunum];

 		/* initialize this CPU */
@@ -364,11 +316,6 @@ int cpu_init(void)
 	state_save_register_INT32("cpu", 0, "suspend", saved_suspend, cpu_gettotalcpu());
 	state_save_register_double("cpu", 0, "localtime", saved_localtime, cpu_gettotalcpu());
 	state_save_register_UINT32("cpu", 0, "totalcycles", saved_cycles, cpu_gettotalcpu() * 2);
-	state_save_register_INT32("cpu", 0, "exact", saved_exact, cpu_gettotalcpu() * EXACT_PER_CPU);
-	state_save_register_INT32("cpu", 0, "exact globals", saved_exact_globals, 3);
-	spin_timetrig = yield_timetrig = 0;
-	state_save_register_INT32("cpu", 0, "spin timetrig", &spin_timetrig, 1);
-	state_save_register_INT32("cpu", 0, "yield timetrig", &yield_timetrig, 1);
 	state_save_register_func_presave(cpu_suspend_presave);
 	state_save_register_func_postload(cpu_suspend_postload);

@@ -376,10 +323,6 @@ int cpu_init(void)
 	if (cpuint_init())
 		return 1;

-	/* the timer system, in the save states: registered after the CPU and
-	   interrupt state, so its postload runs before theirs */
-	timer_save_init();
-
 	return 0;
 }

@@ -942,24 +885,6 @@ double cpunum_get_clockscale(int cpunum)



-/*************************************
- *
- *	Recomputes a CPU's cycle times from
- *	its clock, clock scale and overclock
- *
- *************************************/
-
-static void update_cycle_rate(int cpunum)
-{
-	sec_to_cycles[cpunum] = cpu[cpunum].clockscale * cpu[cpunum].overclock * Machine->drv->cpu[cpunum].cpu_clock;
-	cycles_to_sec[cpunum] = 1.0 / sec_to_cycles[cpunum];
-
-	/* re-compute the perfect interleave factor */
-	compute_perfect_interleave();
-}
-
-
-
 /*************************************
 *
 *	Sets the current scaling factor
@@ -972,42 +897,11 @@ void cpunum_set_clockscale(int cpunum, double clockscale)
 	VERIFY_CPUNUM_VOID(cpunum_set_clockscale);

 	cpu[cpunum].clockscale = clockscale;
-	update_cycle_rate(cpunum);
-}
+	sec_to_cycles[cpunum] = cpu[cpunum].clockscale * Machine->drv->cpu[cpunum].cpu_clock;
+	cycles_to_sec[cpunum] = 1.0 / sec_to_cycles[cpunum];

-
-
-/*************************************
- *
- *	Returns the user overclock factor
- *	for a CPU's clock speed
- *
- *************************************/
-
-double cpunum_get_overclock(int cpunum)
-{
-	VERIFY_CPUNUM(1.0, cpunum_get_overclock);
-	return cpu[cpunum].overclock;
-}
-
-
-
-/*************************************
- *
- *	Sets the user overclock factor for
- *	a CPU's clock speed. It multiplies
- *	the clock scale, so a clock scale
- *	that a driver or CPU core sets is
- *	kept
- *
- *************************************/
-
-void cpunum_set_overclock(int cpunum, double overclock)
-{
-	VERIFY_CPUNUM_VOID(cpunum_set_overclock);
-
-	cpu[cpunum].overclock = overclock;
-	update_cycle_rate(cpunum);
+	/* re-compute the perfect interleave factor */
+	compute_perfect_interleave();
 }


@@ -1476,17 +1370,21 @@ void cpu_yield(void)

 void cpu_spinuntil_time(double duration)
 {
-	cpu_spinuntil_trigger(TRIGGER_SUSPENDTIME + spin_timetrig);
-	cpu_triggertime(duration, TRIGGER_SUSPENDTIME + spin_timetrig);
-	spin_timetrig = (spin_timetrig + 1) & 255;
+	static int timetrig = 0;
+
+	cpu_spinuntil_trigger(TRIGGER_SUSPENDTIME + timetrig);
+	cpu_triggertime(duration, TRIGGER_SUSPENDTIME + timetrig);
+	timetrig = (timetrig + 1) & 255;
 }


 void cpu_yielduntil_time(double duration)
 {
-	cpu_yielduntil_trigger(TRIGGER_YIELDTIME + yield_timetrig);
-	cpu_triggertime(duration, TRIGGER_YIELDTIME + yield_timetrig);
-	yield_timetrig = (yield_timetrig + 1) & 255;
+	static int timetrig = 0;
+
+	cpu_yielduntil_trigger(TRIGGER_YIELDTIME + timetrig);
+	cpu_triggertime(duration, TRIGGER_YIELDTIME + timetrig);
+	timetrig = (timetrig + 1) & 255;
 }


@@ -179,12 +179,6 @@ double cpunum_get_clockscale(int cpunum);
 /* Sets the current scaling factor for a CPU's clock speed */
 void cpunum_set_clockscale(int cpunum, double clockscale);

-/* Returns the user overclock factor for a CPU's clock speed */
-double cpunum_get_overclock(int cpunum);
-
-/* Sets the user overclock factor, which multiplies the clock scale */
-void cpunum_set_overclock(int cpunum, double overclock);
-
 /* Temporarily boosts the interleave factor */
 void cpu_boost_interleave(double timeslice_time, double boost_duration);

@@ -192,8 +186,8 @@ void cpu_boost_interleave(double timeslice_time, double boost_duration);
 #define timer_suspendcpu(cpunum, suspend, reason)	do { if (suspend) cpunum_suspend(cpunum, reason, 1); else cpunum_resume(cpunum, reason); } while (0)
 #define timer_holdcpu(cpunum, suspend, reason)		do { if (suspend) cpunum_suspend(cpunum, reason, 0); else cpunum_resume(cpunum, reason); } while (0)
 #define cpu_getstatus(cpunum)						(!cpunum_is_suspended(cpunum, SUSPEND_REASON_HALT | SUSPEND_REASON_RESET | SUSPEND_REASON_DISABLE))
-#define timer_get_overclock(cpunum)					cpunum_get_overclock(cpunum)
-#define timer_set_overclock(cpunum, overclock)		cpunum_set_overclock(cpunum, overclock)
+#define timer_get_overclock(cpunum)					cpunum_get_clockscale(cpunum)
+#define timer_set_overclock(cpunum, overclock)		cpunum_set_clockscale(cpunum, overclock)



@@ -77,9 +77,7 @@ static void cpuint_postload(void)
 	{
 		if (irq_event_index[cpunum] > MAX_IRQ_EVENTS)
 			irq_event_index[cpunum] = MAX_IRQ_EVENTS;
-		/* the timer that empties the queue is in the state, when the
-		   timers are */
-		if (irq_event_index[cpunum] > 0 && !timer_state_loaded())
+		if (irq_event_index[cpunum] > 0)
 			timer_set(TIME_NOW, cpunum, cpu_empty_event_queue);
 	}
 }
@@ -67,9 +67,6 @@
 #if (HAS_V20 || HAS_V30 || HAS_V33)
 #include "cpu/nec/necintrf.h"
 #endif
-#if (HAS_V25)
-#include "cpu/nec/v25.h"
-#endif
 #if (HAS_V60 || HAS_V70)
 #include "cpu/v60/v60.h"
 #endif
@@ -124,9 +121,6 @@
 #if (HAS_TMS32025)
 #include "cpu/tms32025/tms32025.h"
 #endif
-#if (HAS_NAMCOC71)
-#include "cpu/namcoc71/c71.h"
-#endif
 #if (HAS_I960)
 #include "cpu/i960/i960.h"
 #endif
@@ -157,9 +151,6 @@
 #if (HAS_H83002)
 #include "cpu/h83002/h83002.h"
 #endif
-#if (HAS_I386)
-#include "cpu/i386/i386.h"
-#endif
 #if (HAS_M37702)
 #include "cpu/m37710/m37710.h"
 #endif
@@ -187,9 +178,6 @@
 #if (HAS_SH2)
 #include "cpu/sh2/sh2.h"
 #endif
-#if (HAS_SH3)
-#include "cpu/sh3/sh3.h"
-#endif
 #if (HAS_DSP32C)
 #include "cpu/dsp32/dsp32.h"
 #endif
@@ -444,9 +432,6 @@ const struct cpu_interface cpuintrf[] =
 #if (HAS_V30)
 	CPU0(V30,	   v30, 	 1,255,1.00, 8, 20,	  0,20,LE,1, 5	),
 #endif
-#if (HAS_V25)
-	CPU0(V25,	   v25, 	 1,255,1.00, 8, 20,	  0,20,LE,1, 5	),
-#endif
 #if (HAS_V33)
 	CPU0(V33,	   v33, 	 1,255,1.00, 8, 20,	  0,20,LE,1, 5	),
 #endif
@@ -576,10 +561,6 @@ const struct cpu_interface cpuintrf[] =
 #if (HAS_TMS32025)
 	CPU3(TMS32025,tms32025,  3,  0,1.00,16,18bew, -1,18,BE,2, 4	),
 #endif
-#if (HAS_NAMCOC71)
-	#define c71_ICount c71_icount
-	CPU0(NAMCOC71, c71,      6,  0,1.00,16,16bew, -1,16,BE,2, 4	),
-#endif
 #if (HAS_TMS32031)
 	#define tms32031_ICount tms32031_icount
 	CPU0(TMS32031,tms32031,  4,  0,1.00,32,26ledw,-2,26,LE,4, 4 ),
@@ -611,9 +592,6 @@ const struct cpu_interface cpuintrf[] =
 #if (HAS_H83002)
 	CPU0(H83002,   h8_3002,	 8,  0,1.00,16,24bew,  0,24,BE,2,10 ),
 #endif
-#if (HAS_I386)
-	CPU0(I386,     i386,	 1,  0,1.00,32,32ledw, 0,32,LE,1,15 ),
-#endif
 #if (HAS_MN10200)
 	CPU0(MN10200,  mn10200,	 4,  0,1.00,16,24lew,  0,24,LE,1, 6 ),
 #endif
@@ -667,9 +645,6 @@ const struct cpu_interface cpuintrf[] =
 #if (HAS_SH2)
 	CPU4(SH2,	   sh2, 	16,  0,1.00,32,32bedw,   0,32,BE,2, 2  ),
 #endif
-#if (HAS_SH3)
-	CPU0(SH3,	   sh3, 	 4,  0,1.00,32,32bedw,   0,32,BE,2, 2  ),
-#endif
 #if (HAS_DSP32C)
 	#define dsp32c_ICount dsp32_icount
 	CPU0(DSP32C,   dsp32c,   4,  0,1.00,32,24ledw, 0,24,LE,4, 4 ),
@@ -1293,15 +1268,6 @@ void *cpunum_get_context_ptr(int cpunum)
 	return (cpu_active_context[cpu[cpunum].family] == cpunum) ? NULL : cpu[cpunum].context;
 }

-/* the context buffer of a CPU, also from its init function (when the CPU
-   does not count in totalcpu yet), whether it is active or not */
-void *cpunum_get_context_buffer(int cpunum)
-{
-	if (cpunum < 0 || cpunum >= MAX_CPU)
-		return NULL;
-	return cpu[cpunum].context;
-}
-

 /*--------------------------
 	Get/set cycle table
@@ -103,9 +103,6 @@ enum
 #if (HAS_V30)
 	CPU_V30,
 #endif
-#if (HAS_V25)
-	CPU_V25,
-#endif
 #if (HAS_V33)
 	CPU_V33,
 #endif
@@ -235,9 +232,6 @@ enum
 #if (HAS_TMS32025)
 	CPU_TMS32025,
 #endif
-#if (HAS_NAMCOC71)
-	CPU_NAMCOC71,
-#endif
 #if (HAS_TMS32031)
 	CPU_TMS32031,
 #endif
@@ -268,9 +262,6 @@ enum
 #if (HAS_H83002)
 	CPU_H83002,
 #endif
-#if (HAS_I386)
-	CPU_I386,
-#endif
 #if (HAS_MN10200)
 	CPU_MN10200,
 #endif
@@ -311,9 +302,6 @@ enum
 #if (HAS_SH2)
 	CPU_SH2,
 #endif
-#if (HAS_SH3)
-	CPU_SH3,
-#endif
 #if (HAS_DSP32C)
 	CPU_DSP32C,
 #endif
@@ -639,7 +627,6 @@ void cpunum_write_bytes(int cpunum, offs_t address, const UINT8 *data, UINT32 co
 /* return a pointer to the saved context of a given CPU, or NULL if the
   context is active (and contained within the CPU core */
 void *cpunum_get_context_ptr(int cpunum);
-void *cpunum_get_context_buffer(int cpunum);

 /* return a pointer to the active cycle count table for a given CPU */
 const void *cpunum_get_cycle_table(int cpunum, int which);
@@ -1,7 +1,6 @@
 #ifndef DECLARE

 #include "driver.h"
-#include "state.h"


 #ifdef MSB_FIRST
@@ -3517,20 +3516,11 @@ static INLINE void plotclip(struct mame_bitmap *bitmap,int x,int y,int pen,const
 		plot_pixel(bitmap,x,y,pen);
 }

-/* where each crosshair was and since which frame: in the save states, so a
-   crosshair hides at the same frame after a load or a run-ahead rewind */
-static INT32 inactive_xy [MAX_PLAYER_COUNT][3];
-
-void crosshair_state_save_register(void)
-{
-	memset(inactive_xy, 0, sizeof(inactive_xy));
-	state_save_register_INT32("crosshair", 0, "inactive", &inactive_xy[0][0], MAX_PLAYER_COUNT * 3);
-}
-
 void draw_crosshair(int player_number, struct mame_bitmap *bitmap,int x,int y,const struct rectangle *clip)
 {
 	unsigned long color,black,white;
 	int i;
+	static int inactive_xy [MAX_PLAYER_COUNT][3];

 	if (!options.crosshair_enable)
 	{
@@ -272,7 +272,6 @@ void mdrawgfxzoom( struct mame_bitmap *dest_bmp,const struct GfxElement *gfx,

 void drawgfx_toggle_crosshair(void);
 void draw_crosshair(int player_number, struct mame_bitmap *bitmap,int x,int y,const struct rectangle *clip);
-void crosshair_state_save_register(void);

 static INLINE void sect_rect(struct rectangle *dst, const struct rectangle *src)
 {
@@ -250,13 +250,9 @@ const struct GameDriver *test_drivers[] =
 	DRIVER( froggers )	/* bootleg */
 	DRIVER( amidars )	/* GX337 (c) 1982 Konami */
 	DRIVER( triplep )	/* (c) 1982 KKI */	/* made by Sanritsu? */
-	DRIVER( triplepa )	/* (c) 1982 KKI */
 	DRIVER( knockout )	/* (c) 1982 KKK */
-	DRIVER( knockoutb )	/* bootleg */
-	DRIVER( knockoutc )	/* bootleg (ESG) */
 	DRIVER( mariner )	/* (c) 1981 Amenip */
 	DRIVER( 800fath )	/* (c) 1981 Amenip + U.S. Billiards license */
-	DRIVER( 800fatha )	/* (c) 1981 Amenip + U.S. Billiards license */
 	DRIVER( mars )		/* (c) 1981 Artic */
 	DRIVER( devilfsh )	/* (c) 1982 Artic */
 	DRIVER( newsin7 )	/* (c) 1983 ATW USA, Inc. */
@@ -375,8 +371,6 @@ const struct GameDriver *test_drivers[] =
 	DRIVER( kodure )	/* (c) 1987 (Japan) */
 	DRIVER( armedf )	/* (c) 1988 */
 	DRIVER( cclimbr2 )	/* (c) 1988 (Japan) */
-  DRIVER( skyrobo )   /* (c) 1989 */
-	DRIVER( bigfghtr )	/* (c) 1989 */

 	/* Nichibutsu Mahjong games */
 	DRIVER( hyhoo )		/* (c) 1987 */
@@ -748,49 +742,18 @@ const struct GameDriver *test_drivers[] =
 	DRIVER( cybsled )	/* (c) 1993 */

 	/* Namco System 22 games */
-	DRIVER( namcoc74 )	/* C74 BIOS */
-	DRIVER( ridgerac )	/* (c) 1993 */
-	DRIVER( ridgeraca )	/* (c) 1993 */
-	DRIVER( ridgeracb )	/* (c) 1993 */
-	DRIVER( ridgeracc )	/* (c) 1993 */
-	DRIVER( ridgeracj )	/* (c) 1993 */
-	DRIVER( ridgera2 )	/* (c) 1994 */
-	DRIVER( ridgera2j )	/* (c) 1994 */
-	DRIVER( ridgera2ja )	/* (c) 1994 */
-	DRIVER( ridgera28 )	/* (c) 1994 */
-	DRIVER( cybrcomm )	/* (c) 1994 */
-	DRIVER( raverace )	/* (c) 1995 */
-	DRIVER( raveracej )	/* (c) 1995 */
-	DRIVER( raveraceja )	/* (c) 1995 */
-	DRIVER( acedrive )	/* (c) 1994 */
-	DRIVER( victlap )	/* (c) 1996 */
-	DRIVER( victlapa )	/* (c) 1996 */
-	DRIVER( victlapj )	/* (c) 1996 */
-
-	/* Namco Super System 22 games */
 	DRIVER( alpinerd )	/* (c) 1994 */
 	DRIVER( alpinerc )	/* (c) 1994 */
-	DRIVER( alpinerjc )	/* (c) 1994 */
-	DRIVER( airco22b )	/* (c) 1995 */
-	DRIVER( cybrcycc )	/* (c) 1995 */
-	DRIVER( cybrcyccj )	/* (c) 1995 */
-	DRIVER( dirtdash )	/* (c) 1995 */
-	DRIVER( dirtdasha )	/* (c) 1995 */
-	DRIVER( dirtdashb )	/* (c) 1995 */
-	DRIVER( dirtdashj )	/* (c) 1995 */
-	DRIVER( timecris )	/* (c) 1996 */
-	DRIVER( timecrisa )	/* (c) 1996 */
-	DRIVER( timecrisj )	/* (c) 1996 */
+	DRIVER( raveracw )	/* (c) 1995 */
+	DRIVER( ridgeraj )
+	DRIVER( ridger2j )
+	DRIVER( acedrvrw )
+	DRIVER( victlapw )
+	DRIVER( cybrcomm )
+	DRIVER( airco22b )
+	DRIVER( cybrcycc )
+	DRIVER( timecrsa )
 	DRIVER( propcycl )	/* (c) 1996 */
-	DRIVER( propcyclj )	/* (c) 1996 */
-	DRIVER( alpines )	/* (c) 1996 */
-	DRIVER( tokyowar )	/* (c) 1996 */
-	DRIVER( tokyowarj )	/* (c) 1996 */
-	DRIVER( aquajet )	/* (c) 1996 */
-	DRIVER( alpinr2b )	/* (c) 1996 */
-	DRIVER( alpinr2a )	/* (c) 1996 */
-	DRIVER( adillor )	/* (c) 1997 */
-	DRIVER( adillorj )	/* (c) 1997 */


 	/* Universal games */
@@ -1909,41 +1872,20 @@ const struct GameDriver *test_drivers[] =
 	DRIVER( ghox )		/* TP-021 (c) 1991 Toaplan */
 	DRIVER( ghoxj )		/* TP-021 (c) 1991 Toaplan */
 	DRIVER( dogyuun )	/* TP-022 (c) 1992 Toaplan */
-	DRIVER( dogyuuna )	/* TP-022 (c) 1992 Toaplan */
-	DRIVER( dogyuunb )	/* TP-022 (c) 1992 Toaplan */
-	DRIVER( dogyuunt )	/* TP-022 (c) 1992 Toaplan */
 	DRIVER( dogyuunto )	/* TP-022 (c) 1992 Toaplan */
 	DRIVER( kbash )		/* TP-023 (c) 1993 Toaplan */
-	DRIVER( kbashk )	/* TP-023 (c) 1993 Toaplan */
-	DRIVER( kbashp )	/* TP-023 (c) 1993 Toaplan */
 	DRIVER( kbash2 )	/* TP-023 */
 	DRIVER( truxton2 )	/* TP-024 (c) 1992 Toaplan */
 	DRIVER( pipibibs )	/* TP-025 */
 	DRIVER( whoopee )	/* TP-025 */
 	DRIVER( pipibibi )	/* (c) 1991 Ryouta Kikaku (bootleg?) */
-	DRIVER( fixeight )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeightk )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeighth )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeighttw )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeighta )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeightu )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeightj )	/* TP-026 (c) 1992 Toaplan */
-	DRIVER( fixeightt )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeightkt )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeightht )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeighttwt )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeightat )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeightut )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeightjt )	/* TP-026 (c) 1992 Toaplan + Taito license */
-	DRIVER( fixeightbl )	/* bootleg */
-	DRIVER( grindstm )	/* TP-027 (c) 1992 Toaplan */
-	DRIVER( grindstma )	/* TP-027 (c) 1992 Toaplan */
+	DRIVER( fixeight )	/* TP-026 (c) 1992 + Taito license */
+	DRIVER( fixeighb )	/* TP-026 */
 	DRIVER( vfive )		/* TP-027 (c) 1993 Toaplan (Japan) */
+	DRIVER( grindstm )	/* TP-027 (c) 1993 Toaplan + Unite Trading license (Korea) */
+	DRIVER( grindsta )	/* TP-027 (c) 1993 Toaplan + Unite Trading license (Korea) */
 	DRIVER( batsugun )	/* TP-030 (c) 1993 Toaplan */
-	DRIVER( batsuguna )	/* TP-030 (c) 1993 Toaplan */
-	DRIVER( batsugunc )	/* TP-030 (c) 1993 Toaplan */
-	DRIVER( batsugunb )	/* TP-030 (c) 1993 Toaplan */
-	DRIVER( batsugunsp )	/* TP-030 (c) 1993 Toaplan */
+	DRIVER( batugnsp )	/* TP-??? (c) 1993 Toaplan */
 	DRIVER( snowbro2 )	/* TP-??? (c) 1994 Hanafram */
 	/* see http://www.vsa-ag.ch/r8zing/ for a list of Raizing/8ing games */
 	DRIVER( sstriker )	/* (c) 1993 Raizing */
@@ -2031,38 +1973,6 @@ V-V                           TP-027
 	DRIVER( gaia )		/* (c) 1999 Noise Factory */
 	DRIVER( theroes )	/* (c) 2001 Primetek Investmants */

-	/* Cave CV1000 games */
-	DRIVER( mushisam )	/* Mushihime-Sama (Japan, 2004/10/12.MASTER VER.) */
-	DRIVER( mushisama )	/* Mushihime-Sama (Japan, 2004/10/12 MASTER VER.) */
-	DRIVER( mushisamb )	/* Mushihime-Sama (Japan, 2004/10/12 MASTER VER) */
-	DRIVER( ibara )	/* Ibara (Japan, 2005/03/22 MASTER VER.., '06. 3. 7 ver.) */
-	DRIVER( ibarao )	/* Ibara (Japan, 2005/03/22 MASTER VER..) */
-	DRIVER( ibarablk )	/* Ibara Kuro Black Label (Japan, 2006/02/06. MASTER VER.) */
-	DRIVER( ibarablka )	/* Ibara Kuro Black Label (Japan, 2006/02/06 MASTER VER.) */
-	DRIVER( espgal2 )	/* Espgaluda II (Japan, 2005/11/14.MASTER VER.) */
-	DRIVER( espgal2a )	/* Espgaluda II (Japan, 2005/11/14 MASTER VER, newer CV1000-B PCB) */
-	DRIVER( espgal2b )	/* Espgaluda II (Japan, 2005/11/14 MASTER VER, original CV1000-B PCB) */
-	DRIVER( mushitam )	/* Puzzle! Mushihime-Tama (Japan, 2005/09/09.MASTER VER) */
-	DRIVER( mushitama )	/* Puzzle! Mushihime-Tama (Japan, 2005/09/09 MASTER VER) */
-	DRIVER( pinkswts )	/* Pink Sweets: Ibara Sorekara (Japan, 2006/04/06 MASTER VER....) */
-	DRIVER( pinkswtsa )	/* Pink Sweets: Ibara Sorekara (Japan, 2006/04/06 MASTER VER...) */
-	DRIVER( pinkswtsb )	/* Pink Sweets: Ibara Sorekara (Japan, 2006/04/06 MASTER VER.) */
-	DRIVER( pinkswtsx )	/* Pink Sweets: Ibara Sorekara (Japan, 2006/xx/xx MASTER VER.) */
-	DRIVER( pinkswtssc )	/* Pink Sweets: Suicide Club (2017/10/31 SUICIDECLUB VER., bootleg) */
-	DRIVER( futari15 )	/* Mushihime-Sama Futari Ver 1.5 (Japan, 2006/12/8.MASTER VER. 1.54.) */
-	DRIVER( futari15a )	/* Mushihime-Sama Futari Ver 1.5 (Japan, 2006/12/8 MASTER VER 1.54) */
-	DRIVER( futari10 )	/* Mushihime-Sama Futari Ver 1.0 (Japan, 2006/10/23 MASTER VER.) */
-	DRIVER( futaribl )	/* Mushihime-Sama Futari Black Label - Another Ver (World, 2009/11/27 INTERNATIONAL BL) */
-	DRIVER( futariblj )	/* Mushihime-Sama Futari Black Label (Japan, 2007/12/11 BLACK LABEL VER) */
-	DRIVER( mmpork )	/* Muchi Muchi Pork! (Japan, 2007/ 4/17 MASTER VER.) */
-	DRIVER( deathsml )	/* Deathsmiles (Japan, 2007/10/09 MASTER VER) */
-	DRIVER( dsmbl )	/* Deathsmiles MegaBlack Label (Japan, 2008/10/06 MEGABLACK LABEL VER) */
-	DRIVER( ddpdfk )	/* DoDonPachi Dai-Fukkatsu Ver 1.5 (Japan, 2008/06/23 MASTER VER 1.5) */
-	DRIVER( ddpdfk10 )	/* DoDonPachi Dai-Fukkatsu Ver 1.0 (Japan, 2008/05/16 MASTER VER) */
-	DRIVER( dfkbl )	/* DoDonPachi Dai-Fukkatsu Black Label (Japan, 2010/1/18 BLACK LABEL) */
-  DRIVER( akatana ) /* Akai Katana (2010/ 8/13 MASTER VER.) */
-  DRIVER( ddpsdoj ) /* DoDonPachi SaiDaiOuJou (2012/ 4/20) */
-
 	/* Kyugo games */
 	/* Kyugo only made four games: Repulse, Flash Gal, SRD Mission and Air Wolf. */
 	/* Gyrodine was made by Crux. Crux was antecedent of Toa Plan, and spin-off from Orca. */
@@ -2162,24 +2072,6 @@ V-V                           TP-027
 	DRIVER( gngmaidencenh )		/*  Hack */
 	DRIVER( gngmaident )		/*  Hack */
 	DRIVER( gngmaidentenh )		/*  Hack */
-	DRIVER( gngprincess )		/* Hack */
-	DRIVER( gngprincessa )		/* Hack */
-	DRIVER( gngprincessaenh )		/* Hack */
-	DRIVER( gngprincessb )		/* Hack */
-	DRIVER( gngprincessbenh )		/* Hack */
-	DRIVER( gngprincessc )		/* Hack */
-	DRIVER( gngprincesscenh )		/* Hack */
-	DRIVER( gngprincessenh )		/* Hack */
-	DRIVER( gngprincesst )		/* Hack */
-	DRIVER( gngprincesstenh )		/* Hack */
-	DRIVER( makprincess )		/* Hack */
-	DRIVER( makprincessb )		/* Hack */
-	DRIVER( makprincessbenh )		/* Hack */
-	DRIVER( makprincessc )		/* Hack */
-	DRIVER( makprincesscenh )		/* Hack */
-	DRIVER( makprincessenh )		/* Hack */
-	DRIVER( makprincessg )		/* Hack */
-	DRIVER( makprincessgenh )		/* Hack */
 	DRIVER( gngknight )		/*  Hack */
 	DRIVER( gngknightenh )		/*  Hack */
 	DRIVER( gngknighta )		/*  Hack */
@@ -2892,45 +2784,6 @@ V-V                           TP-027
 	DRIVER( raystormo )	/* RayStorm (Ver 2.05O) */
 	DRIVER( raystormu )	/* RayStorm (Ver 2.05A) */
 	DRIVER( raystormj )	/* RayStorm (Ver 2.05J) */
-	DRIVER( chaoshea )	/* Chaos Heat (V2.09O 1998/10/02 17:00) */
-	DRIVER( chaosheaj )	/* Chaos Heat (V2.08J 1998/09/25 17:00) */
-	DRIVER( raycris )	/* RayCrisis (V2.03O 1998/11/15 15:43) */
-	DRIVER( raycrisj )	/* RayCrisis (V2.03J 1998/11/15 15:43) */
-	DRIVER( spuzbobl )	/* Super Puzzle Bobble (V2.05O 1999/2/24 18:00) */
-	DRIVER( spuzboblj )	/* Super Puzzle Bobble (V2.04J 1999/2/17 02:10) */
-	DRIVER( gobyrc )	/* Go By RC (V2.03O 1999/05/25 13:31) */
-	DRIVER( rcdego )	/* RC De Go (V2.03J 1999/05/22 19:29) */
-	DRIVER( flipmaze )	/* Flip Maze (V2.04J 1999/09/02 20:00) */
-	DRIVER( mawasunda )	/* Mawasunda!! (V2.08J 2000/02/01 11:02:54) */
-	DRIVER( shikigam )	/* Shikigami no Shiro (V2.03J 2001/08/07 18:11) */
-	DRIVER( shikigama )	/* Shikigami no Shiro - internal build (V1.02J 2001/09/27 18:45) */
-	DRIVER( sianniv )	/* Space Invaders Anniversary (V2.02J 2003/09/12 20:00) */
-	DRIVER( kollon )	/* Kollon (V2.04JA 2003/11/01 12:00) */
-	DRIVER( kollonc )	/* Kollon (V2.04JC 2003/11/01 12:00) */
-	DRIVER( otenamih )	/* Otenami Haiken (V2.04J 1999/02/01 18:00:00) */
-	DRIVER( psyvaria )	/* Psyvariar -Medium Unit- (V2.02O 2000/02/22 13:00) */
-	DRIVER( psyvarij )	/* Psyvariar -Medium Unit- (V2.04J 2000/02/15 11:00) */
-	DRIVER( psyvarrv )	/* Psyvariar -Revision- (V2.04J 2000/08/11 22:00) */
-	DRIVER( zokuoten )	/* Zoku Otenamihaiken (V2.05J 2003/05/12 18:00) */
-	DRIVER( zokuotena )	/* Zoku Otenamihaiken (V2.03J 2001/02/16 16:00) */
-	DRIVER( zooo )	/* Zooo (V2.01JA 2004/04/13 12:00) */
-	DRIVER( otenamhf )	/* Otenami Haiken Final (V2.07JC 2005/04/20 15:36) */
-	DRIVER( mahjngoh )	/* Mahjong Oh (V2.06J 1999/11/23 08:52:22) */
-	DRIVER( shanghss )	/* Shanghai Shoryu Sairin (V2.03J 2000/05/26 12:45:28) */
-	DRIVER( soutenry )	/* Soutenryu (V2.07J 2000/12/14 11:13:02) */
-	DRIVER( usagi )	/* Usagi (V2.02J 2001/10/02 12:41:19) */
-	DRIVER( shangtou )	/* Shanghai Sangokuhai Tougi (Ver 2.01J 2002/01/18 18:26:58) */
-	DRIVER( nightrai )	/* Night Raid (V2.03J 2001/02/26 17:00) */
-	DRIVER( otenki )	/* Otenki Kororin (V2.01J 2001/07/02 10:00) */
-	DRIVER( xiistag )	/* XII Stag (V2.01J 2002/6/26 22:27) */
-	DRIVER( aerofgtsg )	/* Aero Fighters Special (VER 1.00G) */
-	DRIVER( brvbladeg )	/* Brave Blade (VER 1.40G) */
-	DRIVER( flamegung )	/* Flame Gunner (VER 1.40G) */
-	DRIVER( ftimpactg )	/* Fighters' Impact (VER 2.10G) */
-	DRIVER( gdariusg )	/* G-Darius (VER 2.70G) */
-	DRIVER( raystormg )	/* RayStorm (VER 2.60G) */
-	DRIVER( shngmtkbg )	/* Shanghai Matekibuyuu (VER 1.20G) */
-	DRIVER( tblkkuzug )	/* The Block Kuzushi (VER 1.10G) */
 	DRIVER( ftimpcta )	/* Fighters' Impact A (Ver 2.00J) */
 	DRIVER( ftimpact )	/* Fighters' Impact (Ver 2.02O) */
 	DRIVER( ftimpactu )	/* Fighters' Impact (Ver 2.02A) */
@@ -3033,20 +2886,7 @@ V-V                           TP-027
 	DRIVER( g13knd )	/* Golgo 13 Kiseki no Dandou (Japan, GLS1/VER.A) */

 	/* Namco System 10 */
-	DRIVER( mrdrilr2 )	/* Mr. Driller 2 (World, DR22 Ver.A) */
-	DRIVER( mrdrilr2j )	/* Mr. Driller 2 (Japan, DR21 Ver.A) */
-	DRIVER( mrdrilr2u )	/* Mr. Driller 2 (US, DR23 Ver.A) */
-	DRIVER( gjspace )	/* GekiToride-Jong Space (10011 Ver.A) */
-	DRIVER( knpuzzle )	/* Kotoba no Puzzle Mojipittan (Japan, KPM1 Ver.A) */
-	DRIVER( mrdrilrg )	/* Mr. Driller G (Japan, DRG1 Ver.A) */
-	DRIVER( chocovdr )	/* Uchuu Daisakusen: Chocovader Contactee (Japan, CVC1 Ver.A) */
-	DRIVER( gamshara )	/* Gamshara (20020912A / 10021 Ver.A) */
-	DRIVER( gamsharao )	/* Gamshara (20020716A / 10021 Ver.A) */
-	DRIVER( panikuru )	/* Panikuru Panekuru (Japan, PPA1 Ver.A) */
-	DRIVER( startrgn )	/* Star Trigon (Japan, STT1 Ver.A) */
-	DRIVER( konotako )	/* Kono e Tako (10021 Ver.A) */
-	DRIVER( ptblank3 )	/* Point Blank 3 (World, GNN2 Ver.A) */
-	DRIVER( gunbalina )	/* Gunbalina (Japan, GNN1 Ver.A) */
+	DRIVER( mrdrilr2 )	/* Mr Driller 2 */

 	/* Konami GQ */
 	DRIVER( cryptklr )
@@ -3352,19 +3192,25 @@ DokiDoki Penguin Land *not confirmed
 	DRIVER( aliensya )	/* (c) 1987 (protected) */
 	DRIVER( aliensyb )	/* (c) 1987 (protected) */
 	DRIVER( aliensyj )	/* (c) 1987 (protected. Japan) */
+	DRIVER( astorm )	/* (c) 1990 (protected) */
+	DRIVER( astorm2p )	/* (c) 1990 (protected 2 Players) */
 	DRIVER( aurail1 )	/* (c) 1990 Sega / Westone (protected) */
 	DRIVER( aurailj )	/* (c) 1990 Sega / Westone (protected) */
 	DRIVER( bayrouta )	/* (c) 1989 (protected) */
 	DRIVER( bayrtbl1 )	/* (c) 1989 (protected) (bootleg) */
 	DRIVER( bayrtbl2 )	/* (c) 1989 (protected) (bootleg) */
+	DRIVER( enduror )	/* (c) 1985 (protected) */
 	DRIVER( eswat )		/* (c) 1989 (protected) */
 	DRIVER( fpoint )	/* (c) 1989 (protected) */
 	DRIVER( goldnaxb )	/* (c) 1989 (protected) */
 	DRIVER( goldnaxc )	/* (c) 1989 (protected) */
 	DRIVER( goldnaxj )	/* (c) 1989 (protected. Japan) */
 	DRIVER( jyuohki )	/* (c) 1988 (protected. Altered Beast Japan) */
+	DRIVER( moonwalk )	/* (c) 1990 (protected) */
+	DRIVER( moonwlka )	/* (c) 1990 (protected) */
 	DRIVER( passsht )	/* (protected) */
 	DRIVER( sdioj )		/* (c) 1987 (protected. Japan) */
+	DRIVER( shangon )	/* (c) 1992 (protected) */
 	DRIVER( shinobia )	/* (c) 1987 (protected) */
 	DRIVER( shinobib )	/* (c) 1987 (protected) */
 	DRIVER( tetris )	/* (c) 1988 (protected) */
@@ -3375,6 +3221,11 @@ DokiDoki Penguin Land *not confirmed
 	DRIVER( hamaway )
 	DRIVER( aceattac )	/* (protected) */
 	DRIVER( afighter )	/* (protected) */
+	DRIVER( bloxeed )	/* (protected) */
+	DRIVER( cltchitr )	/* (protected) */
+	DRIVER( cotton )	/* (protected) */
+	DRIVER( cottona )	/* (protected) */
+	DRIVER( ddcrew )	/* (protected) */
 	DRIVER( dunkshot )	/* (protected) */
 	DRIVER( dunkshota )	/* (protected) */
 	DRIVER( dunkshoto )	/* (protected) */
@@ -3382,6 +3233,7 @@ DokiDoki Penguin Land *not confirmed
 	DRIVER( sdib )		/* (protected) */
 	DRIVER( sjryuko )	/* (protected) */
 	DRIVER( exctleag )  /* (protected) */
+	DRIVER( lghost )	/* (protected) */
 	DRIVER( loffire )	/* (protected) */
 	DRIVER( mvp )		/* (protected) */
 	DRIVER( ryukyu )	/* (protected) */
@@ -3406,26 +3258,13 @@ DokiDoki Penguin Land *not confirmed
 	DRIVER( aurail1d )	/* (c) 1990 Sega / Westone */
 	DRIVER( aurailjd )	/* (c) 1990 Sega / Westone */
 	DRIVER( bayroute )	/* (c) 1989 Sunsoft / Sega */
-	DRIVER( cotton )	/* (c) 1991 (FD1094 317-0181a) */
-	DRIVER( cottonu )	/* (c) 1991 (FD1094 317-0180) */
-	DRIVER( cottonj )	/* (c) 1991 (FD1094 317-0179b) */
-	DRIVER( cottonja )	/* (c) 1991 (FD1094 317-0179a) */
-	DRIVER( cottond )	/* bootleg (decrypted cotton) */
-	DRIVER( cottonud )	/* bootleg (decrypted cottonu) */
-	DRIVER( cottonjd )	/* bootleg (decrypted cottonj) */
-	DRIVER( cottonjad )	/* bootleg (decrypted cottonja) */
+	DRIVER( cottond )
 	DRIVER( bulletd )
 	DRIVER( bodyslam )	/* (c) 1986 */
 	DRIVER( dduxbl )	/* (c) 1989 (Datsu bootleg) */
 	DRIVER( dumpmtmt )	/* (c) 1986 (Japan) */
-	DRIVER( enduror )	/* (c) 1986 (FD1089B) */
-	DRIVER( endurora )	/* (c) 1986 (FD1089B) */
-	DRIVER( endurorb )	/* (c) 1986 (FD1089B) */
-	DRIVER( enduror1 )	/* (c) 1986 (FD1089B) */
-	DRIVER( endurobl )	/* (c) 1986 (Herb bootleg) */
-	DRIVER( endurob2 )	/* (c) 1986 (Beta bootleg) */
-	DRIVER( endurord )	/* (c) 1986 (bootleg) */
-	DRIVER( enduror1d )	/* (c) 1986 (bootleg) */
+	DRIVER( endurob2 )	/* (c) 1985 (Beta bootleg) */
+	DRIVER( endurobl )	/* (c) 1985 (Herb bootleg) */
 	DRIVER( eswatbl )	/* (c) 1989 (but bootleg) */
 	DRIVER( fantzone )	/* (c) 1986 */
 	DRIVER( fantzono )	/* (c) 1986 */
@@ -3437,52 +3276,6 @@ DokiDoki Penguin Land *not confirmed
 	DRIVER( hangon )	/* (c) 1985 */
 	DRIVER( hwchamp )	/* (c) 1987 */
 	DRIVER( mjleague )	/* (c) 1985 */
-	DRIVER( astorm )	/* (c) 1990 (FD1094 317-0154) */
-	DRIVER( astorm3 )	/* (c) 1990 (FD1094 317-0148) */
-	DRIVER( astormu )	/* (c) 1990 (FD1094 317-0147) */
-	DRIVER( astormj )	/* (c) 1990 (FD1094 317-0146) */
-	DRIVER( astorm3d )	/* bootleg (decrypted astorm3) */
-	DRIVER( astormud )	/* bootleg (decrypted astormu) */
-	DRIVER( astormjd )	/* bootleg (decrypted astormj) */
-	DRIVER( bloxeed )	/* (c) 1989 (FD1094 317-0139) */
-	DRIVER( bloxeeda )	/* (c) 1989 (FD1094 317-0139) */
-	DRIVER( bloxeedd )	/* bootleg (decrypted bloxeed) */
-	DRIVER( cltchitr )	/* (c) 1991 (FD1094 317-0176) */
-	DRIVER( cltchitrj )	/* (c) 1991 (FD1094 317-0175) */
-	DRIVER( cltchitrd )	/* bootleg (decrypted cltchitr) */
-	DRIVER( cltchitrjd )	/* bootleg (decrypted cltchitrj) */
-	DRIVER( wwallyj )	/* (c) 1992 (FD1094 317-0197B) */
-	DRIVER( wwallyja )	/* (c) 1992 (FD1094 317-0197A) */
-	DRIVER( wwallyja3p )	/* (c) 1992 (FD1094 317-0198A) */
-	DRIVER( wwallyjd )	/* bootleg (decrypted wwallyj) */
-	DRIVER( wwallyjad )	/* bootleg (decrypted wwallyja) */
-	DRIVER( ddcrew )	/* (c) 1991 (FD1094 317-0190) */
-	DRIVER( ddcrewu )	/* (c) 1991 (FD1094 317-0186) */
-	DRIVER( ddcrew2 )	/* (c) 1991 (FD1094 317-0184) */
-	DRIVER( ddcrew1 )	/* (c) 1991 (FD1094 317-0187) */
-	DRIVER( ddcrewj )	/* (c) 1991 (FD1094 317-0185) */
-	DRIVER( ddcrewj2 )	/* (c) 1991 (FD1094 317-0182) */
-	DRIVER( ddcrewd )	/* bootleg (decrypted ddcrew) */
-	DRIVER( ddcrewud )	/* bootleg (decrypted ddcrewu) */
-	DRIVER( ddcrew2d )	/* bootleg (decrypted ddcrew2) */
-	DRIVER( ddcrew1d )	/* bootleg (decrypted ddcrew1) */
-	DRIVER( ddcrewjd )	/* bootleg (decrypted ddcrewj) */
-	DRIVER( ddcrewj2d )	/* bootleg (decrypted ddcrewj2) */
-	DRIVER( desertbr )	/* (c) 1992 (FD1094 317-0196) */
-	DRIVER( desertbrj )	/* (c) 1992 (FD1094 317-0194) */
-	DRIVER( desertbrd )	/* bootleg (decrypted desertbr) */
-	DRIVER( desertbrjd )	/* bootleg (decrypted desertbrj) */
-	DRIVER( lghost )	/* (c) 1990 (FD1094 317-0166) */
-	DRIVER( lghostu )	/* (c) 1990 (FD1094 317-0165) */
-	DRIVER( lghostj )	/* (c) 1990 (FD1094 317-0164) */
-	DRIVER( lghostd )	/* bootleg (decrypted lghost) */
-	DRIVER( lghostud )	/* bootleg (decrypted lghostu) */
-	DRIVER( mwalk )		/* (c) 1990 (FD1094/8751 317-0159) */
-	DRIVER( mwalku )	/* (c) 1990 (FD1094/8751 317-0158) */
-	DRIVER( mwalkj )	/* (c) 1990 (FD1094/8751 317-0157) */
-	DRIVER( mwalkd )	/* bootleg (decrypted mwalk) */
-	DRIVER( mwalkud )	/* bootleg (decrypted mwalku) */
-	DRIVER( mwalkjd )	/* bootleg (decrypted mwalkj) */
 	DRIVER( moonwlkb )	/* bootleg */
 	DRIVER( outrun )	/* (c) 1986 (bootleg)*/
 	DRIVER( outruna )	/* (c) 1986 (bootleg) */
@@ -3496,19 +3289,12 @@ DokiDoki Penguin Land *not confirmed
  DRIVER( rachero )  /* 1989 (decrypted) */
 	DRIVER( riotcity )	/* (c) 1991 Sega / Westone */
 	DRIVER( sdi )		/* (c) 1987 */
-	DRIVER( shangon )	/* (c) 1987 */
-	DRIVER( shangon1 )	/* (c) 1987 (FD1089B) */
-	DRIVER( shangon2 )	/* (c) 1987 (FD1089B) */
-	DRIVER( shangon3 )	/* (c) 1987 (FD1089B) */
-	DRIVER( shangon3d )	/* (c) 1987 (bootleg) */
-	DRIVER( shangonle )	/* (c) 1991 */
-	DRIVER( shangonrb )	/* (c) 1992 (bootleg) */
-	DRIVER( shangonrb2 )	/* (c) 1987 (Beta bootleg) */
+	DRIVER( shangonb )	/* (c) 1992 (but bootleg) */
 	DRIVER( sharrier )	/* (c) 1985 */
 	DRIVER( shdancbl )	/* (c) 1989 (but bootleg) */
 	DRIVER( shdancer )	/* (c) 1989 */
-	DRIVER( shdancerj )	/* (c) 1989 */
-	DRIVER( shdancer1 )	/* (c) 1989 */
+	DRIVER( shdancrj )	/* (c) 1989 */
+	DRIVER( shdancrb )	/* (c) 1989 */
 	DRIVER( shinobi )	/* (c) 1987 */
 	DRIVER( shinobl )	/* (c) 1987 (but bootleg) */
  DRIVER( smgp )  /* 1989 (decrypted) */
@@ -3600,9 +3386,7 @@ Sep.1994 Quiz Ghost Hunter
 	DRIVER( bakubaku )
 	DRIVER( colmns97 )
 	DRIVER( cotton2 )
-	DRIVER( cotton2e )
 	DRIVER( cottonbm )
-	DRIVER( cottonbme )	/* bootleg (English translation) */
 	DRIVER( decathlt )
 	DRIVER( diehard )
 	DRIVER( dnmtdeka )
@@ -3624,25 +3408,14 @@ Sep.1994 Quiz Ghost Hunter
 	DRIVER( pblbeach )
 	DRIVER( prikura )
 	DRIVER( puyosun )
-	DRIVER( puyosune )	/* bootleg, English translation */
 	DRIVER( rsgun )
 	DRIVER( sandor )
 	DRIVER( thunt )
-	DRIVER( sasissu )
-	DRIVER( sanjeon )
-	DRIVER( critcrsh )
-	DRIVER( tatacot )
-	DRIVER( danchiq )
-	DRIVER( micrombc )
-	DRIVER( patocar )
-	DRIVER( skychal )
-	DRIVER( supgoal )
-	DRIVER( techbowl )
-	DRIVER( wasafari )
+	DRIVER( sassisu )
 	DRIVER( seabass )
 	DRIVER( shanhigw )
 	DRIVER( shienryu )
-	DRIVER( smleague )
+	DRIVER( sleague )
 	DRIVER( sokyugrt )
 	DRIVER( sss )
 	DRIVER( suikoenb )
@@ -3652,8 +3425,6 @@ Sep.1994 Quiz Ghost Hunter
 	DRIVER( vmahjong )
 	DRIVER( winterht )
 	DRIVER( znpwfv )
-	DRIVER( znpwfvt )
-	DRIVER( znpwfve )

 	DRIVER( danchih )
 	DRIVER( mausuke )
@@ -3683,94 +3454,57 @@ Propose          deniam-16c 1997/06/21
 BOMULEUL CHAJARA SEGA ST-V  1997/04/11
 */

-	/* System C / C-2 (drivers/segac2.c) */
-	DRIVER( bloxeedc )	/* (c) 1989 Sega / Elorg */
-	DRIVER( bloxeedu )	/* (c) 1989 Sega / Elorg */
-	DRIVER( columns )		/* (c) 1990 Sega */
-	DRIVER( columnsu )	/* (c) 1990 Sega */
+	/* System C games */
+	DRIVER( bloxeedc )	/* (c) 1989 Sega / Elorg*/
+	DRIVER( columns )	/* (c) 1990 Sega */
 	DRIVER( columnsj )	/* (c) 1990 Sega */
 	DRIVER( columns2 )	/* (c) 1990 Sega */
-	DRIVER( column2j )	/* (c) 1990 Sega */
-	DRIVER( tfrceac )		/* (c) 1990 Technosoft / Sega */
-	DRIVER( tfrceacj )	/* (c) 1990 Technosoft / Sega */
-	DRIVER( tfrceacb )	/* (c) 1990 bootleg */
-	DRIVER( tfrceacjpb )	/* (c) 1990 bootleg */
-	DRIVER( borench )		/* (c) 1990 Sega */
-	DRIVER( borencha )	/* (c) 1990 Sega */
-	DRIVER( borenchj )	/* (c) 1990 Sega */
-	DRIVER( ribbit )		/* (c) 1991 Sega */
-	DRIVER( ribbitj )		/* (c) 1991 Sega */
-	DRIVER( twinsqua )	/* (c) 1991 Sega */
-	DRIVER( soniccar )	/* (c) 1991 Sega */
-	DRIVER( ssonicbr )	/* (c) 1992 hack */
-	DRIVER( ooparts )		/* (c) 1992 hack */
-	DRIVER( puyo )		/* (c) 1992 Compile / Sega */
-	DRIVER( puyobl )		/* (c) 1992 bootleg */
-	DRIVER( puyoj )		/* (c) 1992 Compile / Sega */
-	DRIVER( puyoja )		/* (c) 1992 Compile / Sega */
+
+	/* System C-2 games */
+	DRIVER( ssonicbr )  /* Sega, Unreleased */
+	DRIVER( borench )	/* (c) 1990 Sega */
+	DRIVER( tfrceac )	/* (c) 1990 Sega / Technosoft */
+	DRIVER( tfrceacj )	/* (c) 1990 Sega / Technosoft */
+	DRIVER( tfrceacb )	/* bootleg */
+	DRIVER( tfrceacjpb ) /* Prototype Bootleg */
+	DRIVER( ribbit )	/* (c) 1991 Sega */
 	DRIVER( tantr )		/* (c) 1992 Sega */
 	DRIVER( tantrkor )	/* (c) 1993 Sega */
-	DRIVER( tantrbl )		/* (c) 1992 bootleg */
-	DRIVER( tantrbl4 )	/* (c) 1992 bootleg */
-	DRIVER( tantrbl2 )	/* (c) 1994 bootleg */
-	DRIVER( tantrbl3 )	/* (c) 1994 bootleg */
-	DRIVER( wwanpanm )	/* (c) 1992 Sega */
-	DRIVER( wwanpanmo )	/* (c) 1992 Sega */
-	DRIVER( wwjumbo )		/* (c) 1990 Sega */
-	DRIVER( wwmarine )	/* (c) 1992 Sega */
-	DRIVER( wwpajero )	/* (c) 1990 Sega */
-	DRIVER( anpanman )	/* (c) 1992 Sega */
-	DRIVER( anpanmana )	/* (c) 1992 Sega */
-	DRIVER( sonicpop )	/* (c) 1993 Sega */
-	DRIVER( sonicfgt )	/* (c) 1993 Sega */
-	DRIVER( sonicfgtj )	/* (c) 1993 Sega */
-	DRIVER( potopoto )	/* (c) 1994 Sega */
+	DRIVER( tantrbl )	/* bootleg */
+	DRIVER( tantrbl2 )	/* bootleg */
+	DRIVER( puyopuyo )	/* (c) 1992 Sega / Compile */
+	DRIVER( puyopuya )	/* (c) 1992 Sega / Compile */
+	DRIVER( puyopuyb )	/* bootleg */
+	DRIVER( ichir )	    /* (c) 1994 Sega */
+	DRIVER( ichirk )	/* (c) 1994 Sega */
+	DRIVER( ichirj )	/* (c) 1994 Sega */
+	DRIVER( ichirjbl )	/* bootleg */
 	DRIVER( stkclmns )	/* (c) 1994 Sega */
-	DRIVER( stkclmnsj )	/* (c) 1994 Sega */
-	DRIVER( ichir )		/* (c) 1994 Sega */
-	DRIVER( ichirbl )		/* (c) 1994 bootleg */
-	DRIVER( ichirk )		/* (c) 1994 Sega */
-	DRIVER( ichirj )		/* (c) 1994 Sega */
-	DRIVER( ichirjbl )	/* (c) 1994 bootleg */
-	DRIVER( puyopuy2 )	/* (c) 1994 Compile (Sega license) */
-	DRIVER( zunkyou )		/* (c) 1994 Sega */
-	DRIVER( headonch )	/* (c) 1994 hack */
-	DRIVER( pclubj )		/* (c) 1995 Atlus */
-	DRIVER( pclubjv2 )	/* (c) 1995 Atlus */
-	DRIVER( pclub )		/* (c) 1995 Atlus */
-	DRIVER( pclubjv3 )	/* (c) 1995 Atlus */
-	DRIVER( pclubjv4 )	/* (c) 1996 Atlus */
-	DRIVER( pclubjv5 )	/* (c) 1996 Atlus */
+	DRIVER( puyopuy2 )	/* (c) 1994 Compile + Sega license */
+	DRIVER( potopoto )	/* (c) 1994 Sega */
+	DRIVER( zunkyou )	/* (c) 1994 Sega */
+	DRIVER( headonch ) /* Sega Unreleased */
+	DRIVER( ooparts ) /* Sega Unreleased */

-	/* Genie / Y-BOX hardware (drivers/megadriv_ybox.c) */
-	DRIVER( puckpkmn )	/* (c) 2000 Sun Mixing */
-	DRIVER( jingling )	/* (c) 2000 IBS Co. Ltd */
-	DRIVER( puckpkmnb )	/* bootleg */
+	/* Atlus Print Club 'Games' C-2 board */
+	DRIVER( pclubj )
+	DRIVER( pclubjv2 )
+	DRIVER( pclubjv4 )
+	DRIVER( pclubjv5 )
+
+	/* Genie Hardware (uses Genesis VDP) also has 'Sun Mixing Co' put into tile ram */
+	DRIVER( puckpkmn )	/* (c) 2000 Genie */
 	DRIVER( jzth )		/* (c) 2000 <unknown> */
-	DRIVER( songjang )	/* (c) 2000 WAH LAP */
-	DRIVER( shuifeng )	/* (c) 1999 WAH LAP */
-
-	/* Sun Mixing Mega Drive based boards (drivers/megadriv_sunmix.c) */
-	DRIVER( topshoot )	/* (c) 1995 Sun Mixing */
+  DRIVER( songjang )  /* (c) 2000 WAH LAB */
+  DRIVER( shuifeng )  /* (c) 1999 WAH LAB */
 	DRIVER( sbubsm )	/* (c) 1996 Sun Mixing */
-
-	/* Mega Drive based bootlegs (drivers/megadriv_acbl.c) */
-	DRIVER( aladmdb )	/* (c) 1993 bootleg / Sega */
-	DRIVER( sonic2mb )	/* (c) 1993 bootleg / Sega */
-	DRIVER( sonic3mb )	/* (c) 1993 bootleg / Sega */
-	DRIVER( barek2mb )	/* (c) 1994 bootleg / Sega */
-	DRIVER( barek3mba )	/* (c) 1994 bootleg / Sega */
-	DRIVER( twinktmb )	/* (c) 1993 bootleg / Sega */
-	DRIVER( jparkmb )	/* (c) 1993 bootleg / Sega */
-	DRIVER( barekch )	/* (c) 1994 bootleg */
-	DRIVER( bk3ssrmb )	/* (c) 1994 bootleg / Sega */
-	DRIVER( srssf2mb )	/* (c) 1994 bootleg / Sega */
-	DRIVER( biohzdmb )	/* (c) 1995 bootleg / Sega */
-	DRIVER( mk3mdb )	/* (c) 1996 bootleg / Midway */
-	DRIVER( ssf2mdb )	/* (c) 1994 bootleg / Capcom */
-	DRIVER( srmdb )		/* (c) 1993 bootleg / Konami */
-	DRIVER( barek3mb )	/* (c) 1994 bootleg / Sega */
-	DRIVER( barek2ch )	/* (c) 1994 bootleg */
+  DRIVER( barek3mb ) /* (c) 1994 bootleg / Sega */
+  DRIVER( aladmdb ) /*  (c) 1993 bootleg / Sega */
+  DRIVER( barek2ch ) /* (c) 1994 bootleg / Sega */
+  DRIVER( sonic2mb ) /* (c) 1993 bootleg / Sega */
+  DRIVER( sonic3mb ) /* (c) 1993 bootleg / Sega */
+  DRIVER( jparkmb )  /* (c) 1993 bootleg / Sega */
+  DRIVER( twinktmb )  /* (c) 1993 bootleg / Sega */

 	/* Sega MegaTech, the number shown ia on the label of the instruction rom */
 	DRIVER( mt_beast )	/* 01 */
@@ -3837,10 +3571,9 @@ BOMULEUL CHAJARA SEGA ST-V  1997/04/11
 	/* Sega MegaPlay */
 	DRIVER( mp_sonic )	/* 01 */
 	DRIVER( mp_gaxe2 )	/* 02 */
-	DRIVER( mp_gaxe2a )	/* 02 */
 	DRIVER( mp_gslam )  /* 03 */
 	DRIVER( mp_sor2 )   /* 03 */
-	DRIVER( mp_twcup )	/* 04 */
+	DRIVER( mp_twc )	/* 04 */
 	DRIVER( mp_soni2 )  /* 05 */
 	DRIVER( mp_bio )    /* 06 */
 	DRIVER( mp_shnb3 )  /* 07 */
@@ -4681,7 +4414,6 @@ BOMULEUL CHAJARA SEGA ST-V  1997/04/11
 	DRIVER( foodf )		/* 136020			(c) 1982 */	/* made by Gencomp */
 	DRIVER( foodf2 )	/* 136020			(c) 1982 */	/* made by Gencomp */
 	DRIVER( foodfc )	/* 136020			(c) 1982 */	/* made by Gencomp */
-  DRIVER( akkaarrh )
 	DRIVER( ccastles )	/* 136022			(c) 1983 */
 	DRIVER( ccastle3 )	/* 136022			(c) 1983 */
 	DRIVER( ccastle2 )	/* 136022			(c) 1983 */
@@ -5472,65 +5204,6 @@ BOMULEUL CHAJARA SEGA ST-V  1997/04/11
 	DRIVER( nzeroteamb )	/* New Zero Team (V33 SYSTEM TYPE_B hardware, Haoyunlai Trading Company license) */
 	DRIVER( zerotm2k )	/* Zero Team 2000 */

-	/* Seibu SPI / SYS386I games */
-	DRIVER( senkyu )	/* Senkyu (Japan, newer) */
-	DRIVER( senkyua )	/* Senkyu (Japan, earlier) */
-	DRIVER( batlball )	/* Battle Balls (Germany, newer) */
-	DRIVER( batlballo )	/* Battle Balls (Germany, earlier) */
-	DRIVER( batlballu )	/* Battle Balls (US) */
-	DRIVER( batlballa )	/* Battle Balls (Hong Kong) */
-	DRIVER( batlballe )	/* Battle Balls (Hong Kong, earlier) */
-	DRIVER( batlballpt )	/* Battle Balls (Portugal) */
-	DRIVER( viprp1 )	/* Viper Phase 1 (New Version, World) */
-	DRIVER( viprp1k )	/* Viper Phase 1 (New Version, Korea) */
-	DRIVER( viprp1u )	/* Viper Phase 1 (New Version, US set 1) */
-	DRIVER( viprp1ua )	/* Viper Phase 1 (New Version, US set 2) */
-	DRIVER( viprp1j )	/* Viper Phase 1 (New Version, Japan) */
-	DRIVER( viprp1s )	/* Viper Phase 1 (New Version, Switzerland) */
-	DRIVER( viprp1h )	/* Viper Phase 1 (New Version, Holland) */
-	DRIVER( viprp1t )	/* Viper Phase 1 (New Version, Germany) */
-	DRIVER( viprp1pt )	/* Viper Phase 1 (New Version, Portugal) */
-	DRIVER( viprp1ot )	/* Viper Phase 1 (Germany) */
-	DRIVER( viprp1oj )	/* Viper Phase 1 (Japan) */
-	DRIVER( viprp1hk )	/* Viper Phase 1 (Hong Kong) */
-	DRIVER( rdft )	/* Raiden Fighters (Germany) */
-	DRIVER( rdftj )	/* Raiden Fighters (Japan, earlier) */
-	DRIVER( rdftja )	/* Raiden Fighters (Japan, earliest) */
-	DRIVER( rdftu )	/* Raiden Fighters (US, earlier) */
-	DRIVER( rdftauge )	/* Raiden Fighters (Evaluation Software For Show, Germany) */
-	DRIVER( rdftua )	/* Raiden Fighters (US, newer) */
-	DRIVER( rdftjb )	/* Raiden Fighters (Japan, newer) */
-	DRIVER( rdftau )	/* Raiden Fighters (Australia) */
-	DRIVER( rdftam )	/* Raiden Fighters (Hong Kong) */
-	DRIVER( rdftadi )	/* Raiden Fighters (Korea, SUB4 cart) */
-	DRIVER( rdfta )	/* Raiden Fighters (Austria) */
-	DRIVER( rdftgb )	/* Raiden Fighters (Great Britain) */
-	DRIVER( rdftgr )	/* Raiden Fighters (Greece) */
-	DRIVER( rdftit )	/* Raiden Fighters (Italy) */
-	DRIVER( rdftadia )	/* Raiden Fighters (Korea, SUB2 cart) */
-	DRIVER( rdft2 )	/* Raiden Fighters 2 - Operation Hell Dive (Germany) */
-	DRIVER( rdft2j )	/* Raiden Fighters 2 - Operation Hell Dive (Japan set 1) */
-	DRIVER( rdft2a )	/* Raiden Fighters 2 - Operation Hell Dive (Hong Kong) */
-	DRIVER( rdft2s )	/* Raiden Fighters 2 - Operation Hell Dive (Switzerland) */
-	DRIVER( rdft2ja )	/* Raiden Fighters 2 - Operation Hell Dive (Japan set 2) */
-	DRIVER( rdft2aa )	/* Raiden Fighters 2 - Operation Hell Dive (Korea) */
-	DRIVER( rdft2it )	/* Raiden Fighters 2 - Operation Hell Dive (Italy) */
-	DRIVER( rdft2jb )	/* Raiden Fighters 2 - Operation Hell Dive (Japan set 3) */
-	DRIVER( rdft2jc )	/* Raiden Fighters 2 - Operation Hell Dive (Japan set 4) */
-	DRIVER( rdft2t )	/* Raiden Fighters 2 - Operation Hell Dive (Taiwan) */
-	DRIVER( rdft2u )	/* Raiden Fighters 2 - Operation Hell Dive (US) */
-	DRIVER( rfjet )	/* Raiden Fighters Jet (Germany) */
-	DRIVER( rfjetu )	/* Raiden Fighters Jet (US) */
-	DRIVER( rfjetj )	/* Raiden Fighters Jet (Japan) */
-	DRIVER( rfjeta )	/* Raiden Fighters Jet (Korea) */
-	DRIVER( rfjett )	/* Raiden Fighters Jet (Taiwan) */
-	DRIVER( rdfts )	/* Raiden Fighters (Taiwan, single board) */
-	DRIVER( rdft2us )	/* Raiden Fighters 2 - Operation Hell Dive (US, single board) */
-	DRIVER( rfjets )	/* Raiden Fighters Jet (US, single board) */
-	DRIVER( rfjetsa )	/* Raiden Fighters Jet (US, single board, test version?) */
-	DRIVER( rdft22kc )	/* Raiden Fighters 2 - Operation Hell Dive 2000 (China, SYS386I) */
-	DRIVER( rfjet2kc )	/* Raiden Fighters Jet 2000 (China, SYS386I) */
-
 /* Seibu STI System games:
 	Viper: Phase 1 					(c) 1995
 	Viper: Phase 1 (New version)	(c) 1996
@@ -5709,7 +5382,6 @@ BOMULEUL CHAJARA SEGA ST-V  1997/04/11
 	DRIVER( fromancr )	/* (c) 1995 Video System Co. (Japan) */
 	DRIVER( fromanc4 )	/* (c) 1998 Video System Co. (Japan) */
 	DRIVER( inufuku )	/* (c) 1998 Video System Co. (Japan) */
-	DRIVER( 3on3dunk )	/* (c) 1996 Video System Co. ( US ) */

 	/* Psikyo games */
 	DRIVER( samuraia )	/* (c) 1993 (World) */
@@ -5816,10 +5488,6 @@ BOMULEUL CHAJARA SEGA ST-V  1997/04/11

 	/* Kaneko games */
 	DRIVER( jumpkun )   /* (c) 1984 Kaneko */
-	DRIVER( hvyunit )	/* (c) 1988 Kaneko + Taito */
-	DRIVER( hvyunitj )	/* (c) 1988 Kaneko + Taito (Japan) */
-	DRIVER( hvyunitjo )	/* (c) 1988 Kaneko + Taito (Japan Older) */
-	DRIVER( hvyunitu )	/* (c) 1988 Kaneko + Taito (USA) */
  DRIVER( djboy )		  /* (c) 1989 Kaneko */
 	DRIVER( djboyj )	  /* (c) 1989 Kaneko */
 	DRIVER( airbustr )	/* (c) 1990 Kaneko + Namco */
@@ -6163,10 +5831,7 @@ Other Sun games

 	/* Fuuki FG-3 games */
 	DRIVER( asurabld )	/* (c) 1998 (Japan) */
-	DRIVER( asurabus )	/* (c) 2001 (USA) */
-	DRIVER( asurabusj )	/* (c) 2000 (Japan) */
-	DRIVER( asurabusja )	/* (c) 2000 (Japan) */
-	DRIVER( asurabusjr )	/* (c) 2000 (Japan) */
+	DRIVER( asurabus )	/* (c) 2000 (Japan) */

 	/* Unico games */
 	DRIVER( drgnmst )	/* (c) 1994 */
@@ -6941,12 +6606,4 @@ Other Sun games
 	DRIVER( roundup5 )
 	DRIVER( bigfight )
 	DRIVER( cyclwarr )
-
-  /* Tatsumi TX-1 / Buggy Boy */
-	DRIVER( tx1 )		/* (c) 1983 Tatsumi (Atari/Namco/Taito license) */
-	DRIVER( tx1jb )		/* (c) 1983 Tatsumi */
-	DRIVER( tx1jc )		/* (c) 1983 Tatsumi */
-	DRIVER( buggyboy )	/* (c) 1985 Tatsumi */
-	DRIVER( buggyboyb )	/* (c) 1986 Tatsumi */
-	DRIVER( buggyboyjr )	/* (c) 1986 Tatsumi */
 #endif	/* DRIVER_RECURSIVE */
@@ -70,7 +70,6 @@
 #include "palette.h"
 #include "cpuintrf.h"
 #include "cpuexec.h"
-#include "machine/random.h"
 #include "cpuint.h"
 #include "sndintrf.h"
 #include "input.h"
@@ -441,7 +440,7 @@ struct GameDriver
 #define GAME_NO_COCKTAIL            0x0100	/* screen flip support is missing */
 #define GAME_NO_SOUND               0x0200	/* sound is missing */
 #define GAME_IMPERFECT_SOUND        0x0400	/* sound is known to be wrong */
-#define GAME_DOESNT_SERIALIZE       0x0800	/* game can not be saved through serialization */
+#define GAME_DOESNT_SERIALIZE       0x0420	/* game can not be saved through serailization */
 #define NOT_A_DRIVER                0x4000	/* set by the fake "root" driver_0 and by "containers" */
                                            /* e.g. driver_neogeo. */

@@ -1873,7 +1873,7 @@ static READ_HANDLER( indianbt_r )
                case 0x5ffc:    return 0;
        }
        logerror("unknown port 0 read @ %x\n",activecpu_get_pc());
-        return mame_rand_int();
+        return rand();
 }

 static PORT_READ_START( indianbt_readport )
@@ -2241,15 +2241,6 @@ INPUT_PORTS_START( polaris )
 	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
 	PORT_DIPSETTING(    0x01, DEF_STR( Cocktail ) )
-
-	PORT_START		/* 4, read by POLARIS_ADJ_VR1 */
-	PORT_ADJUSTER( 80, "Sub Volume VR1" )
-
-	PORT_START		/* 5, read by POLARIS_ADJ_VR2 */
-	PORT_ADJUSTER( 70, "Sub Volume VR2" )
-
-	PORT_START		/* 6, read by POLARIS_ADJ_VR3 */
-	PORT_ADJUSTER( 90, "Sub Volume VR3" )
 INPUT_PORTS_END

 static MACHINE_DRIVER_START( polaris )
@@ -137,7 +137,7 @@ static WRITE_HANDLER( ace_characterram_w )

 static READ_HANDLER( unk_r )
 {
-	return mame_rand_int()&0xff;
+	return rand()&0xff;
 }


@@ -271,7 +271,7 @@ READ_HANDLER( devram_r )
 		   equal values */
 		case 0xff4:
 		{
-			return mame_rand_int();
+			return rand();
 		}	break;

 		default:	{ return devram[offset]; break;}
@@ -1,307 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
-/*
-    Atari Akka Arrh hardware
-*/
-
-#include "driver.h"
-#include "cpu/m6502/m6502.h"
-#include "sound/pokey.h"
-
-static UINT8 *akkaarrh_videoram;
-static UINT8 *akkaarrh_spriteram;
-static struct tilemap *akkaarrh_tilemap[4];
-static UINT8 video_mirror;
-static UINT8 earom[64];
-static UINT8 earom_address, earom_data, earom_control;
-
-static void get_tile_info(int tile_index)
-{
-	int attr = akkaarrh_videoram[tile_index + 0x400];
-	SET_TILE_INFO(0, akkaarrh_videoram[tile_index], attr & 15, TILE_FLIPYX(attr >> 6))
-}
-
-static VIDEO_START( akkaarrh )
-{
-	int i;
-	for (i = 0; i < 4; ++i)
-	{
-		akkaarrh_tilemap[i] = tilemap_create(get_tile_info, tilemap_scan_rows, TILEMAP_OPAQUE, 8, 8, 32, 30);
-		if (!akkaarrh_tilemap[i])
-			return 1;
-		tilemap_set_flip(akkaarrh_tilemap[i], ((i & 1) ? TILEMAP_FLIPX : 0) | ((i & 2) ? TILEMAP_FLIPY : 0));
-	}
-	return 0;
-}
-
-static VIDEO_UPDATE( akkaarrh )
-{
-	int i;
-	if (!(video_mirror & 1))
-		tilemap_draw(bitmap, cliprect, akkaarrh_tilemap[0], 0, 0);
-	else
-	{
-		/* Zoom uses reflected copies of the upper-left quadrant. */
-		for (i = 0; i < 4; ++i)
-		{
-			struct rectangle clip = *cliprect;
-			int left = (i & 1) * 128;
-			int top = (i >> 1) * 120;
-			if (clip.min_x < left) clip.min_x = left;
-			if (clip.max_x > left + 127) clip.max_x = left + 127;
-			if (clip.min_y < top) clip.min_y = top;
-			if (clip.max_y > top + 119) clip.max_y = top + 119;
-			if (clip.min_x <= clip.max_x && clip.min_y <= clip.max_y)
-				tilemap_draw(bitmap, &clip, akkaarrh_tilemap[i], 0, 0);
-		}
-	}
-	for (i = 0; i < 0x100; i += 4)
-		drawgfx(bitmap, Machine->gfx[1], akkaarrh_spriteram[i + 1], akkaarrh_spriteram[i] & 15,
-			0, 0, akkaarrh_spriteram[i + 3], 240 - akkaarrh_spriteram[i + 2], cliprect, TRANSPARENCY_PEN, 0);
-}
-
-static WRITE_HANDLER( akkaarrh_videoram_w )
-{
-	int i;
-	akkaarrh_videoram[offset] = data;
-	for (i = 0; i < 4; ++i)
-		tilemap_mark_tile_dirty(akkaarrh_tilemap[i], offset & 0x3ff);
-}
-
-static WRITE_HANDLER( akkaarrh_palette_w )
-{
-	paletteram[offset] = data;
-	palette_set_color(offset, pal3bit(data >> 5), pal2bit(data >> 3), pal3bit(data));
-}
-
-static WRITE_HANDLER( akkaarrh_irq_ack_w )
-{
-	cpu_set_irq_line(0, M6502_IRQ_LINE, CLEAR_LINE);
-}
-
-static WRITE_HANDLER( akkaarrh_mirror_w )
-{
-	video_mirror = data;
-}
-
-static WRITE_HANDLER( akkaarrh_output_w )
-{
-	int i;
-	if (!offset)
-	{
-		set_led_status(0, !(data & 8));
-		set_led_status(1, !(data & 4));
-		coin_counter_w(0, data & 1);
-		coin_counter_w(1, data & 2);
-	}
-	else
-		for (i = 0; i < 8; ++i)
-			set_led_status(2 + (offset - 1) * 8 + i, (data >> i) & 1);
-}
-
-static READ_HANDLER( akkaarrh_earom_r )
-{
-	return earom_data;
-}
-
-static WRITE_HANDLER( akkaarrh_earom_w )
-{
-	earom_address = offset & 63;
-	earom_data = data;
-}
-
-static void earom_update(void)
-{
-	if (!(earom_control & 2))
-	{
-		/* Programming only clears bits; an erase cycle must precede it. */
-		if (earom_control & 4)
-			earom[earom_address] = 0xff;
-		else
-			earom[earom_address] &= earom_data;
-	}
-}
-
-static WRITE_HANDLER( akkaarrh_earom_control_w )
-{
-	UINT8 old = earom_control;
-	earom_control = (old & 1) | ((data & 4) ? 0 : 2) | ((data & 2) ? 4 : 0) | (data & 8);
-	if ((earom_control & 8) && earom_control != old)
-		earom_update();
-	old = earom_control;
-	earom_control = (earom_control & ~1) | (data & 1);
-	/* Reads latch on the falling clock edge while chip select is active. */
-	if ((earom_control & 8) && (old & 1) && !(data & 1))
-	{
-		if (earom_control & 2)
-			earom_data = earom[earom_address];
-		earom_update();
-	}
-}
-
-static NVRAM_HANDLER( akkaarrh )
-{
-	if (read_or_write)
-		mame_fwrite(file, earom, sizeof(earom));
-	else if (file)
-		mame_fread(file, earom, sizeof(earom));
-	else
-		memset(earom, 0xff, sizeof(earom));
-}
-
-static MEMORY_READ_START( akkaarrh_readmem )
-  { 0x0000, 0x07ff, MRA_RAM },
-	{ 0x1000, 0x10ff, MRA_RAM },
-	{ 0x2000, 0x27ff, MRA_RAM },
-	{ 0x3000, 0x30ff, MRA_RAM },
-	{ 0x7010, 0x701f, pokey1_r },
-	{ 0x7020, 0x702f, pokey2_r },
-	{ 0x7040, 0x707f, MRA_NOP },
-	{ 0x7080, 0x7080, input_port_0_r },
-	{ 0x7081, 0x7081, input_port_1_r },
-	{ 0x7082, 0x7082, input_port_2_r },
-	{ 0x7083, 0x7083, input_port_3_r },
-	{ 0x7087, 0x7087, akkaarrh_earom_r },
-	{ 0x8000, 0xffff, MRA_ROM },
-MEMORY_END
-
-static MEMORY_WRITE_START( akkaarrh_writemem )
-	{ 0x0000, 0x07ff, MWA_RAM },
-	{ 0x1000, 0x10ff, MWA_RAM, &akkaarrh_spriteram },
-	{ 0x2000, 0x27ff, akkaarrh_videoram_w, &akkaarrh_videoram },
-	{ 0x3000, 0x30ff, akkaarrh_palette_w, &paletteram },
-	{ 0x4000, 0x4000, akkaarrh_irq_ack_w },
-	{ 0x5000, 0x5000, watchdog_reset_w },
-	{ 0x6000, 0x6000, akkaarrh_mirror_w },
-	{ 0x7010, 0x701f, pokey1_w },
-	{ 0x7020, 0x702f, pokey2_w },
-	{ 0x7040, 0x707f, akkaarrh_earom_w },
-	{ 0x70c0, 0x70c3, akkaarrh_output_w },
-	{ 0x70c7, 0x70c7, akkaarrh_earom_control_w },
-	{ 0x8000, 0xffff, MWA_ROM },
-MEMORY_END
-
-INPUT_PORTS_START( akkaarrh )
-	PORT_START
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) //Zoom
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) //Fire
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) //Power blaster
-	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START
-	PORT_ANALOG( 0x0f, 0x00, IPT_TRACKBALL_X | IPF_REVERSE, 30, 20, 0, 0)
-	PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START
-	PORT_ANALOG( 0x0f, 0x00, IPT_TRACKBALL_Y, 30, 20, 0, 0)
-	PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
-INPUT_PORTS_END
-
-static struct GfxLayout tile_layout =
-{
-	8, 8, RGN_FRAC(1,4), 4,
-	{ RGN_FRAC(3,4), RGN_FRAC(2,4), RGN_FRAC(1,4), RGN_FRAC(0,4) },
-	{ 0,1,2,3,4,5,6,7 },
-	{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8 },
-	8*8
-};
-
-static struct GfxLayout sprite_layout =
-{
-	16, 16, RGN_FRAC(1,4), 4,
-	{ RGN_FRAC(3,4), RGN_FRAC(2,4), RGN_FRAC(1,4), RGN_FRAC(0,4) },
-	{ 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 },
-	{ 0*16,1*16,2*16,3*16,4*16,5*16,6*16,7*16,8*16,9*16,10*16,11*16,12*16,13*16,14*16,15*16 },
-	16*16
-};
-
-static struct GfxDecodeInfo gfxdecodeinfo[] =
-{
-	{ REGION_GFX1, 0, &tile_layout, 0, 16 },
-	{ REGION_GFX2, 0, &sprite_layout, 0, 16 },
-	{ -1 }
-};
-
-static struct POKEYinterface pokey_interface =
-{
-	2,	/* 2 chips */
-	1250000,	/* 125 MHz */
-	{ 50, 50 },
-	/* The 8 pot handlers */
-	{ 0, 0 },
-	{ 0, 0 },
-	{ 0, 0 },
-	{ 0, 0 },
-	{ 0, 0 },
-	{ 0, 0 },
-	{ 0, 0 },
-	{ 0, 0 },
-	/* The allpot handler */
-	{ 0, 0 },
-};
-
-static MACHINE_DRIVER_START( akkaarrh )
-	MDRV_CPU_ADD(M6502, 12096000/8)
-	MDRV_CPU_MEMORY(akkaarrh_readmem, akkaarrh_writemem)
-	/* The interrupt handler must sample VBLANK once per group of four IRQs. */
-	MDRV_CPU_VBLANK_INT(irq0_line_assert, 4)
-	
-	MDRV_FRAMES_PER_SECOND(60)
-	MDRV_VBLANK_DURATION((int)(1000000.0 * 22 / (60 * 262)))
-	
-	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
-	MDRV_SCREEN_SIZE(256, 262)
-	MDRV_VISIBLE_AREA(0, 255, 0, 239)
-	MDRV_GFXDECODE(gfxdecodeinfo)
-	MDRV_PALETTE_LENGTH(256)
-
-  MDRV_NVRAM_HANDLER(akkaarrh)
-	
-	MDRV_VIDEO_START(akkaarrh)
-	MDRV_VIDEO_UPDATE(akkaarrh)
-	
-	/* sound hardware */
-	MDRV_SOUND_ADD(POKEY, pokey_interface)
-MACHINE_DRIVER_END
-
-ROM_START( akkaarrh )
-	 ROM_REGION( 0x10000, REGION_CPU1, 0 )
-	 ROM_LOAD( "akka_8000.p1",  0x8000, 0x1000, CRC(578bb162) SHA1(f003d9a63e397c377e4738ca31a637da1da2cbdb) )
-	 ROM_LOAD( "akka_9000.m1",  0x9000, 0x1000, CRC(837fa612) SHA1(2a2ccbf879fd9cfc0342e6c5bbcd23962bdbbcde) )
-	 ROM_LOAD( "akka_a000.l1",  0xa000, 0x1000, CRC(13c769e9) SHA1(8e6c7b21fa555850ba8d00abbb4516e483964b5d) )
-	 ROM_LOAD( "akka_b000.j1",  0xb000, 0x1000, CRC(35c04f28) SHA1(71ad7eaf5bf96c1a0a321f1b04706afd40d9757f) )
-	 ROM_LOAD( "akka_c000.h1",  0xc000, 0x1000, CRC(17e85ac4) SHA1(bd010060eaf8fbf27176d4fdec241ee3b42aece8) )
-	 ROM_LOAD( "akka_d000.e1",  0xd000, 0x1000, CRC(03fb4143) SHA1(3a2106d7322139b9924566133d084bb7c5d769bc) )
-	 ROM_LOAD( "akka_e000.f1",  0xe000, 0x1000, CRC(8d3e671c) SHA1(c99d92c4afaa1ba043520b98d925f83490e49f0a) )
-	 ROM_RELOAD(                0xf000, 0x1000 )
-
-	 ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
-	 ROM_LOAD( "akka_pf0.l6",  0x0000, 0x0800, CRC(5c10b63e) SHA1(27ac6cebb3f6733cb830210f4723938ec2ddaafc) )
-	 ROM_LOAD( "akka_pf1.j6",  0x0800, 0x0800, CRC(636fd64c) SHA1(c2985332b8f32a8dd096fc081df12ae1a132e6a3) )
-	 ROM_LOAD( "akka_pf2.p6",  0x1000, 0x0800, CRC(a5f25d69) SHA1(8f5af774db3ed3969c8c0a0b530ea62198830e3d) )
-	 ROM_LOAD( "akka_pf3.m6",  0x1800, 0x0800, CRC(a3449469) SHA1(42f2ccf6ea02987bfb91ff1ca42684e9700f2f8f) )
-
-	 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
-	 ROM_LOAD( "akka_mo0.f11", 0x0000, 0x1000, CRC(71bd1bc6) SHA1(9c3d2c039c648834a7a0b98cd2dcbbbb88f74dd8) )
-	 ROM_LOAD( "akka_mo1.d11", 0x1000, 0x1000, CRC(a5ee8ecc) SHA1(d2a8c9791dca9157d9d20b8a4f6e760e6db35f05) )
-	 ROM_LOAD( "akka_mo2.a11", 0x2000, 0x1000, CRC(11cec4d9) SHA1(32ea614c25473aeb9a012a3980ad616592f6c3bb) )
-	 ROM_LOAD( "akka_mo3.b11", 0x3000, 0x1000, CRC(adcf6a36) SHA1(0555a252ba39400d2c533add6ac492926674d6ad) )
-ROM_END
-
-GAME( 1982, akkaarrh, 0, akkaarrh, akkaarrh, 0, ROT0, "Atari", "Akka Arrh (prototype)" )
@@ -147,7 +147,6 @@ Stephh's notes (based on the games M68000 code and some tests) :
 #include "vidhrdw/generic.h"
 #include "cpu/m68000/m68000.h"
 #include "cpu/z80/z80.h"
-#include "cpu/i8051/i8051.h"

 #define LEGION_HACK	0

@@ -179,24 +178,6 @@ extern data16_t *terraf_text_videoram;

 extern data16_t *legion_cmd;
 extern struct tilemap *armedf_tx_tilemap;
-static UINT8 bigfghtr_sharedram[0x3a00];
-
-
-static READ_HANDLER( bigfghtr_mcu_movx_r )
-{
-	if ( offset >= 0x0600 && offset <= 0x3fff)
-		return bigfghtr_sharedram[offset-0x600];
-	else
-	printf("offset mcu_read: %x\n",offset-0x600);
-}  
- 
-static WRITE_HANDLER( bigfghtr_mcu_movx_w )
-{
-	if ( offset >= 0x0600  && offset <= 0x3fff)
-		bigfghtr_sharedram[offset-0x600] = data; 
-  else 
-		printf("unmapped offset mcu_write: %x\n",offset);
-}

 static WRITE16_HANDLER( io_w )
 {
@@ -433,113 +414,6 @@ static MEMORY_WRITE16_START( armedf_writemem )
 MEMORY_END


-static READ16_HANDLER( bigfghtr_sharedram_r )
-{
-	return (bigfghtr_sharedram[offset * 2] << 8) | bigfghtr_sharedram[offset * 2 + 1];
-}
-
-static WRITE16_HANDLER( bigfghtr_sharedram_w )
-{
-
-	if (ACCESSING_MSB)
-		bigfghtr_sharedram[offset * 2] = data >> 8;
-	if (ACCESSING_LSB)
-		bigfghtr_sharedram[offset * 2 + 1] = data;
-}
-
-static READ_HANDLER( bigfghtr_mcu_sharedram_r )
-{
-	return bigfghtr_sharedram[offset];
-}
-
-static WRITE_HANDLER( bigfghtr_mcu_sharedram_w )
-{
-	bigfghtr_sharedram[offset] = data;
-}
-
-static READ_HANDLER( bigfghtr_mcu_p1_r )
-{
-	return 0xdf;
-}
-
-static READ16_HANDLER( bigfghtr_latch_r )
-{
-	cpu_set_irq_line(2, I8051_INT0_LINE, CLEAR_LINE);
-	cpu_set_irq_line(2, I8051_INT0_LINE, ASSERT_LINE);
-	return 0;
-}
-
-static WRITE16_HANDLER( bigfghtr_irq_ack_w )
-{
-	cpu_set_irq_line(0, 1, CLEAR_LINE);
-}
-
-static INTERRUPT_GEN( bigfghtr_interrupt )
-{
-	cpu_set_irq_line(0, 1, ASSERT_LINE);
-}
-
-static MACHINE_INIT( bigfghtr )
-{
-	memset(bigfghtr_sharedram, 0, sizeof(bigfghtr_sharedram));
-	armedf_vreg = 0;
-	cpu_set_irq_line(2, I8051_INT0_LINE, CLEAR_LINE);
-}
-
-static MEMORY_READ16_START( bigfghtr_readmem )
-  { 0x000000, 0x07ffff, MRA16_ROM },
-	{ 0x080000, 0x0805ff, MRA16_RAM },
-	{ 0x080600, 0x083fff, bigfghtr_sharedram_r },
-	{ 0x084000, 0x085fff, MRA16_RAM },
-	{ 0x086000, 0x086fff, MRA16_RAM },
-	{ 0x087000, 0x087fff, MRA16_RAM },
-	{ 0x088000, 0x089fff, MRA16_RAM },
-	{ 0x08a000, 0x08afff, MRA16_RAM },
-	{ 0x08b000, 0x08bfff, MRA16_RAM },
-	{ 0x08c000, 0x08c001, input_port_0_word_r },
-	{ 0x08c002, 0x08c003, input_port_1_word_r },
-	{ 0x08c004, 0x08c005, input_port_2_word_r },
-	{ 0x08c006, 0x08c007, input_port_3_word_r },
-	{ 0x400000, 0x400001, bigfghtr_latch_r },
-MEMORY_END
-
-static MEMORY_WRITE16_START( bigfghtr_writemem )
-  { 0x000000, 0x07ffff, MWA16_ROM },
-	{ 0x080000, 0x0805ff, MWA16_RAM, &spriteram16, &spriteram_size },
-	{ 0x080600, 0x083fff, bigfghtr_sharedram_w },
-	{ 0x084000, 0x085fff, MWA16_RAM },
-	{ 0x086000, 0x086fff, armedf_bg_videoram_w, &armedf_bg_videoram },
-	{ 0x087000, 0x087fff, armedf_fg_videoram_w, &armedf_fg_videoram },
-	{ 0x088000, 0x089fff, armedf_text_videoram_w, &terraf_text_videoram },
-	{ 0x08a000, 0x08afff, paletteram16_xxxxRRRRGGGGBBBB_word_w, &paletteram16 },
-	{ 0x08b000, 0x08bfff, MWA16_RAM, &spr_pal_clut },
-	{ 0x08d000, 0x08d001, terraf_io_w },
-	{ 0x08d002, 0x08d003, armedf_bg_scrollx_w },
-	{ 0x08d004, 0x08d005, armedf_bg_scrolly_w },
-	{ 0x08d006, 0x08d007, armedf_fg_scrollx_w },
-	{ 0x08d008, 0x08d009, armedf_fg_scrolly_w },
-	{ 0x08d00a, 0x08d00b, sound_command_w },
-	{ 0x08d00c, 0x08d00d, MWA16_NOP },
-	{ 0x08d00e, 0x08d00f, bigfghtr_irq_ack_w },
-MEMORY_END
-
-static MEMORY_READ_START( bigfghtr_mcu_readmem )
-   { 0x0000, 0x0fff, MRA_ROM },
-	 { 0x0600, 0x3fff, bigfghtr_mcu_sharedram_r },
-MEMORY_END
-
-static MEMORY_WRITE_START( bigfghtr_mcu_writemem )
-     { 0x0000, 0x0fff, MWA_ROM },
-     { 0x0600, 0x3fff, bigfghtr_mcu_sharedram_w },
-MEMORY_END
-
-static PORT_READ_START( bigfghtr_mcu_readport )
-     { I8051_P1, I8051_P1, bigfghtr_mcu_p1_r },
-PORT_END
-static PORT_WRITE_START( bigfghtr_mcu_writeport )
-     { I8051_P1, I8051_P3, MWA_NOP },
-PORT_END
-
 static MEMORY_READ_START( soundreadmem )
 	{ 0x0000, 0xf7ff, MRA_ROM },
 	{ 0xf800, 0xffff, MRA_RAM },
@@ -918,83 +792,6 @@ INPUT_PORTS_START( armedf )
 INPUT_PORTS_END


-INPUT_PORTS_START( bigfghtr )
-	PORT_START
-	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1)
-	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1)
-	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1)
-	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1)
-	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1)
-	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1)
-	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1)
-	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
-	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_START2 )
-	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN1 )
-	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN2 )
-	PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START
-	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2)
-	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2)
-	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2)
-	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2)
-	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2)
-	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2)
-	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2)
-	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_SERVICE1 )
-	PORT_SERVICE( 0x0200, IP_ACTIVE_LOW )
-	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0xf800, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START
-	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
-	PORT_DIPSETTING(    0x03, "3" )
-	PORT_DIPSETTING(    0x02, "4" )
-	PORT_DIPSETTING(    0x01, "5" )
-	PORT_DIPSETTING(    0x00, "6" )
-	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
-	PORT_DIPSETTING(    0x0c, "80k then every 80k" )
-	PORT_DIPSETTING(    0x04, "80k then every 100k" )
-	PORT_DIPSETTING(    0x08, "100k then every 80k" )
-	PORT_DIPSETTING(    0x00, "100k then every 100k" )
-	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) )
-	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
-	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
-	PORT_DIPSETTING(    0x20, DEF_STR( Cocktail ) )
-	PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) )
-	PORT_DIPSETTING(    0xc0, "Easy" )
-	PORT_DIPSETTING(    0x80, "Normal" )
-	PORT_DIPSETTING(    0x40, "Hard" )
-	PORT_DIPSETTING(    0x00, "Hardest" )
-
-	PORT_START
-	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
-	PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
-	PORT_DIPSETTING(    0x03, DEF_STR( 1C_1C ) )
-	PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
-	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )
-	PORT_DIPSETTING(    0x04, DEF_STR( 2C_1C ) )
-	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_1C ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( 2C_3C ) )
-	PORT_DIPSETTING(    0x08, DEF_STR( 1C_2C ) )
-	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
-	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x20, 0x20, "Debug 2 (requires Debug On) (P2 Start skip stage, Invulnerability)" )
-	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) )
-	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_DIPNAME( 0x80, 0x80, "Debug (P1 Start to pause)" )
-	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-INPUT_PORTS_END

 static struct GfxLayout char_layout =
 {
@@ -1042,14 +839,7 @@ static struct GfxDecodeInfo gfxdecodeinfo[] =
 	{ -1 } /* end of array */
 };

-static struct GfxDecodeInfo bigfghtr_gfxdecodeinfo[] =
-{
-	{ REGION_GFX1, 0, &char_layout, 0 * 16, 32 },
-	{ REGION_GFX2, 0, &tile_layout, 64 * 16, 32 },
-	{ REGION_GFX3, 0, &tile_layout, 96 * 16, 32 },
-	{ REGION_GFX4, 0, &tile_layout, 32 * 16, 32 },
-	{ -1 }
-};
+

 static struct YM3812interface ym3812_interface =
 {
@@ -1058,13 +848,6 @@ static struct YM3812interface ym3812_interface =
 	{ 50 }         /* (not supported) */
 };

-static struct YM3812interface bigfghtr_ym3812_interface =
-{
-	1,				/* 1 chip (no more supported) */
-	24000000/6,        /* 4 MHz */
-	{ 50 }         /* (not supported) */
-};
-
 static struct DACinterface dac_interface =
 {
 	2,	/* 2 channels */
@@ -1078,38 +861,6 @@ static struct DACinterface cclimbr2_dac_interface =
 };


-static MACHINE_DRIVER_START( bigfghtr )
-	MDRV_CPU_ADD(M68000, 16000000/2)
-	MDRV_CPU_MEMORY(bigfghtr_readmem, bigfghtr_writemem)
-	MDRV_CPU_VBLANK_INT(bigfghtr_interrupt, 1)
-
-	MDRV_CPU_ADD(Z80, 24000000/6)
-	MDRV_CPU_MEMORY(soundreadmem, soundwritemem)
-	MDRV_CPU_PORTS(readport, writeport)
-	MDRV_CPU_PERIODIC_INT(irq0_line_hold, (8000000/2/512))
-
-	MDRV_CPU_ADD(I8751, 16000000/2/I8051_CLOCK_DIVIDER)
-	MDRV_CPU_MEMORY(bigfghtr_mcu_readmem, bigfghtr_mcu_writemem)
-	MDRV_CPU_PORTS(bigfghtr_mcu_readport, bigfghtr_mcu_writeport)
-
-	MDRV_FRAMES_PER_SECOND(8000000.0 / (531 * 254))
-	MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
-	MDRV_INTERLEAVE(100)
-	MDRV_MACHINE_INIT(bigfghtr)
-
-	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_BUFFERS_SPRITERAM)
-	MDRV_SCREEN_SIZE(64 * 8, 32 * 8)
-	MDRV_VISIBLE_AREA(12 * 8, (64 - 12) * 8 - 1, 8, 247)
-	MDRV_GFXDECODE(bigfghtr_gfxdecodeinfo)
-	MDRV_PALETTE_LENGTH(2048)
-	MDRV_VIDEO_EOF(armedf)
-	MDRV_VIDEO_START(armedf)
-	MDRV_VIDEO_UPDATE(armedf)
-
-	/* sound hardware */
-	MDRV_SOUND_ADD(YM3812, bigfghtr_ym3812_interface)
-	MDRV_SOUND_ADD(DAC, dac_interface)
-MACHINE_DRIVER_END

 static MACHINE_DRIVER_START( terraf )

@@ -1521,71 +1272,6 @@ ROM_START( armedf )
 	ROM_LOAD( "af_12.rom", 0x20000, 0x20000, CRC(23cb6bfe) SHA1(34cb013827206bea71f5336b308ba92bee688506) )
 ROM_END

-ROM_START( skyrobo )
-	ROM_REGION( 0x80000, REGION_CPU1, 0 )
-	ROM_LOAD16_BYTE( "3", 0x00000, 0x20000, CRC(02d8ba9f) SHA1(7622cc17561e5d1c069341b5f412f732f901d4a8) )
-	ROM_LOAD16_BYTE( "1", 0x00001, 0x20000, CRC(fcfd9e2e) SHA1(c69b34653f04af8d488e323bc2db89656f76c332) )
-	ROM_LOAD16_BYTE( "4", 0x40000, 0x20000, CRC(37ced4b7) SHA1(9ded66f795d3c0886f48e52de632e6edb8c57e84) )
-	ROM_LOAD16_BYTE( "2", 0x40001, 0x20000, CRC(88d52f8e) SHA1(33b0d2b3cd38a13d8580694e7c50c059914eebe2) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "8.17k", 0x00000, 0x10000, CRC(0aeab61e) SHA1(165e0ad58542b65383fef714578da21f62df7b74) )
-
-	ROM_REGION( 0x10000, REGION_CPU3, 0 )
-
-	ROM_LOAD( "i8751.bin", 0x00000, 0x1000, BAD_DUMP CRC(64a0d225) SHA1(ccc5c33c0c412bf9e3a4f7de5e39b042e00c41dd) )
-
-	ROM_REGION( 0x08000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "7", 0x00000, 0x08000, CRC(f556ef28) SHA1(2acb83cdf23356091056f2cfbbc2b9828ee25b6f) )
-
-	ROM_REGION( 0x30000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "5.13f", 0x00000, 0x20000, CRC(d440a29f) SHA1(9e6ea7c9903e5e3e8e10ac7680c6120e1aa27250) )
-	ROM_LOAD( "6.15f", 0x20000, 0x10000, CRC(27469a76) SHA1(ebf2c60e1f70a589680c05adf10771ac2097b9d0) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE )
-	ROM_LOAD( "12.8a", 0x00000, 0x10000, CRC(a5694ea9) SHA1(ea94174495b3a65b3797932074a94df3b55fa0a2) )
-	ROM_LOAD( "11.6a", 0x10000, 0x10000, CRC(10b74e2c) SHA1(e3ec68726e7f277dc2043424f2e4d863eb01b3dc) )
-
-	ROM_REGION( 0x40000, REGION_GFX4, ROMREGION_DISPOSE )
-	ROM_LOAD16_BYTE( "9.8d",  0x00000, 0x20000, CRC(fe67800e) SHA1(0d3c4c3cb185270260fa691a97cddf082d6a056e) )
-	ROM_LOAD16_BYTE( "10.9d", 0x00001, 0x20000, CRC(dcb828c4) SHA1(607bc86580a6fe6e15e91131532b0eecd8b7a0cb) )
-
-	ROM_REGION( 0x0100, REGION_PROMS, 0 )
-	ROM_LOAD( "tf.13h", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) )
-ROM_END
-
-ROM_START( bigfghtr )
-	ROM_REGION( 0x80000, REGION_CPU1, 0 )
-	ROM_LOAD16_BYTE( "3.ic3", 0x00000, 0x20000, CRC(e1e1f291) SHA1(dbbd707be6250d9ffcba3fee265869b72f790e26) )
-	ROM_LOAD16_BYTE( "1.ic2", 0x00001, 0x20000, CRC(1100d991) SHA1(3c79398804b3a26b3df0c5734b270c37e1ba6a60) )
-	ROM_LOAD16_BYTE( "4.ic5", 0x40000, 0x20000, CRC(2464a83b) SHA1(00f5ac81bc33148daafeab757647b63894e0e0ca) )
-	ROM_LOAD16_BYTE( "2.ic4", 0x40001, 0x20000, CRC(b47bbcd5) SHA1(811bd4bc8fb662abf4734ab51e24c863d5cc3df3) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "8.17k", 0x00000, 0x10000, CRC(0aeab61e) SHA1(165e0ad58542b65383fef714578da21f62df7b74) )
-
-	ROM_REGION( 0x10000, REGION_CPU3, 0 )
-	ROM_LOAD( "i8751.bin", 0x00000, 0x1000,  CRC(64a0d225) SHA1(ccc5c33c0c412bf9e3a4f7de5e39b042e00c41dd) )
-
-	ROM_REGION( 0x08000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "7.11c", 0x00000, 0x08000, CRC(1809e79f) SHA1(730547771f803857acb552a84a8bc21bd3bda33f) )
-
-	ROM_REGION( 0x30000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "5.13f", 0x00000, 0x20000, CRC(d440a29f) SHA1(9e6ea7c9903e5e3e8e10ac7680c6120e1aa27250) )
-	ROM_LOAD( "6.15f", 0x20000, 0x10000, CRC(27469a76) SHA1(ebf2c60e1f70a589680c05adf10771ac2097b9d0) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE )
-	ROM_LOAD( "12.8a", 0x00000, 0x10000, CRC(a5694ea9) SHA1(ea94174495b3a65b3797932074a94df3b55fa0a2) )
-	ROM_LOAD( "11.6a", 0x10000, 0x10000, CRC(10b74e2c) SHA1(e3ec68726e7f277dc2043424f2e4d863eb01b3dc) )
-
-	ROM_REGION( 0x40000, REGION_GFX4, ROMREGION_DISPOSE )
-	ROM_LOAD16_BYTE( "9.8d",  0x00000, 0x20000, CRC(fe67800e) SHA1(0d3c4c3cb185270260fa691a97cddf082d6a056e) )
-	ROM_LOAD16_BYTE( "10.9d", 0x00001, 0x20000, CRC(dcb828c4) SHA1(607bc86580a6fe6e15e91131532b0eecd8b7a0cb) )
-
-	ROM_REGION( 0x0100, REGION_PROMS, 0 )
-	ROM_LOAD( "tf.13h", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) )
-ROM_END
-

 DRIVER_INIT( terraf )
 {
@@ -1602,12 +1288,6 @@ DRIVER_INIT( armedf )
 	armedf_setgfxtype(1);
 }

-DRIVER_INIT( bigfghtr )
-{
-	armedf_setgfxtype(1);
-	i8051_set_movx_handlers(2, bigfghtr_mcu_movx_r, bigfghtr_mcu_movx_w);
-}
-
 DRIVER_INIT( kodure )
 {
  data16_t *ROM = (data16_t *)memory_region(REGION_CPU1);
@@ -1661,5 +1341,3 @@ GAMEX( 1987, terrafu,  terraf, terraf,   terraf,   terrafu,  ROT0,   "Nichibutsu
 GAMEX( 1987, kodure,   0,      kodure,   kodure,   kodure,   ROT0,   "Nichibutsu", "Kodure Ookami (Japan)",  GAME_IMPERFECT_GRAPHICS | GAME_UNEMULATED_PROTECTION )
 GAMEX( 1988, cclimbr2, 0,      cclimbr2, cclimbr2, cclimbr2, ROT0,   "Nichibutsu", "Crazy Climber 2 (Japan)", GAME_IMPERFECT_GRAPHICS )
 GAMEX( 1988, armedf,   0,      armedf,   armedf,   armedf,   ROT270, "Nichibutsu", "Armed Formation", GAME_IMPERFECT_GRAPHICS )
-GAMEX( 1989, skyrobo,  0,      bigfghtr, bigfghtr, bigfghtr,   ROT0,   "Nichibutsu", "Sky Robo", GAME_IMPERFECT_GRAPHICS )
-GAMEX( 1989, bigfghtr, skyrobo,bigfghtr, bigfghtr, bigfghtr,   ROT0,   "Nichibutsu", "Tatakae! Big Fighter (Japan)", GAME_IMPERFECT_GRAPHICS )
@@ -650,9 +650,7 @@ INPUT_PORTS_START( llander1 )

 	/* The next one is a potentiometer */
 	PORT_START /* IN3 */
-	//PORT_ANALOGX( 0xff, 0x00, IPT_PADDLE_V|IPF_REVERSE, 100, 10, 0, 255, KEYCODE_UP, KEYCODE_DOWN, JOYCODE_1_UP, JOYCODE_1_DOWN )
-	PORT_ANALOG( 0xff, 0x00, IPT_PADDLE_V| IPF_REVERSE , 100, 10, 0, 255 )
-
+	PORT_ANALOGX( 0xff, 0x00, IPT_PADDLE|IPF_REVERSE, 100, 10, 0, 255, KEYCODE_UP, KEYCODE_DOWN, JOYCODE_1_UP, JOYCODE_1_DOWN )
 INPUT_PORTS_END


@@ -63,7 +63,6 @@ OUT:
 ****************************************************************************/

 #include "driver.h"
-#include "state.h"
 #include "vidhrdw/generic.h"

 extern unsigned char *wow_videoram;
@@ -156,8 +155,8 @@ static WRITE_HANDLER( seawolf2_sound_2_w )  /* Port 41 */
 	sample_set_volume(9, (data & 0x80) ? 100 : 0);

 	/* dive panning controlled by low 3 bits */
-	sample_set_volume(2, (~data & 0x07) * 100 / 7);
-	sample_set_volume(7, (data & 0x07) * 100 / 7);
+	sample_set_volume(2, (float)(~data & 0x07) / 70);
+	sample_set_volume(7, (float)(data & 0x07) / 70);

 	if (rising_bits & 0x08)
 	{
@@ -664,14 +663,14 @@ static struct astrocade_interface astrocade_2chip_interface =
 {
 	2,			/* Number of chips */
 	1789773,	/* Clock speed */
-	{25,25}			/* Volume */
+	{255,255}			/* Volume */
 };

 static struct astrocade_interface astrocade_1chip_interface =
 {
 	1,			/* Number of chips */
 	1789773,	/* Clock speed */
-	{25}			/* Volume */
+	{255}			/* Volume */
 };

 static struct CustomSound_interface gorf_custom_interface =
@@ -981,9 +980,6 @@ ROM_END

 static DRIVER_INIT( seawolf2 )
 {
-	state_save_register_UINT8("seawolf2", 0, "port_1_last", &port_1_last, 1);
-	state_save_register_UINT8("seawolf2", 0, "port_2_last", &port_2_last, 1);
-
 	install_port_read_handler(0, 0x10, 0x10, seawolf2_controller2_r);
 	install_port_read_handler(0, 0x11, 0x11, seawolf2_controller1_r);
 }
@@ -1146,7 +1146,7 @@ static READ32_HANDLER( atarigx2_protection_r )
 		if (lookup_table[i][0] == 0xffffffff)
 		{
 			if (last_write_offset*2 >= 0x700 && last_write_offset*2 < 0x720)
-				result = mame_rand_int() << 16;
+				result = rand() << 16;
 			else
 				result = 0xffff << 16;
 			log_cb(RETRO_LOG_DEBUG, LOGPRE "%06X:Unhandled protection R@%04X = %04X\n", activecpu_get_previouspc(), offset, result);
@@ -23,7 +23,6 @@
 #include "driver.h"
 #include "vidhrdw/generic.h"
 #include "cpu/h6280/h6280.h"
-#include "state.h"

 VIDEO_UPDATE( battlera );
 VIDEO_START( battlera );
@@ -108,10 +107,11 @@ static WRITE_HANDLER( YM2203_w )
 }

 static int msm5205next;
-static int toggle;

 static void battlera_adpcm_int(int data)
 {
+	static int toggle;
+
 	MSM5205_data_w(0,msm5205next >> 4);
 	msm5205next<<=4;

@@ -368,14 +368,5 @@ ROM_END

 /******************************************************************************/

-static DRIVER_INIT( battlera )
-{
-	state_save_register_int("battlera", 0, "control_port_select", &control_port_select);
-	state_save_register_int("battlera", 0, "msm5205next", &msm5205next);
-	state_save_register_int("battlera", 0, "adpcm_toggle", &toggle);
-}
-
-/******************************************************************************/
-
-GAMEX( 1988, battlera, 0,        battlera, battlera,  battlera, ROT0, "Data East Corporation", "Battle Rangers (World)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )
-GAMEX( 1988, bldwolf,  battlera, battlera, battlera,  battlera, ROT0, "Data East USA", "Bloody Wolf (US)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )
+GAMEX( 1988, battlera, 0,        battlera, battlera,  0,   ROT0, "Data East Corporation", "Battle Rangers (World)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )
+GAMEX( 1988, bldwolf,  battlera, battlera, battlera,  0,   ROT0, "Data East USA", "Bloody Wolf (US)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )
@@ -86,7 +86,7 @@ static WRITE16_HANDLER( blmbycar_pot_wheel_shift_w )
 static READ16_HANDLER( blmbycar_pot_wheel_r )
 {
 	return	((pot_wheel & 0x80) ? 0x04 : 0) |
-			(mame_rand_int() & 0x08);
+			(rand() & 0x08);
 }


@@ -138,7 +138,6 @@ CPU 3
 #include "driver.h"
 #include "vidhrdw/generic.h"
 #include "cpu/m6805/m6805.h"
-#include "state.h"

 static int ddr1, ddr2, ddr3, ddr4;
 static int port1_in, port2_in, port3_in, port4_in;
@@ -171,26 +170,6 @@ WRITE_HANDLER( bublbobl_sh_nmi_disable_w );
 WRITE_HANDLER( bublbobl_sh_nmi_enable_w );


-void bublbobl_save_state(void);
-
-/* save states: the M6801 ports here, the rest in machine/bublbobl_machine.c */
-static void bublbobl_register_state(void)
-{
-	bublbobl_save_state();
-	state_save_register_int("bublbobl", 0, "ddr1", &ddr1);
-	state_save_register_int("bublbobl", 0, "ddr2", &ddr2);
-	state_save_register_int("bublbobl", 0, "ddr3", &ddr3);
-	state_save_register_int("bublbobl", 0, "ddr4", &ddr4);
-	state_save_register_int("bublbobl", 0, "port1_in", &port1_in);
-	state_save_register_int("bublbobl", 0, "port2_in", &port2_in);
-	state_save_register_int("bublbobl", 0, "port3_in", &port3_in);
-	state_save_register_int("bublbobl", 0, "port4_in", &port4_in);
-	state_save_register_int("bublbobl", 0, "port1_out", &port1_out);
-	state_save_register_int("bublbobl", 0, "port2_out", &port2_out);
-	state_save_register_int("bublbobl", 0, "port3_out", &port3_out);
-	state_save_register_int("bublbobl", 0, "port4_out", &port4_out);
-}
-
 READ_HANDLER( bublbobl_mcu_ddr1_r )
 {
 	return ddr1;
@@ -323,24 +302,6 @@ static unsigned char portA_in,portA_out,ddrA;
 static unsigned char portB_in,portB_out,ddrB;
 static unsigned char portC_in,portC_out,ddrC;

-static void tokio_register_state(void)
-{
-	bublbobl_save_state();
-	state_save_register_UINT8("tokio", 0, "from_main", &from_main, 1);
-	state_save_register_UINT8("tokio", 0, "from_mcu", &from_mcu, 1);
-	state_save_register_int  ("tokio", 0, "mcu_sent", &mcu_sent);
-	state_save_register_int  ("tokio", 0, "main_sent", &main_sent);
-	state_save_register_UINT8("tokio", 0, "portA_in", &portA_in, 1);
-	state_save_register_UINT8("tokio", 0, "portA_out", &portA_out, 1);
-	state_save_register_UINT8("tokio", 0, "ddrA", &ddrA, 1);
-	state_save_register_UINT8("tokio", 0, "portB_in", &portB_in, 1);
-	state_save_register_UINT8("tokio", 0, "portB_out", &portB_out, 1);
-	state_save_register_UINT8("tokio", 0, "ddrB", &ddrB, 1);
-	state_save_register_UINT8("tokio", 0, "portC_in", &portC_in, 1);
-	state_save_register_UINT8("tokio", 0, "portC_out", &portC_out, 1);
-	state_save_register_UINT8("tokio", 0, "ddrC", &ddrC, 1);
-}
-
 READ_HANDLER( tokio_68705_portA_r )
 {
 	return (portA_out & ddrA) | (portA_in & ~ddrA);
@@ -1759,7 +1720,6 @@ static DRIVER_INIT( bublbobl )
 	memcpy(ROM+0x08000,ROM+0x10000,0x4000);

 	bublbobl_video_enable = 1;
-	bublbobl_register_state();
 }

 static DRIVER_INIT( boblbobl )
@@ -1785,7 +1745,7 @@ static DRIVER_INIT( tokio )

 	/* preemptively enable video, the bit is not mapped for this game and */
 	/* I don't know if it even has it. */
-	bublbobl_video_enable = 1;	tokio_register_state();
+	bublbobl_video_enable = 1;
 }


@@ -345,7 +345,7 @@ static INTERRUPT_GEN( ripcord_interrupt )
 static struct DACinterface dac_interface =
 {
 	1,
-	{ 25, 25 }
+	{ 255, 255 }
 };

 static MACHINE_DRIVER_START( circus )
@@ -127,13 +127,14 @@ extern VIDEO_START( cps2 );
 extern int scanline1;
 extern int scanline2;
 extern int scancalls;
-extern int scancount;
 void cps2_objram_latch(void);
 void cps2_set_sprite_priorities(void);


 static INTERRUPT_GEN( cps2_interrupt )
 {
+	static int scancount;
+
 	/* 2 is vblank, 4 is some sort of scanline interrupt, 6 is both at the same time. */

 	if(scancount >= 261)
@@ -1389,9 +1390,9 @@ static int cps2turbo_music_start(int side, int tune)
 		return 0;
 	}
 	if (side)
-		sample_set_stereo_volume(1, 0, 100);
+		sample_set_stereo_volume(1, 0, 255);
 	else
-		sample_set_stereo_volume(0, 100, 0);
+		sample_set_stereo_volume(0, 255, 0);
 	return 1;
 }

@@ -88,7 +88,7 @@ static WRITE_HANDLER( ddrible_coin_counter_w )

 static READ_HANDLER( ddrible_vlm5030_busy_r )
 {
-	return mame_rand_int(); /* patch */
+	return rand(); /* patch */
 	if (VLM5030_BSY()) return 1;
 	else return 0;
 }
@@ -263,7 +263,7 @@ static READ32_HANDLER( lockload_gun_mirror_r )
 /*logerror("%08x:Read gun %d\n",activecpu_get_pc(),offset);*/
 /*return ((rand()%0xffff)<<16) | rand()%0xffff;*/
 	if (offset) /* Mirror of player 1 and player 2 fire buttons */
-		return readinputport(5) | ((mame_rand_int()%0xff)<<16);
+		return readinputport(5) | ((rand()%0xff)<<16);
 	return readinputport(4) | readinputport(6) | (readinputport(6)<<16) | (readinputport(6)<<24); /*((rand()%0xff)<<16);*/
 }

@@ -731,7 +731,7 @@ MEMORY_END

 READ32_HANDLER( dragngun_unk_video_r)
 {
-	return mame_rand_int();
+	return rand();
 }

 READ32_HANDLER( dragngun_gfxrom_r ) /* trampoline */
@@ -121,7 +121,7 @@ static READ32_HANDLER( avengrs_control_r )

 static READ32_HANDLER(test2_r)
 {
-	return mame_rand_int();
+	return rand();
 }

 static READ32_HANDLER(test3_r)
@@ -953,7 +953,7 @@ static struct YM2203interface ym2203_interface =
 {
 	1,
 	3000000, /* ? */
-	{ YM2203_VOL(25,25) },	/* gain,volume */
+	{ YM2203_VOL(0xff,0xff) },	/* gain,volume */
 	{ 0 },	/* port A read */
 	{ 0 }, /* port B read */
 	{ 0 }, /* port A write */
@@ -750,7 +750,7 @@ INPUT_PORTS_START( firetrk )
 	PORT_START
 	PORT_BITX(0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 | IPF_PLAYER1, "Horn", IP_KEY_DEFAULT, IP_JOY_DEFAULT)
 	PORT_START		/* 8 */
-	PORT_ADJUSTER( 80, "Motor Frequency" )
+	PORT_ADJUSTER( 85, "Motor Frequency" )
 INPUT_PORTS_END


@@ -816,7 +816,7 @@ INPUT_PORTS_START( superbug )
 	PORT_BITX(0x04, IP_ACTIVE_HIGH, IPT_BUTTON4, "Gear 3", KEYCODE_C, IP_JOY_DEFAULT )
 	PORT_BITX(0x08, IP_ACTIVE_HIGH, IPT_BUTTON5, "Gear 4", KEYCODE_V, IP_JOY_DEFAULT )
 	PORT_START		/* 8 */
-	PORT_ADJUSTER( 80, "Motor Frequency" )
+	PORT_ADJUSTER( 85, "Motor Frequency" )
 INPUT_PORTS_END


@@ -893,10 +893,10 @@ INPUT_PORTS_START( montecar )
 	PORT_BITX(0x04, IP_ACTIVE_HIGH, IPT_BUTTON4, "Gear 3", KEYCODE_C, IP_JOY_DEFAULT )
 	PORT_BITX(0x08, IP_ACTIVE_HIGH, IPT_BUTTON5, "Gear 4", KEYCODE_V, IP_JOY_DEFAULT )
 	PORT_START		/* 8 */
-	PORT_ADJUSTER( 80, "Motor Frequency" )
+	PORT_ADJUSTER( 85, "Motor Frequency" )

 	PORT_START		/* 9 */
-	PORT_ADJUSTER( 75, "Drone Motor Frequency" )
+	PORT_ADJUSTER( 80, "Motor Frequency" )
 INPUT_PORTS_END


@@ -21,6 +21,8 @@ Year + Game
 --
 Notes so far:

+- Dips, need DIP sheet.
+
 - Raster Effects are imperfect, bad frames when lots of new sprites.

 - The scroll values are generally wrong when flip screen is on and rasters are often incorrect
@@ -86,7 +88,6 @@ FG-3J ROM-J 507KA0301P04       Rev:1.3
 ***************************************************************************/

 #include "driver.h"
-#include "state.h"
 #include "vidhrdw/generic.h"

 static int fuuki32_raster_enable = 1; /* Enabled by default */
@@ -319,149 +320,101 @@ PORT_END

 ***************************************************************************/

-/* inputs shared by Asura Blade and Asura Buster; the review build of
-   Asura Buster has a 4th button per player (P1 button 4 pauses the game) */
-#define FUUKI32_INPUTS( button4 ) \
-	PORT_START	/* IN0 - $800000.w/$800002.w*/ \
-	PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_COIN1    ) \
-	PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_COIN2    ) \
-	PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN  ) \
-	PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN  ) \
-	PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_START1   ) \
-	PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_START2   ) \
-	PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN  ) \
-	PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN  ) \
-	PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_SERVICE1 ) \
-	PORT_BIT(  0xfe00, IP_ACTIVE_LOW, IPT_UNKNOWN  ) \
- \
-	PORT_START	/* IN1 - $810000.w/$810002.w*/ \
-	PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0080, IP_ACTIVE_LOW, button4            | IPF_PLAYER1 ) \
-	PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER2 ) \
-	PORT_BIT(  0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER2 ) \
-	PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER2 ) \
-	PORT_BIT(  0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 ) \
-	PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER2 ) \
-	PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER2 ) \
-	PORT_BIT(  0x4000, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER2 ) \
-	PORT_BIT(  0x8000, IP_ACTIVE_LOW, button4            | IPF_PLAYER2 )
+INPUT_PORTS_START( asurabld )
+	PORT_START	/* IN0 - $800000.w/$800002.w*/
+	PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_COIN1    )
+	PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_COIN2    )
+	PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN  )
+	PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN  )
+	PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_START1   )
+	PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_START2   )
+	PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN  )
+	PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN  )
+	PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_SERVICE1 )
+	PORT_BIT(  0xfe00, IP_ACTIVE_LOW, IPT_UNKNOWN  )

-/* DSW1 bits 0-1 and 4-7 (SW1:1,2 and SW1:5-8); bits 2-3 are the
-   "Demo Sounds & Music" switch, different in each game */
-#define FUUKI32_DSW1_LOW \
-	PORT_START	/* IN2 - $880000.w/$880002.w*/ \
-	PORT_SERVICE( 0x0001, 0x0001 )                 /* SW1:1 */ \
-	PORT_DIPNAME( 0x0002, 0x0002, "Blood Colour" ) /* SW1:2 - Any other censorship? (Tested in 3 locations)*/ \
-	PORT_DIPSETTING(      0x0002, "Red" ) \
+	PORT_START	/* IN1 - $810000.w/$810002.w*/
+	PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER1 )
+	PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER1 )
+	PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER1 )
+	PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 )
+	PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER1 )
+	PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER1 )
+	PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER1 )
+	PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN                      )
+	PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER2 )
+	PORT_BIT(  0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER2 )
+	PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER2 )
+	PORT_BIT(  0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
+	PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER2 )
+	PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER2 )
+	PORT_BIT(  0x4000, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER2 )
+	PORT_BIT(  0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN                      )
+
+	PORT_START	/* IN2 - $880000.w/$880002.w*/
+	PORT_SERVICE( 0x0001, 0x0001 )
+	PORT_DIPNAME( 0x0002, 0x0002, "Blood Colour" ) /* Any other censorship? (Tested in 3 locations)*/
+	PORT_DIPSETTING(      0x0002, "Red" )
 	PORT_DIPSETTING(      0x0000, "Green" )
+	PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) /* Tested @ 0917AC*/
+	PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
+	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
+	PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) /* Tested @ 0917AC*/
+	PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
+	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
+	PORT_DIPNAME( 0x0030, 0x0030, "Timer" )
+	PORT_DIPSETTING(      0x0000, "Slow" )
+	PORT_DIPSETTING(      0x0030, "Medium" )
+	PORT_DIPSETTING(      0x0010, "Fast" )
+	PORT_DIPSETTING(      0x0020, "Very Fast" )
+	PORT_DIPNAME( 0x00c0, 0x0000, "Coinage Mode" )
+	PORT_DIPSETTING(      0x00c0, "Split" )
+	PORT_DIPSETTING(      0x0000, "Joint" )
+	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )

-#define FUUKI32_DSW1_HIGH \
-	PORT_DIPNAME( 0x0030, 0x0030, "Timer" )        /* SW1:5,6 */ \
-	PORT_DIPSETTING(      0x0000, "Slow" ) \
-	PORT_DIPSETTING(      0x0030, "Medium" ) \
-	PORT_DIPSETTING(      0x0010, "Fast" ) \
-	PORT_DIPSETTING(      0x0020, "Very Fast" ) \
-	PORT_DIPNAME( 0x00c0, 0x0000, "Coinage Mode" ) /* SW1:7,8 */ \
-	PORT_DIPSETTING(      0x00c0, "Split" ) \
-	PORT_DIPSETTING(      0x0000, "Joint" ) \
-	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )  /* SW2, not used by these games */
-
-/* the coin settings $0000 and $7000 are not listed: $0000 is 1 coin 1 credit,
-   or Free Play when both Coin A and Coin B are set to it; $7000 is shown as
-   "Error" in the service mode and causes graphics issues */
-#define FUUKI32_DSW2 \
-	PORT_START	/* IN3 - $890000.w/$890002.w*/ \
-	PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) ) /* SW3:1 */ \
-	PORT_DIPSETTING(      0x0001, DEF_STR( Off ) ) \
-	PORT_DIPSETTING(      0x0000, DEF_STR( On ) ) \
-	PORT_DIPNAME( 0x000e, 0x000e, "Difficulty" )   /* SW3:2,3,4 - AKA Computer Level, see @ 0917CC*/ \
-	PORT_DIPSETTING(      0x0000, "Easiest" )      /* Level 1 */ \
-	PORT_DIPSETTING(      0x0008, "Very Easy" )    /* Level 2 */ \
-	PORT_DIPSETTING(      0x0004, "Easier" )       /* Level 3 */ \
-	PORT_DIPSETTING(      0x000c, "Easy" )         /* Level 4 */ \
-	PORT_DIPSETTING(      0x000e, "Normal" )       /* Level 5 */ \
-	PORT_DIPSETTING(      0x0002, "Hard" )         /* Level 6 */ \
-	PORT_DIPSETTING(      0x000a, "Very Hard" )    /* Level 7 */ \
-	PORT_DIPSETTING(      0x0006, "Hardest" )      /* Level 8 */ \
-	PORT_DIPNAME( 0x0030, 0x0030, "Damage" )       /* SW3:5,6 */ \
-	PORT_DIPSETTING(      0x0020, "75%" ) \
-	PORT_DIPSETTING(      0x0030, "100%" ) \
-	PORT_DIPSETTING(      0x0010, "125%" ) \
-	PORT_DIPSETTING(      0x0000, "150%" ) \
-	PORT_DIPNAME( 0x00c0, 0x00c0, "Max Rounds" )   /* SW3:7,8 - $0040 is shown as "Error" in the service mode */ \
-	PORT_DIPSETTING(      0x0000, "1" ) \
-	PORT_DIPSETTING(      0x00c0, "3" ) \
-	PORT_DIPSETTING(      0x0080, "5" ) \
-	PORT_DIPNAME( 0xf000, 0xf000, DEF_STR( Coin_A ) ) /* SW4:1,2,3,4 - shown as Player 2 in the service mode */ \
-	PORT_DIPSETTING(      0x8000, DEF_STR( 8C_1C ) ) \
-	PORT_DIPSETTING(      0x9000, DEF_STR( 7C_1C ) ) \
-	PORT_DIPSETTING(      0xa000, DEF_STR( 6C_1C ) ) \
-	PORT_DIPSETTING(      0xb000, DEF_STR( 5C_1C ) ) \
-	PORT_DIPSETTING(      0xc000, DEF_STR( 4C_1C ) ) \
-	PORT_DIPSETTING(      0xd000, DEF_STR( 3C_1C ) ) \
-	PORT_DIPSETTING(      0xe000, DEF_STR( 2C_1C ) ) \
-	PORT_DIPSETTING(      0xf000, DEF_STR( 1C_1C ) ) \
-	PORT_DIPSETTING(      0x6000, DEF_STR( 1C_2C ) ) \
-	PORT_DIPSETTING(      0x5000, DEF_STR( 1C_3C ) ) \
-	PORT_DIPSETTING(      0x4000, DEF_STR( 1C_4C ) ) \
-	PORT_DIPSETTING(      0x3000, DEF_STR( 1C_5C ) ) \
-	PORT_DIPSETTING(      0x2000, "2C Start / 1C Continue" ) \
-	PORT_DIPSETTING(      0x0000, DEF_STR( Free_Play ) ) /* Set both for Free Play*/ \
-	PORT_DIPNAME( 0x0f00, 0x0f00, DEF_STR( Coin_B ) ) /* SW4:5,6,7,8 - shown as Player 1 in the service mode */ \
-	PORT_DIPSETTING(      0x0800, DEF_STR( 8C_1C ) ) \
-	PORT_DIPSETTING(      0x0900, DEF_STR( 7C_1C ) ) \
-	PORT_DIPSETTING(      0x0a00, DEF_STR( 6C_1C ) ) \
-	PORT_DIPSETTING(      0x0b00, DEF_STR( 5C_1C ) ) \
-	PORT_DIPSETTING(      0x0c00, DEF_STR( 4C_1C ) ) \
-	PORT_DIPSETTING(      0x0d00, DEF_STR( 3C_1C ) ) \
-	PORT_DIPSETTING(      0x0e00, DEF_STR( 2C_1C ) ) \
-	PORT_DIPSETTING(      0x0f00, DEF_STR( 1C_1C ) ) \
-	PORT_DIPSETTING(      0x0600, DEF_STR( 1C_2C ) ) \
-	PORT_DIPSETTING(      0x0500, DEF_STR( 1C_3C ) ) \
-	PORT_DIPSETTING(      0x0400, DEF_STR( 1C_4C ) ) \
-	PORT_DIPSETTING(      0x0300, DEF_STR( 1C_5C ) ) \
-	PORT_DIPSETTING(      0x0200, "2C Start / 1C Continue" ) \
+	PORT_START	/* IN3 - $890000.w/$890002.w*/
+	PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) )
+	PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
+	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
+	PORT_DIPNAME( 0x000e, 0x0000, "Computer Level" ) /* See @ 0917CC*/
+	PORT_DIPSETTING(      0x0000, "0" )
+	PORT_DIPSETTING(      0x0008, "1" )
+	PORT_DIPSETTING(      0x0004, "2" )
+	PORT_DIPSETTING(      0x000c, "3" )
+	PORT_DIPSETTING(      0x000e, "4" )
+	PORT_DIPSETTING(      0x0002, "5" )
+	PORT_DIPSETTING(      0x000a, "6" )
+	PORT_DIPSETTING(      0x0006, "7" )
+	PORT_DIPNAME( 0x0030, 0x0010, "Damage" )
+	PORT_DIPSETTING(      0x0020, "Lowest" )
+	PORT_DIPSETTING(      0x0030, "Low" )
+	PORT_DIPSETTING(      0x0010, "Medium" )
+	PORT_DIPSETTING(      0x0000, "High" )
+	PORT_DIPNAME( 0x00c0, 0x0040, "Max Rounds" )
+	PORT_DIPSETTING(      0x0000, "1" )
+	PORT_DIPSETTING(      0x0040, "3" )
+	PORT_DIPSETTING(      0x0080, "5" )
+	PORT_DIPNAME( 0xf000, 0xf000, DEF_STR( Coin_A ) )
+	PORT_DIPSETTING(      0x8000, DEF_STR( 8C_1C ) )
+	PORT_DIPSETTING(      0x9000, DEF_STR( 7C_1C ) )
+	PORT_DIPSETTING(      0xa000, DEF_STR( 6C_1C ) )
+	PORT_DIPSETTING(      0xb000, DEF_STR( 5C_1C ) )
+	PORT_DIPSETTING(      0xc000, DEF_STR( 4C_1C ) )
+	PORT_DIPSETTING(      0xd000, DEF_STR( 3C_1C ) )
+	PORT_DIPSETTING(      0xe000, DEF_STR( 2C_1C ) )
+	PORT_DIPSETTING(      0xf000, DEF_STR( 1C_1C ) )
+	PORT_DIPSETTING(      0x0000, DEF_STR( Free_Play ) ) /* Set both for Free Play*/
+	PORT_DIPNAME( 0x0f00, 0x0f00, DEF_STR( Coin_B ) )
+	PORT_DIPSETTING(      0x0800, DEF_STR( 8C_1C ) )
+	PORT_DIPSETTING(      0x0900, DEF_STR( 7C_1C ) )
+	PORT_DIPSETTING(      0x0a00, DEF_STR( 6C_1C ) )
+	PORT_DIPSETTING(      0x0b00, DEF_STR( 5C_1C ) )
+	PORT_DIPSETTING(      0x0c00, DEF_STR( 4C_1C ) )
+	PORT_DIPSETTING(      0x0d00, DEF_STR( 3C_1C ) )
+	PORT_DIPSETTING(      0x0e00, DEF_STR( 2C_1C ) )
+	PORT_DIPSETTING(      0x0f00, DEF_STR( 1C_1C ) )
 	PORT_DIPSETTING(      0x0000, DEF_STR( Free_Play ) ) /* Set both for Free Play*/

-INPUT_PORTS_START( asurabld )
-	FUUKI32_INPUTS( IPT_UNKNOWN )
-	FUUKI32_DSW1_LOW
-	PORT_DIPNAME( 0x000c, 0x000c, "Demo Sounds & Music" ) /* SW1:3,4 - Tested @ 0917AC*/
-	PORT_DIPSETTING(      0x000c, "Both On" )
-	PORT_DIPSETTING(      0x0008, "Music Off" )
-	PORT_DIPSETTING(      0x0004, "Both Off" )   /* $0000 is the same */
-	FUUKI32_DSW1_HIGH
-	FUUKI32_DSW2
-INPUT_PORTS_END
-
-INPUT_PORTS_START( asurabus )
-	FUUKI32_INPUTS( IPT_UNKNOWN )
-	FUUKI32_DSW1_LOW
-	PORT_DIPNAME( 0x000c, 0x000c, "Demo Sounds & Music" ) /* SW1:3,4 */
-	PORT_DIPSETTING(      0x000c, "Both On" )
-	PORT_DIPSETTING(      0x0008, "Sounds Off" )
-	PORT_DIPSETTING(      0x0004, "Music Off" )
-	PORT_DIPSETTING(      0x0000, "Both Off" )
-	FUUKI32_DSW1_HIGH
-	FUUKI32_DSW2
-INPUT_PORTS_END
-
-INPUT_PORTS_START( asurabusa )
-	FUUKI32_INPUTS( IPT_BUTTON4 )
-	FUUKI32_DSW1_LOW
-	PORT_DIPNAME( 0x000c, 0x000c, "Demo Sounds & Music" ) /* SW1:3,4 */
-	PORT_DIPSETTING(      0x000c, "Both On" )
-	PORT_DIPSETTING(      0x0008, "Sounds Off" )
-	PORT_DIPSETTING(      0x0004, "Music Off" )
-	PORT_DIPSETTING(      0x0000, "Both Off" )
-	FUUKI32_DSW1_HIGH
-	FUUKI32_DSW2
 INPUT_PORTS_END


@@ -571,7 +524,7 @@ static struct YMF278B_interface ymf278b_interface =
 static struct YMF262interface ymf262_interface =
 {
 	1,					/* 1 chip */
-	14260547,			/* the FM part of the YMF278B: 33.8688MHz / 2.375, as in MAME 0.143u3 */
+	14318180,			/* X1 ? */
 	{ YAC512_VOL(50,MIXER_PAN_LEFT,50,MIXER_PAN_RIGHT) },	/* channels A and B */
 	{ YAC512_VOL(50,MIXER_PAN_LEFT,50,MIXER_PAN_RIGHT) },	/* channels C and D */
 	{ irqhandler },		/* irq */
@@ -654,50 +607,11 @@ ROM_END


 /***************************************************************************
-                 Asura Buster - Eternal Warriors
+                 Asura Buster - Eternal Warriors (Japan)
 Fuuki, 2000   Consists of a FG-3J MAIN-J mainboard &  FG-3J ROM-J combo
-
-The sets only differ in the program ROMs. "asurabusjr" is a review build
-for the ARCADIA magazine: P1 button 4 pauses the game.
 ***************************************************************************/

 ROM_START( asurabus )
-	ROM_REGION( 0x200000, REGION_CPU1, 0 ) /* M68020 */
-	ROM_LOAD32_BYTE( "uspgm3.u1", 0x000000, 0x80000, CRC(e152cec9) SHA1(af1d93bdabc6732c0ff53972826d67a3753ef785) ) /* hand written labels */
-	ROM_LOAD32_BYTE( "uspgm2.u2", 0x000001, 0x80000, CRC(b19787db) SHA1(3d6757f38f297c1ee89003173567319b5dae8000) )
-	ROM_LOAD32_BYTE( "uspgm1.u3", 0x000002, 0x80000, CRC(6588e51a) SHA1(9ab978c80d8ece447697557c8000be95760306f3) )
-	ROM_LOAD32_BYTE( "uspgm0.u4", 0x000003, 0x80000, CRC(981e6ff1) SHA1(088d26a3cbd2361ffc756c3da8a67b94ae7bbd65) )
-
-	ROM_REGION( 0x090000, REGION_CPU2, 0 ) /* Z80 */
-	ROM_LOAD( "srom.u7", 0x00000, 0x80000, CRC(368da389) SHA1(1423b709da40bf3033c9032c4bd07658f1a969de) )
-	ROM_RELOAD(          0x10000, 0x80000) /* for banks */
-
-	ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "sp01.u13", 0x0000000, 0x400000, CRC(5edea463) SHA1(22a780912f060bae0c9a403a7bfd4d27f25b76e3) )
-	ROM_LOAD( "sp23.u14", 0x0400000, 0x400000, CRC(91b1b0de) SHA1(341367966559ef2027415b673eb0db704680c81f) )
-	ROM_LOAD( "sp45.u15", 0x0800000, 0x400000, CRC(96c69aac) SHA1(cf053523026651427f884b9dd7c095af362dd24e) )
-	ROM_LOAD( "sp67.u16", 0x0c00000, 0x400000, CRC(7c3d83bf) SHA1(7188dd923c6c7eb6aee3323e7ab54aa240c35ea3) )
-	ROM_LOAD( "sp89.u17", 0x1000000, 0x400000, CRC(cb1e14f8) SHA1(941cea1887d7ceb52222adcf1d6913969e6163aa) )
-	ROM_LOAD( "spab.u18", 0x1400000, 0x400000, CRC(e5a4608d) SHA1(b8e39f53e0b7ad1e16ae9c3726597776b404be1c) )
-	ROM_LOAD( "spcd.u19", 0x1800000, 0x400000, CRC(99bfbe32) SHA1(926a8afc4a175874f22f53300e76f59331d3b9ba) )
-	ROM_LOAD( "spef.u20", 0x1c00000, 0x400000, CRC(c9c799cc) SHA1(01373316700d8688deeea2e9e8f831d5f86c7f17) )
-
-	ROM_REGION( 0x0800000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "bg1012.u22", 0x0000000, 0x400000, CRC(e3fb9af0) SHA1(11900cc2873337692f66fb4f1eb9c574e5a967de) )
-	ROM_LOAD( "bg1113.u23", 0x0400000, 0x400000, CRC(5f8657e6) SHA1(7c2854dc5d2d4efe55bda01e329da051350e0031) )
-
-	ROM_REGION( 0x0800000, REGION_GFX3, ROMREGION_DISPOSE )
-	ROM_LOAD( "bg2022.u25", 0x0000000, 0x400000, CRC(f46eda52) SHA1(46530016b32a164bd76c4f53e7b53b2beb28db06) )
-	ROM_LOAD( "bg2123.u24", 0x0400000, 0x400000, CRC(c4ebb86b) SHA1(a7093e6e02b64566d277cbbd5fa90cd430e7c8a0) )
-
-	ROM_REGION( 0x200000, REGION_GFX4, ROMREGION_DISPOSE ) /* background tiles*/
-	ROM_LOAD( "map.u5", 0x00000, 0x200000, CRC(bd179dc5) SHA1(ce3fcac573b14fd5365eb5dcec3257e439d2c129) )
-
-	ROM_REGION( 0x400000, REGION_SOUND1, 0 ) /* OPL4 samples*/
-	ROM_LOAD( "opm.u6", 0x00000, 0x400000, CRC(31b05be4) SHA1(d0f4f387f84a74591224b0f42b7f5c538a3dc498) )
-ROM_END
-
-ROM_START( asurabusj )
 	ROM_REGION( 0x200000, REGION_CPU1, 0 ) /* M68020 */
 	ROM_LOAD32_BYTE( "pgm3.u1", 0x000000, 0x80000, CRC(2c6b5271) SHA1(188371f1f003823ac719e962e048719d76696b2f) )
 	ROM_LOAD32_BYTE( "pgm2.u2", 0x000001, 0x80000, CRC(8f8694ec) SHA1(3334df4aecc5ab2f8914ef6748c027a99b39ce26) )
@@ -733,78 +647,6 @@ ROM_START( asurabusj )
 	ROM_LOAD( "opm.u6", 0x00000, 0x400000, CRC(31b05be4) SHA1(d0f4f387f84a74591224b0f42b7f5c538a3dc498) )
 ROM_END

-ROM_START( asurabusja )
-	ROM_REGION( 0x200000, REGION_CPU1, 0 ) /* M68020 */
-	ROM_LOAD32_BYTE( "pgm3_583a.u1", 0x000000, 0x80000, CRC(46ab3b0e) SHA1(2d6a57352891a484fe11cda9addbff5b3940c17c) ) /* hand written labels with checksums */
-	ROM_LOAD32_BYTE( "pgm2_0ff4.u2", 0x000001, 0x80000, CRC(fa7aa289) SHA1(6f82371274c45f889a19a4fdd859015fb6ea249a) )
-	ROM_LOAD32_BYTE( "pgm1_bac7.u3", 0x000002, 0x80000, CRC(67364e19) SHA1(959b896b201f103ef9189b537139c89bfc7144ea) )
-	ROM_LOAD32_BYTE( "pgm0_193a.u4", 0x000003, 0x80000, CRC(94d39c64) SHA1(95ca2aa3e19e64bed7add3170653fa3364530fde) )
-
-	ROM_REGION( 0x090000, REGION_CPU2, 0 ) /* Z80 */
-	ROM_LOAD( "srom.u7", 0x00000, 0x80000, CRC(368da389) SHA1(1423b709da40bf3033c9032c4bd07658f1a969de) )
-	ROM_RELOAD(          0x10000, 0x80000) /* for banks */
-
-	ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "sp01.u13", 0x0000000, 0x400000, CRC(5edea463) SHA1(22a780912f060bae0c9a403a7bfd4d27f25b76e3) )
-	ROM_LOAD( "sp23.u14", 0x0400000, 0x400000, CRC(91b1b0de) SHA1(341367966559ef2027415b673eb0db704680c81f) )
-	ROM_LOAD( "sp45.u15", 0x0800000, 0x400000, CRC(96c69aac) SHA1(cf053523026651427f884b9dd7c095af362dd24e) )
-	ROM_LOAD( "sp67.u16", 0x0c00000, 0x400000, CRC(7c3d83bf) SHA1(7188dd923c6c7eb6aee3323e7ab54aa240c35ea3) )
-	ROM_LOAD( "sp89.u17", 0x1000000, 0x400000, CRC(cb1e14f8) SHA1(941cea1887d7ceb52222adcf1d6913969e6163aa) )
-	ROM_LOAD( "spab.u18", 0x1400000, 0x400000, CRC(e5a4608d) SHA1(b8e39f53e0b7ad1e16ae9c3726597776b404be1c) )
-	ROM_LOAD( "spcd.u19", 0x1800000, 0x400000, CRC(99bfbe32) SHA1(926a8afc4a175874f22f53300e76f59331d3b9ba) )
-	ROM_LOAD( "spef.u20", 0x1c00000, 0x400000, CRC(c9c799cc) SHA1(01373316700d8688deeea2e9e8f831d5f86c7f17) )
-
-	ROM_REGION( 0x0800000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "bg1012.u22", 0x0000000, 0x400000, CRC(e3fb9af0) SHA1(11900cc2873337692f66fb4f1eb9c574e5a967de) )
-	ROM_LOAD( "bg1113.u23", 0x0400000, 0x400000, CRC(5f8657e6) SHA1(7c2854dc5d2d4efe55bda01e329da051350e0031) )
-
-	ROM_REGION( 0x0800000, REGION_GFX3, ROMREGION_DISPOSE )
-	ROM_LOAD( "bg2022.u25", 0x0000000, 0x400000, CRC(f46eda52) SHA1(46530016b32a164bd76c4f53e7b53b2beb28db06) )
-	ROM_LOAD( "bg2123.u24", 0x0400000, 0x400000, CRC(c4ebb86b) SHA1(a7093e6e02b64566d277cbbd5fa90cd430e7c8a0) )
-
-	ROM_REGION( 0x200000, REGION_GFX4, ROMREGION_DISPOSE ) /* background tiles*/
-	ROM_LOAD( "map.u5", 0x00000, 0x200000, CRC(bd179dc5) SHA1(ce3fcac573b14fd5365eb5dcec3257e439d2c129) )
-
-	ROM_REGION( 0x400000, REGION_SOUND1, 0 ) /* OPL4 samples*/
-	ROM_LOAD( "opm.u6", 0x00000, 0x400000, CRC(31b05be4) SHA1(d0f4f387f84a74591224b0f42b7f5c538a3dc498) )
-ROM_END
-
-ROM_START( asurabusjr ) /* ARCADIA review build */
-	ROM_REGION( 0x200000, REGION_CPU1, 0 ) /* M68020 */
-	ROM_LOAD32_BYTE( "24-31.pgm3", 0x000000, 0x80000, CRC(cfcb9c75) SHA1(51e325d5e60d5bb058429f04a5170dcc17986b7d) )
-	ROM_LOAD32_BYTE( "16-23.pgm2", 0x000001, 0x80000, CRC(e4d07738) SHA1(c6c949c5b0cbc129917bb8c93707539adabbd336) )
-	ROM_LOAD32_BYTE( "8-15.pgm1",  0x000002, 0x80000, CRC(1dd67fe7) SHA1(3fd340ccd4a306783ba0ccd3343ae505c9de3a73) )
-	ROM_LOAD32_BYTE( "0-7.pgm0",   0x000003, 0x80000, CRC(3af08de3) SHA1(1ecc69804693cab6c2c36120acfc6ced094a16e4) )
-
-	ROM_REGION( 0x090000, REGION_CPU2, 0 ) /* Z80 */
-	ROM_LOAD( "srom.u7", 0x00000, 0x80000, CRC(368da389) SHA1(1423b709da40bf3033c9032c4bd07658f1a969de) )
-	ROM_RELOAD(          0x10000, 0x80000) /* for banks */
-
-	ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "sp01.u13", 0x0000000, 0x400000, CRC(5edea463) SHA1(22a780912f060bae0c9a403a7bfd4d27f25b76e3) )
-	ROM_LOAD( "sp23.u14", 0x0400000, 0x400000, CRC(91b1b0de) SHA1(341367966559ef2027415b673eb0db704680c81f) )
-	ROM_LOAD( "sp45.u15", 0x0800000, 0x400000, CRC(96c69aac) SHA1(cf053523026651427f884b9dd7c095af362dd24e) )
-	ROM_LOAD( "sp67.u16", 0x0c00000, 0x400000, CRC(7c3d83bf) SHA1(7188dd923c6c7eb6aee3323e7ab54aa240c35ea3) )
-	ROM_LOAD( "sp89.u17", 0x1000000, 0x400000, CRC(cb1e14f8) SHA1(941cea1887d7ceb52222adcf1d6913969e6163aa) )
-	ROM_LOAD( "spab.u18", 0x1400000, 0x400000, CRC(e5a4608d) SHA1(b8e39f53e0b7ad1e16ae9c3726597776b404be1c) )
-	ROM_LOAD( "spcd.u19", 0x1800000, 0x400000, CRC(99bfbe32) SHA1(926a8afc4a175874f22f53300e76f59331d3b9ba) )
-	ROM_LOAD( "spef.u20", 0x1c00000, 0x400000, CRC(c9c799cc) SHA1(01373316700d8688deeea2e9e8f831d5f86c7f17) )
-
-	ROM_REGION( 0x0800000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "bg1012.u22", 0x0000000, 0x400000, CRC(e3fb9af0) SHA1(11900cc2873337692f66fb4f1eb9c574e5a967de) )
-	ROM_LOAD( "bg1113.u23", 0x0400000, 0x400000, CRC(5f8657e6) SHA1(7c2854dc5d2d4efe55bda01e329da051350e0031) )
-
-	ROM_REGION( 0x0800000, REGION_GFX3, ROMREGION_DISPOSE )
-	ROM_LOAD( "bg2022.u25", 0x0000000, 0x400000, CRC(f46eda52) SHA1(46530016b32a164bd76c4f53e7b53b2beb28db06) )
-	ROM_LOAD( "bg2123.u24", 0x0400000, 0x400000, CRC(c4ebb86b) SHA1(a7093e6e02b64566d277cbbd5fa90cd430e7c8a0) )
-
-	ROM_REGION( 0x200000, REGION_GFX4, ROMREGION_DISPOSE ) /* background tiles*/
-	ROM_LOAD( "map.u5", 0x00000, 0x200000, CRC(bd179dc5) SHA1(ce3fcac573b14fd5365eb5dcec3257e439d2c129) )
-
-	ROM_REGION( 0x400000, REGION_SOUND1, 0 ) /* OPL4 samples*/
-	ROM_LOAD( "opm.u6", 0x00000, 0x400000, CRC(31b05be4) SHA1(d0f4f387f84a74591224b0f42b7f5c538a3dc498) )
-ROM_END
-


 /***************************************************************************
@@ -815,13 +657,5 @@ ROM_END

 ***************************************************************************/

-static DRIVER_INIT( fuuki32 )
-{
-	state_save_register_UINT8("fuuki32", 0, "shared_ram", fuuki32_shared_ram, sizeof(fuuki32_shared_ram));
-}
-
-GAMEX( 1998, asurabld,   0,        fuuki32, asurabld,  fuuki32, ROT0, "Fuuki", "Asura Blade - Sword of Dynasty (Japan)", GAME_IMPERFECT_GRAPHICS )
-GAMEX( 2001, asurabus,   0,        fuuki32, asurabus,  fuuki32, ROT0, "Fuuki", "Asura Buster - Eternal Warriors (USA)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
-GAMEX( 2000, asurabusj,  asurabus, fuuki32, asurabus,  fuuki32, ROT0, "Fuuki", "Asura Buster - Eternal Warriors (Japan, set 1)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
-GAMEX( 2000, asurabusja, asurabus, fuuki32, asurabus,  fuuki32, ROT0, "Fuuki", "Asura Buster - Eternal Warriors (Japan, set 2)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
-GAMEX( 2000, asurabusjr, asurabus, fuuki32, asurabusa, fuuki32, ROT0, "Fuuki", "Asura Buster - Eternal Warriors (Japan) (ARCADIA review build)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
+GAMEX( 1998, asurabld,	0, fuuki32, asurabld, 0, ROT0, "Fuuki", "Asura Blade - Sword of Dynasty", GAME_IMPERFECT_GRAPHICS )
+GAMEX( 2000, asurabus,	0, fuuki32, asurabld, 0, ROT0, "Fuuki", "Asura Buster - Eternal Warriors", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
@@ -1233,525 +1233,6 @@ ROM_START( gngmaidentenh )
 	ROM_LOAD( "mm17maiden.4n", 0x000000, 0x004000, CRC(9fb0faaf) SHA1(903b926b0c22879721fdc8a551c1512dd0773802) )
 ROM_END

-ROM_START( gngprincess )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mm_c_princess_04", 0x04000, 0x004000, CRC(3b6d9dcf) )
-	ROM_LOAD( "mm_c_princess_03", 0x08000, 0x008000, CRC(134db50c) )
-	ROM_LOAD( "mm_c_princess_05", 0x10000, 0x008000, CRC(d7e126e2) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gg17princess.bin", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gg14princess.bin", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincessa )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mjg_04princess.10n", 0x04000, 0x004000, CRC(1299e52b) )
-	ROM_LOAD( "mjg_03princess.8n", 0x08000, 0x008000, CRC(be9d1e56) )
-	ROM_LOAD( "mjg_05princess.12n", 0x10000, 0x008000, CRC(f5eb84e6) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_02.14h", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "capsom_m5m23256p_p_616105_mjg_01p_princess.11e", 0x00000, 0x004000, CRC(4ef3637e) )
-	ROM_IGNORE( 0x004000 )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_08.3e", 0x00000, 0x008000, CRC(c09a716f) )
-	ROM_LOAD( "capsom_m5m23256p_p_61710z_mmg_07.3c", 0x08000, 0x008000, CRC(0b92b129) )
-	ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_06.3b", 0x10000, 0x008000, CRC(830176af) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_12p_princess.4n", 0x00000, 0x008000, CRC(f23401c4) )
-	ROM_LOAD( "capsom_m5m23256p_p_620108_mjg_11p_princess.3n", 0x08000, 0x008000, CRC(1ab10e35) )
-	ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_10p_princess.4l", 0x10000, 0x008000, CRC(3801cb66) )
-	ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_09p_princess.3l", 0x18000, 0x008000, CRC(e9edb4bc) )
-ROM_END
-
-ROM_START( gngprincessaenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mjg_04princess.10n", 0x04000, 0x004000, CRC(1299e52b) )
-	ROM_LOAD( "mjg_03princess.8n", 0x08000, 0x008000, CRC(81cb0d2a) )
-	ROM_LOAD( "mjg_05princess.12n", 0x10000, 0x008000, CRC(2caa03e3) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_02.14h", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "capsom_m5m23256p_p_616105_mjg_01p_princess.11e", 0x00000, 0x004000, CRC(4ef3637e) )
-	ROM_IGNORE( 0x004000 )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_08.3e", 0x00000, 0x008000, CRC(c09a716f) )
-	ROM_LOAD( "capsom_m5m23256p_p_61710z_mmg_07.3c", 0x08000, 0x008000, CRC(0b92b129) )
-	ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_06.3b", 0x10000, 0x008000, CRC(830176af) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_12p_princess.4n", 0x00000, 0x008000, CRC(f23401c4) )
-	ROM_LOAD( "capsom_m5m23256p_p_620108_mjg_11p_princess.3n", 0x08000, 0x008000, CRC(1ab10e35) )
-	ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_10p_princess.4l", 0x10000, 0x008000, CRC(3801cb66) )
-	ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_09p_princess.3l", 0x18000, 0x008000, CRC(e9edb4bc) )
-ROM_END
-
-ROM_START( gngprincessb )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "gg4princess.bin", 0x04000, 0x004000, CRC(1299e52b) )
-	ROM_LOAD( "gg3princess.bin", 0x08000, 0x008000, CRC(be9d1e56) )
-	ROM_LOAD( "gg5princess.bin", 0x10000, 0x008000, CRC(f5eb84e6) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gg17princess.bin", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gg14princess.bin", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincessbenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "gg4princess.bin", 0x04000, 0x004000, CRC(1299e52b) )
-	ROM_LOAD( "gg3princess.bin", 0x08000, 0x008000, CRC(81cb0d2a) )
-	ROM_LOAD( "gg5princess.bin", 0x10000, 0x008000, CRC(2caa03e3) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gg17princess.bin", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gg14princess.bin", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincessc )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "gngprincess.n10", 0x04000, 0x004000, CRC(36e043ad) )
-	ROM_LOAD( "gng.n9", 0x08000, 0x004000, CRC(b6b91cfb) )
-	ROM_LOAD( "gngprincess.n8", 0x0c000, 0x004000, CRC(bd17085c) )
-	ROM_LOAD( "gng.n13", 0x10000, 0x004000, CRC(fd9a8dda) )
-	ROM_LOAD( "gngprincess.n12", 0x14000, 0x004000, CRC(5199ea50) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gg17princess.bin", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gg14princess.bin", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincesscenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "gngprincess.n10", 0x04000, 0x004000, CRC(36e043ad) )
-	ROM_LOAD( "gngprincess.n9", 0x08000, 0x004000, CRC(3632f7f5) )
-	ROM_LOAD( "gngprincess.n8", 0x0c000, 0x004000, CRC(393780fd) )
-	ROM_LOAD( "gng.n13", 0x10000, 0x004000, CRC(fd9a8dda) )
-	ROM_LOAD( "gngprincess.n12", 0x14000, 0x004000, CRC(98ce9232) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gg17princess.bin", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gg14princess.bin", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincessenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mm_c_princess_04", 0x04000, 0x004000, CRC(3b6d9dcf) )
-	ROM_LOAD( "mm_c_princess_03", 0x08000, 0x008000, CRC(a5921aeb) )
-	ROM_LOAD( "mm_c_princess_05", 0x10000, 0x008000, CRC(d1542dec) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gg17princess.bin", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gg14princess.bin", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincesst )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mmt04dprincess.10n", 0x04000, 0x004000, CRC(11dd8836) )
-	ROM_LOAD( "mmt03dprincess.8n", 0x08000, 0x008000, CRC(9ff8665c) )
-	ROM_LOAD( "mmt05dprincess.13n", 0x10000, 0x008000, CRC(7e06e90f) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "mm02.14h", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "mm01princess.11e", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "mm11.3e", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "mm10.1e", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "mm09.3c", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "mm08.1c", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "mm07.3b", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "mm06.1b", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "mm17princess.4n", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "mm16princess.3n", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "mm15princess.1n", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "mm14princess.4l", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "mm13princess.3l", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "mm12princess.1l", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( gngprincesstenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mmt04dprincess.10n", 0x04000, 0x004000, CRC(11dd8836) )
-	ROM_LOAD( "mmt03dprincess.8n", 0x08000, 0x008000, CRC(b57e52d7) )
-	ROM_LOAD( "mmt05dprincess.13n", 0x10000, 0x008000, CRC(e4ee3423) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "mm02.14h", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "mm01princess.11e", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "mm11.3e", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "mm10.1e", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "mm09.3c", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "mm08.1c", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "mm07.3b", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "mm06.1b", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "mm17princess.4n", 0x00000, 0x004000, CRC(e2043162) )
-	ROM_LOAD( "mm16princess.3n", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "mm15princess.1n", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "mm14princess.4l", 0x0c000, 0x004000, CRC(19847a61) )
-	ROM_LOAD( "mm13princess.3l", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "mm12princess.1l", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincess )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "10nprincess.rom", 0x04000, 0x004000, CRC(49dc2d12) )
-	ROM_LOAD( "8nprincess.rom", 0x08000, 0x008000, CRC(ff005be0) )
-	ROM_LOAD( "12nprincess.rom", 0x10000, 0x008000, CRC(7c2064ca) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gng13princess.n4", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gng16princess.l4", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincessb )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mj04bprincess.10n", 0x04000, 0x004000, CRC(3084ed7d) )
-	ROM_LOAD( "mj03bprincess.8n", 0x08000, 0x008000, CRC(b80cae7a) )
-	ROM_LOAD( "mj05bprincess.12n", 0x10000, 0x008000, CRC(6f8d3556) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "mm02.14h", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "mj01princess.11e", 0x00000, 0x004000, CRC(824ae0fc) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "mm11.3e", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "mm10.1e", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "mm09.3c", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "mm08.1c", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "mm07.3b", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "mm06.1b", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "mj17princess.4n", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "mj16princess.3n", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "mj15princess.1n", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "mj14princess.4l", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "mj13princess.3l", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "mj12princess.1l", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincessbenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mj04bprincess.10n", 0x04000, 0x004000, CRC(3084ed7d) )
-	ROM_LOAD( "mj03bprincess.8n", 0x08000, 0x008000, CRC(de44ac2d) )
-	ROM_LOAD( "mj05bprincess.12n", 0x10000, 0x008000, CRC(7aefa8a0) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "mm02.14h", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "mj01princess.11e", 0x00000, 0x004000, CRC(824ae0fc) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "mm11.3e", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "mm10.1e", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "mm09.3c", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "mm08.1c", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "mm07.3b", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "mm06.1b", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "mj17princess.4n", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "mj16princess.3n", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "mj15princess.1n", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "mj14princess.4l", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "mj13princess.3l", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "mj12princess.1l", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincessc )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mj04cprincess.bin", 0x04000, 0x004000, CRC(daada743) )
-	ROM_LOAD( "mj03cprincess.bin", 0x08000, 0x008000, CRC(7d0909cf) )
-	ROM_LOAD( "mj05cprincess.bin", 0x10000, 0x008000, CRC(0c9ed2e0) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gng13princess.n4", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gng16princess.l4", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincesscenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mj04cprincess.bin", 0x04000, 0x004000, CRC(daada743) )
-	ROM_LOAD( "mj03cprincess.bin", 0x08000, 0x008000, CRC(16fe9d4a) )
-	ROM_LOAD( "mj05cprincess.bin", 0x10000, 0x008000, CRC(0547b319) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gng13princess.n4", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gng16princess.l4", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincessenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "10nprincess.rom", 0x04000, 0x004000, CRC(49dc2d12) )
-	ROM_LOAD( "8nprincess.rom", 0x08000, 0x008000, CRC(b526a64b) )
-	ROM_LOAD( "12nprincess.rom", 0x10000, 0x008000, CRC(1abdbe3e) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gng13princess.n4", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gng16princess.l4", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincessg )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mj04gprincess.bin", 0x04000, 0x004000, CRC(bd45de21) )
-	ROM_LOAD( "mj03gprincess.bin", 0x08000, 0x008000, CRC(e6bbe084) )
-	ROM_LOAD( "mj05gprincess.bin", 0x10000, 0x008000, CRC(cd6ce99c) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gng13princess.n4", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gng16princess.l4", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-ROM_START( makprincessgenh )
-	ROM_REGION( 0x18000, REGION_CPU1, 0 )
-	ROM_LOAD( "mj04gprincess.bin", 0x04000, 0x004000, CRC(bd45de21) )
-	ROM_LOAD( "mj03gprincess.bin", 0x08000, 0x008000, CRC(20b5aeeb) )
-	ROM_LOAD( "mj05gprincess.bin", 0x10000, 0x008000, CRC(21288a1b) )
-
-	ROM_REGION( 0x10000, REGION_CPU2, 0 )
-	ROM_LOAD( "gg2.bin", 0x000000, 0x008000, CRC(615f5b6f) )
-
-	ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg1princess.bin", 0x00000, 0x004000, CRC(7935494f) )
-
-	ROM_REGION( 0x18000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD( "gg11.bin", 0x00000, 0x004000, CRC(ddd56fa9) )
-	ROM_LOAD( "gg10.bin", 0x04000, 0x004000, CRC(7302529d) )
-	ROM_LOAD( "gg9.bin", 0x08000, 0x004000, CRC(20035bda) )
-	ROM_LOAD( "gg8.bin", 0x0c000, 0x004000, CRC(f12ba271) )
-	ROM_LOAD( "gg7.bin", 0x10000, 0x004000, CRC(e525207d) )
-	ROM_LOAD( "gg6.bin", 0x14000, 0x004000, CRC(2d77e9b2) )
-
-	ROM_REGION( 0x20000, REGION_GFX3, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
-	ROM_LOAD( "gng13princess.n4", 0x00000, 0x004000, CRC(07c9138a) )
-	ROM_LOAD( "gg16princess.bin", 0x04000, 0x004000, CRC(1ad1d899) )
-	ROM_LOAD( "gg15princess.bin", 0x08000, 0x004000, CRC(439d6e7b) )
-	ROM_LOAD( "gng16princess.l4", 0x0c000, 0x004000, CRC(3cc87995) )
-	ROM_LOAD( "gg13princess.bin", 0x10000, 0x004000, CRC(05e0c809) )
-	ROM_LOAD( "gg12princess.bin", 0x14000, 0x004000, CRC(28fe68a2) )
-ROM_END
-
-
 ROM_START( gngknight )
 	ROM_REGION( 0x18000, REGION_CPU1, 0 )
 	ROM_LOAD( "mm_c_knight_03", 0x08000, 0x008000, CRC(57f4f653) SHA1(7fce045ccffd4274edb75ebd726e42c2cb797dcb) )
@@ -2541,25 +2022,6 @@ GAME( 2026, gngmaidenc, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Gobl
 GAME( 2026, gngmaidencenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Maiden Artoria Edition (Enhanced) (World? 4)" )
 GAME( 2026, gngmaident, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Maiden Artoria Edition (US)" )
 GAME( 2026, gngmaidentenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Maiden Artoria Edition (Enhanced) (US)" )
-GAME( 2026, gngprincess, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (World? 1)" )
-GAME( 2026, gngprincessa, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (World? 2)" )
-GAME( 2026, gngprincessaenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (Enhanced) (World? 2)" )
-GAME( 2026, gngprincessb, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (World? 3)" )
-GAME( 2026, gngprincessbenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (Enhanced) (World? 3)" )
-GAME( 2026, gngprincessc, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (World? 4)" )
-GAME( 2026, gngprincesscenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (Enhanced) (World? 4)" )
-GAME( 2026, gngprincessenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (Enhanced) (World? 1)" )
-GAME( 2026, gngprincesst, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (US)" )
-GAME( 2026, gngprincesstenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Princess Prin Prin Edition (Enhanced) (US)" )
-GAME( 2026, makprincess, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition" )
-GAME( 2026, makprincessb, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Japan revision B)" )
-GAME( 2026, makprincessbenh, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Enhanced) (Japan revision B)" )
-GAME( 2026, makprincessc, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Japan revision C)" )
-GAME( 2026, makprincesscenh, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Enhanced) (Japan revision C)" )
-GAME( 2026, makprincessenh, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Enhanced)" )
-GAME( 2026, makprincessg, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Japan revision G)" )
-GAME( 2026, makprincessgenh, gng, gng, makaimur, 0, ROT0, "GoodLuckTrying", "Makaimura - Princess Prin Prin Edition (Enhanced) (Japan revision G)" )
-
 GAME( 2026, gngknight, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Knight Artoria Edition (World? 1)" )
 GAME( 2026, gngknightenh, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Knight Artoria Edition (Enhanced) (World? 1)" )
 GAME( 2026, gngknighta, gng, gng, gng, 0, ROT0, "GoodLuckTrying", "Ghosts'n Goblins - Knight Artoria Edition (World? 2)" )
@@ -137,7 +137,7 @@ READ_HANDLER( PC3259_2_r )
 	}
 	if( grchamp_collision&2 )
 	{
-		result = mame_rand_int()&0xff; /* OBJECT crash*/
+		result = rand()&0xff; /* OBJECT crash*/
 	}
 	return result;
 }
@@ -190,10 +190,10 @@ static READ_HANDLER ( hitme_port_0_r )
 {
 	if ((timer_get_time() - timeout_time) > (timeout_counter * tock))
 	{
-		return input_port_0_r (offset) - ((mame_rand_int()%2) << 2) - 0x80;
+		return input_port_0_r (offset) - ((rand()%2) << 2) - 0x80;
 	}
 	else
-		return input_port_0_r (offset) - ((mame_rand_int()%2) << 2);
+		return input_port_0_r (offset) - ((rand()%2) << 2);
 }

 static READ_HANDLER ( hitme_port_1_r )
@@ -210,10 +210,10 @@ static READ_HANDLER ( hitme_port_2_r )
 {
 	if ((timer_get_time() - timeout_time) > (timeout_counter * tock))
 	{
-		return input_port_2_r (offset) - ((mame_rand_int()%2) << 2) - 0x80;
+		return input_port_2_r (offset) - ((rand()%2) << 2) - 0x80;
 	}
 	else
-		return input_port_2_r (offset) - ((mame_rand_int()%2) << 2);
+		return input_port_2_r (offset) - ((rand()%2) << 2);
 }

 static READ_HANDLER ( hitme_port_3_r )
@@ -75,8 +75,6 @@ TODO:

 VIDEO_UPDATE( inufuku );
 VIDEO_START( inufuku );
-void dunk_buffer_sprites(void);
-int inufuku_is_dunk;

 data16_t *inufuku_bg_videoram;
 data16_t *inufuku_bg_rasterram;
@@ -106,19 +104,17 @@ static WRITE16_HANDLER( inufuku_soundcommand_w )
 	if (ACCESSING_LSB) {

 		/* hack... sound doesn't work otherwise */
-		if (!inufuku_is_dunk && data == 0x08) return;
+		if (data == 0x08) return;

 		pending_command = 1;
 		soundlatch_w(0, data & 0xff);
-		cpu_set_irq_line(1, IRQ_LINE_NMI, inufuku_is_dunk ? ASSERT_LINE : PULSE_LINE);
+		cpu_set_irq_line(1, IRQ_LINE_NMI, PULSE_LINE);
 	}
 }

 static WRITE_HANDLER( pending_command_clear_w )
 {
 	pending_command = 0;
-	if (inufuku_is_dunk)
-		cpu_set_irq_line(1, IRQ_LINE_NMI, CLEAR_LINE);
 }

 static WRITE_HANDLER( inufuku_soundrombank_w )
@@ -137,27 +133,15 @@ static WRITE_HANDLER( inufuku_soundrombank_w )

 static MACHINE_INIT( inufuku )
 {
-	if (inufuku_is_dunk)
-	{
-		pending_command = 0;
-		inufuku_soundrombank_w(0, 0);
-		cpu_set_irq_line(1, IRQ_LINE_NMI, CLEAR_LINE);
-	}
+	;
 }

 static DRIVER_INIT( inufuku )
 {
-	inufuku_is_dunk = 0;
 	pending_command = 1;
 	inufuku_soundrombank_w(0, 0);
 }

-static DRIVER_INIT( dunk )
-{
-	inufuku_is_dunk = 1;
-	pending_command = 0;
-	inufuku_soundrombank_w(0, 0);
-}

 /******************************************************************************

@@ -239,50 +223,6 @@ static MEMORY_WRITE16_START( inufuku_writemem )
 	{ 0xfd0000, 0xfdffff, MWA16_RAM },				/* work ram*/
 MEMORY_END

-static MEMORY_READ16_START( dunk_readmem )
-	{ 0x000000, 0x0fffff, MRA16_ROM },				/* main rom*/
-
-	{ 0x180000, 0x180001, input_port_0_word_r },
-	{ 0x180002, 0x180003, input_port_1_word_r },
-	{ 0x180004, 0x180005, input_port_2_word_r },
-	{ 0x180006, 0x180007, input_port_3_word_r },
-	{ 0x180008, 0x180009, inufuku_eeprom_r },		/* eeprom + input_port_4_word_r*/
-	{ 0x18000a, 0x18000b, input_port_5_word_r },
-
-	{ 0x300000, 0x301fff, MRA16_RAM },				/* palette ram*/
-	{ 0x400000, 0x401fff, inufuku_bg_videoram_r },	/* bg ram*/
-	{ 0x402000, 0x403fff, inufuku_text_videoram_r },/* text ram*/
-	{ 0x404000, 0x40ffff, MRA16_RAM },
-	{ 0x580000, 0x581fff, MRA16_RAM },				/* sprite table + sprite attribute*/
-	{ 0x600000, 0x61ffff, MRA16_RAM },				/* cell table*/
-
-	{ 0x800000, 0xbfffff, MRA16_ROM },				/* data rom*/
-	{ 0xfd0000, 0xfdffff, MRA16_RAM },				/* work ram*/
-MEMORY_END
-
-static MEMORY_WRITE16_START( dunk_writemem )
-	{ 0x000000, 0x0fffff, MWA16_ROM },				/* main rom*/
-
-	{ 0x100000, 0x100007, MWA16_NOP },				/* ?*/
-	{ 0x200000, 0x200001, inufuku_eeprom_w },		/* eeprom*/
-	{ 0x280000, 0x280001, inufuku_soundcommand_w },	/* sound command*/
-
-	{ 0x300000, 0x301fff, paletteram16_xGGGGGBBBBBRRRRR_word_w, &paletteram16 },		/* palette ram*/
-	{ 0x380000, 0x3801ff, MWA16_RAM, &inufuku_bg_rasterram },							/* bg raster ram*/
-	{ 0x400000, 0x401fff, inufuku_bg_videoram_w, &inufuku_bg_videoram },				/* bg ram*/
-	{ 0x402000, 0x403fff, inufuku_text_videoram_w, &inufuku_text_videoram },			/* text ram*/
-	{ 0x404000, 0x40ffff, MWA16_RAM },
-	{ 0x580000, 0x581fff, MWA16_RAM, &inufuku_spriteram1, &inufuku_spriteram1_size },	/* sprite table + sprite attribute*/
-	{ 0x600000, 0x61ffff, MWA16_RAM, &inufuku_spriteram2 },								/* cell table*/
-
-	{ 0x780000, 0x780013, inufuku_palettereg_w },	/* bg & text palettebank register*/
-	{ 0x7a0000, 0x7a0023, inufuku_scrollreg_w },	/* bg & text scroll register*/
-	{ 0x7e0000, 0x7e0001, MWA16_NOP },				/* ?*/
-
-	{ 0x800000, 0xbfffff, MWA16_ROM },				/* data rom*/
-	{ 0xfd0000, 0xfdffff, MWA16_RAM },				/* work ram*/
-MEMORY_END
-

 /******************************************************************************

@@ -389,70 +329,6 @@ INPUT_PORTS_START( inufuku )
 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4        | IPF_PLAYER3 )
 INPUT_PORTS_END

-INPUT_PORTS_START( dunk )
-	PORT_START	/* 0*/
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER1 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER1 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER1 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 )
-	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER1 )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER1 )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER1 )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4        | IPF_PLAYER1 )
-
-	PORT_START	/* 1*/
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER2 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER2 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER2 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER2 )
-	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER2 )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER2 )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER2 )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4        | IPF_PLAYER2 )
-
-	PORT_START	/* 2*/
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
-	PORT_SERVICE_NO_TOGGLE( 0x10, IP_ACTIVE_LOW )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START	/* 3*/
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER4 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER4 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER4 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER4 )
-	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER4 )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER4 )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER4 )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4        | IPF_PLAYER4 )
-
-	PORT_START	/* 4*/
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN4 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START4 )
-	PORT_DIPNAME( 0x10, 0x10, "3P/4P" )
-	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )	/* pending sound command*/
-	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
-	PORT_START	/* 5*/
-	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_PLAYER3 )
-	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_PLAYER3 )
-	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_PLAYER3 )
-	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER3 )
-	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1        | IPF_PLAYER3 )
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2        | IPF_PLAYER3 )
-	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3        | IPF_PLAYER3 )
-	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4        | IPF_PLAYER3 )
-INPUT_PORTS_END

 /******************************************************************************

@@ -484,19 +360,6 @@ static struct GfxLayout spritelayout =
 	128*8
 };

-static struct GfxLayout dunk_spritelayout =
-{
-	16, 16,
-	RGN_FRAC(1, 1),
-	4,
-	{ 0, 1, 2, 3 },
-	{ 1*4, 0*4, 3*4, 2*4, 5*4, 4*4, 7*4, 6*4,
-		9*4, 8*4, 11*4, 10*4, 13*4, 12*4, 15*4, 14*4 },
-	{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
-			8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
-	128*8
-};
-
 static struct GfxDecodeInfo inufuku_gfxdecodeinfo[] =
 {
 	{ REGION_GFX1, 0, &tilelayout,    0, 256*16 },	/* bg*/
@@ -505,14 +368,6 @@ static struct GfxDecodeInfo inufuku_gfxdecodeinfo[] =
 	{ -1 } /* end of array */
 };

-static struct GfxDecodeInfo dunk_gfxdecodeinfo[] =
-{
-	{ REGION_GFX1, 0, &tilelayout,    0, 256*16 },	// bg
-	{ REGION_GFX2, 0, &tilelayout,    0, 256*16 },	// text
-	{ REGION_GFX3, 0, &dunk_spritelayout,  0, 256*16 },	// sprite
-	{ -1 } /* end of array */
-};
-

 /******************************************************************************

@@ -580,62 +435,6 @@ static MACHINE_DRIVER_START( inufuku )
 MACHINE_DRIVER_END


-static INTERRUPT_GEN( dunk_interrupt )
-{
-	/* Latch the completed list before the IRQ lets the main CPU rewrite it. */
-	dunk_buffer_sprites();
-	irq1_line_hold();
-}
-
-static struct YM2610interface dunk_ym2610_interface =
-{
-	1,
-	32000000/4,							/* 8.00 MHz */
-	{ 50 },
-	{ 0 },
-	{ 0 },
-	{ 0 },
-	{ 0 },
-	{ irqhandler },
-	{ REGION_SOUND2 },
-	{ REGION_SOUND1 },
-	{ YM3012_VOL(25, MIXER_PAN_CENTER, 25, MIXER_PAN_CENTER) }
-};
-
-
-static MACHINE_DRIVER_START( dunk )
-
-	/* basic machine hardware */
-	MDRV_CPU_ADD(M68000, 32000000/2)	/* 16.00 MHz */
-	MDRV_CPU_MEMORY(dunk_readmem, dunk_writemem)
-	MDRV_CPU_VBLANK_INT(dunk_interrupt, 1)
-
-	MDRV_CPU_ADD(Z80, 32000000/4)		/* 8.00 MHz */
-	MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
-	MDRV_CPU_MEMORY(inufuku_readmem_sound, inufuku_writemem_sound)
-	MDRV_CPU_PORTS(inufuku_readport_sound, inufuku_writeport_sound)
-								/* IRQs are triggered by the YM2610 */
-	MDRV_FRAMES_PER_SECOND(60)
-	MDRV_VBLANK_DURATION(2300)
-
-	MDRV_MACHINE_INIT(inufuku)
-	MDRV_NVRAM_HANDLER(93C46)
-
-	/* video hardware */
-	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
-	MDRV_SCREEN_SIZE(2048, 256)
-	MDRV_VISIBLE_AREA(0, 319, 0, 223)
-	MDRV_GFXDECODE(dunk_gfxdecodeinfo)
-	MDRV_PALETTE_LENGTH(4096)
-
-	MDRV_VIDEO_START(inufuku)
-	MDRV_VIDEO_UPDATE(inufuku)
-
-	/* sound hardware */
-	MDRV_SOUND_ADD(YM2610, dunk_ym2610_interface)
-MACHINE_DRIVER_END
-
-
 /******************************************************************************

 	ROM definitions
@@ -667,36 +466,6 @@ ROM_START( inufuku )
 	ROM_LOAD( "lhmn5ku6.u53", 0x0000000, 0x400000, CRC(b320c5c9) SHA1(7c99da2d85597a3c008ed61a3aa5f47ad36186ec) )
 ROM_END

-ROM_START( 3on3dunk )
-	ROM_REGION( 0x0c00000, REGION_CPU1, 0 )
-	ROM_LOAD16_WORD_SWAP( "prog0_2_4_usa.u147", 0x0000000, 0x080000, CRC(957924ab) SHA1(6fe8ca711d11239310d58188e9d6d28cd27bc5af) )
-	ROM_LOAD16_WORD_SWAP( "prog1_2_4_usa.u146", 0x0080000, 0x080000, CRC(2479e236) SHA1(729e6c85d34d6925c8d6557b138e2bed43e1de6a) )
-	ROM_LOAD16_WORD_SWAP( "lh535l5y.u148",      0x0800000, 0x400000, CRC(aa33e02a) SHA1(86381ecf18fba9065cbc02112751c435bbf8b8b4) )
-
-	ROM_REGION( 0x0030000, REGION_CPU2, 0 )
-	ROM_LOAD( "sound_prog_97_1_13.u107", 0x0000000, 0x020000, CRC(d9d42805) SHA1(ab5cb7c141d9c9ed5121ba4dbc1d0fa187bd9f68) )
-	ROM_RELOAD( 0x010000, 0x020000 )
-
-	ROM_REGION( 0x0400000, REGION_GFX1, ROMREGION_DISPOSE )
-	ROM_LOAD16_WORD_SWAP( "lh525kwy.u40", 0x0000000, 0x400000, CRC(aaa426d1) SHA1(2f9a2981f336caf3188baec9a34f61452dee2203) )
-
-	ROM_REGION( 0x0400000, REGION_GFX2, ROMREGION_DISPOSE )
-	ROM_LOAD16_WORD_SWAP( "lh537nn4.u8",  0x0000000, 0x200000, CRC(2b7be1d8) SHA1(aac274a8f4028db7429478601a1761e61ab4f9a2) )
-
-	ROM_REGION( 0x2000000, REGION_GFX3, ROMREGION_DISPOSE )
-	ROM_LOAD( "lh535kwz.u34", 0x0000000, 0x400000, CRC(7372ce78) SHA1(ed2a861986357fad7ef983750cd906c3d722b862) )
-	ROM_LOAD( "lh535kv0.u36", 0x0400000, 0x400000, CRC(247e5741) SHA1(8d71d964791fb4b86e390bcdf7744f616d6357b1) )
-	ROM_LOAD( "lh535kv2.u38", 0x0800000, 0x400000, CRC(76449b1e) SHA1(b63d50c6f0dc91dc94dbcdda9842598529c1c26e) )
-	ROM_LOAD( "lh537nn5.u20", 0x0c00000, 0x200000, CRC(f457cd3b) SHA1(cc13f5dc44e4675c1074a365b10f34e684817d81) )
-	ROM_LOAD( "lh536pnm.u32", 0x1000000, 0x400000, CRC(bc39e449) SHA1(5aea90b66ee03c70797ddc42dbcb064d83ce8cc7) )
-
-	ROM_REGION( 0x0400000, REGION_SOUND1, 0 )
-	ROM_LOAD( "lh5388r1.u53", 0x0000000, 0x100000, CRC(765d892f) SHA1(9b078c879d0437d1669bf4301fd52a768aa4d293) )
-
-	ROM_REGION( 0x0400000, REGION_SOUND2, 0 )
-	ROM_LOAD( "lh536pkl.u51", 0x0000000, 0x300000, CRC(e4919abf) SHA1(d6af4b9c6ff62f92216c9927027d3b2376416bae) )
-ROM_END
-

 /******************************************************************************

@@ -704,5 +473,4 @@ ROM_END

 ******************************************************************************/

-GAMEX( 1998, inufuku,  0, inufuku, inufuku, inufuku, ROT0, "Video System Co.", "Quiz and Variety Sukusuku Inufuku (Japan)", GAME_NO_COCKTAIL )
-GAMEX( 1996, 3on3dunk, 0, dunk,    dunk,    dunk,    ROT0, "Video System Co.", "3 On 3 Dunk Madness (US, prototype? 1997/02/04)", GAME_NO_COCKTAIL | GAME_IMPERFECT_GRAPHICS )
+GAMEX( 1998, inufuku, 0, inufuku, inufuku, inufuku, ROT0, "Video System Co.", "Quiz and Variety Sukusuku Inufuku (Japan)", GAME_NO_COCKTAIL )
@@ -571,7 +571,7 @@ static NVRAM_HANDLER( itech32 )
 		mame_fread(file, main_ram, main_ram_size);
 	else
 		for (i = 0x80; i < main_ram_size; i++)
-			((UINT8 *)main_ram)[i] = mame_rand_int();
+			((UINT8 *)main_ram)[i] = rand();
 }


@@ -585,7 +585,7 @@ static NVRAM_HANDLER( itech020 )
 		mame_fread(file, nvram, nvram_size);
 	else
 		for (i = 0; i < nvram_size; i++)
-			((UINT8 *)nvram)[i] = mame_rand_int();
+			((UINT8 *)nvram)[i] = rand();
 }


@@ -616,7 +616,7 @@ static NVRAM_HANDLER( itech8 )
 		mame_fread(file, main_ram, main_ram_size);
 	else
 		for (i = 0; i < main_ram_size; i++)
-			main_ram[i] = mame_rand_int();
+			main_ram[i] = rand();
 }


@@ -37,9 +37,9 @@ static READ_HANDLER( kopunch_in_r )
 {
 	/* port 31 + low 3 bits of port 32 contain the punch strength */
 	if (offset == 0)
-		return mame_rand_int();
+		return rand();
 	else
-		return (mame_rand_int() & 0x07) | input_port_1_r(0);
+		return (rand() & 0x07) | input_port_1_r(0);
 }

 static WRITE_HANDLER( kopunch_lamp_w )
@@ -76,7 +76,7 @@ MEMORY_END

 static READ_HANDLER( pip_r )
 {
-	return mame_rand_int();
+	return rand();
 }

 static PORT_READ_START( readport )