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Yeet outdated headers

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M4xw committed 2026-09-29 15:42:00 +02:00
1 parent ddf8d06fe3
commit b5e1c6fc3f
6 files changed
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src/device/r4300/new_dynarec/arm/asm_defines_gas.h
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#define offsetof_struct_device_r4300 (0x00000000)
#define offsetof_struct_r4300_core_cp0 (0x029014dc)
#define offsetof_struct_cp0_last_addr (0x00000194)
#define offsetof_struct_cp0_count_per_op (0x00000198)
#define offsetof_struct_cp0_tlb (0x000001a0)
#define offsetof_struct_tlb_entries (0x00000000)
#define offsetof_struct_tlb_LUT_r (0x00000680)
#define offsetof_struct_tlb_LUT_w (0x00400680)
#define offsetof_struct_r4300_core_cached_interp (0x00000098)
#define offsetof_struct_cached_interp_invalid_code (0x00000000)
#define offsetof_struct_r4300_core_new_dynarec_hot_state (0x02501000)
#define offsetof_struct_r4300_core_extra_memory (0x00501000)
#define offsetof_struct_new_dynarec_hot_state_dynarec_local (0x00000000)
#define offsetof_struct_new_dynarec_hot_state_cycle_count (0x00000040)
#define offsetof_struct_new_dynarec_hot_state_pending_exception (0x00000044)
#define offsetof_struct_new_dynarec_hot_state_pcaddr (0x00000048)
#define offsetof_struct_new_dynarec_hot_state_stop (0x0000004c)
#define offsetof_struct_new_dynarec_hot_state_invc_ptr (0x00000050)
#define offsetof_struct_new_dynarec_hot_state_cp1_fcr0 (0x0000006c)
#define offsetof_struct_new_dynarec_hot_state_cp1_fcr31 (0x00000070)
#define offsetof_struct_new_dynarec_hot_state_regs (0x00000078)
#define offsetof_struct_new_dynarec_hot_state_hi (0x00000178)
#define offsetof_struct_new_dynarec_hot_state_lo (0x00000180)
#define offsetof_struct_new_dynarec_hot_state_cp0_regs (0x00000188)
#define offsetof_struct_new_dynarec_hot_state_cp1_regs_simple (0x00000210)
#define offsetof_struct_new_dynarec_hot_state_cp1_regs_double (0x00000290)
#define offsetof_struct_new_dynarec_hot_state_rounding_modes (0x00000318)
#define offsetof_struct_new_dynarec_hot_state_branch_target (0x00000328)
#define offsetof_struct_new_dynarec_hot_state_pc (0x0000032c)
#define offsetof_struct_new_dynarec_hot_state_fake_pc (0x00000330)
#define offsetof_struct_new_dynarec_hot_state_rs (0x000003b8)
#define offsetof_struct_new_dynarec_hot_state_rt (0x000003c0)
#define offsetof_struct_new_dynarec_hot_state_rd (0x000003c8)
#define offsetof_struct_new_dynarec_hot_state_mini_ht (0x000003d4)
#define offsetof_struct_new_dynarec_hot_state_memory_map (0x000004d4)
src/device/r4300/new_dynarec/arm/asm_defines_nasm.h
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@@ -1,35 +0,0 @@
%define offsetof_struct_device_r4300 (0x00000000)
%define offsetof_struct_r4300_core_cp0 (0x029014dc)
%define offsetof_struct_cp0_last_addr (0x00000194)
%define offsetof_struct_cp0_count_per_op (0x00000198)
%define offsetof_struct_cp0_tlb (0x000001a0)
%define offsetof_struct_tlb_entries (0x00000000)
%define offsetof_struct_tlb_LUT_r (0x00000680)
%define offsetof_struct_tlb_LUT_w (0x00400680)
%define offsetof_struct_r4300_core_cached_interp (0x00000098)
%define offsetof_struct_cached_interp_invalid_code (0x00000000)
%define offsetof_struct_r4300_core_new_dynarec_hot_state (0x02501000)
%define offsetof_struct_r4300_core_extra_memory (0x00501000)
%define offsetof_struct_new_dynarec_hot_state_dynarec_local (0x00000000)
%define offsetof_struct_new_dynarec_hot_state_cycle_count (0x00000040)
%define offsetof_struct_new_dynarec_hot_state_pending_exception (0x00000044)
%define offsetof_struct_new_dynarec_hot_state_pcaddr (0x00000048)
%define offsetof_struct_new_dynarec_hot_state_stop (0x0000004c)
%define offsetof_struct_new_dynarec_hot_state_invc_ptr (0x00000050)
%define offsetof_struct_new_dynarec_hot_state_cp1_fcr0 (0x0000006c)
%define offsetof_struct_new_dynarec_hot_state_cp1_fcr31 (0x00000070)
%define offsetof_struct_new_dynarec_hot_state_regs (0x00000078)
%define offsetof_struct_new_dynarec_hot_state_hi (0x00000178)
%define offsetof_struct_new_dynarec_hot_state_lo (0x00000180)
%define offsetof_struct_new_dynarec_hot_state_cp0_regs (0x00000188)
%define offsetof_struct_new_dynarec_hot_state_cp1_regs_simple (0x00000210)
%define offsetof_struct_new_dynarec_hot_state_cp1_regs_double (0x00000290)
%define offsetof_struct_new_dynarec_hot_state_rounding_modes (0x00000318)
%define offsetof_struct_new_dynarec_hot_state_branch_target (0x00000328)
%define offsetof_struct_new_dynarec_hot_state_pc (0x0000032c)
%define offsetof_struct_new_dynarec_hot_state_fake_pc (0x00000330)
%define offsetof_struct_new_dynarec_hot_state_rs (0x000003b8)
%define offsetof_struct_new_dynarec_hot_state_rt (0x000003c0)
%define offsetof_struct_new_dynarec_hot_state_rd (0x000003c8)
%define offsetof_struct_new_dynarec_hot_state_mini_ht (0x000003d4)
%define offsetof_struct_new_dynarec_hot_state_memory_map (0x000004d4)
src/device/r4300/new_dynarec/x64/asm_defines_gas.h
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@@ -1,35 +0,0 @@
#define offsetof_struct_device_r4300 (0x00000000)
#define offsetof_struct_r4300_core_cp0 (0x031017f8)
#define offsetof_struct_cp0_last_addr (0x000002a8)
#define offsetof_struct_cp0_count_per_op (0x000002ac)
#define offsetof_struct_cp0_tlb (0x000002b4)
#define offsetof_struct_tlb_entries (0x00000000)
#define offsetof_struct_tlb_LUT_r (0x00000680)
#define offsetof_struct_tlb_LUT_w (0x00400680)
#define offsetof_struct_r4300_core_cached_interp (0x000000f0)
#define offsetof_struct_cached_interp_invalid_code (0x00000000)
#define offsetof_struct_r4300_core_new_dynarec_hot_state (0x02901000)
#define offsetof_struct_r4300_core_extra_memory (0x00901000)
#define offsetof_struct_new_dynarec_hot_state_dynarec_local (0x00000000)
#define offsetof_struct_new_dynarec_hot_state_cycle_count (0x00000100)
#define offsetof_struct_new_dynarec_hot_state_pending_exception (0x00000104)
#define offsetof_struct_new_dynarec_hot_state_pcaddr (0x00000108)
#define offsetof_struct_new_dynarec_hot_state_stop (0x0000010c)
#define offsetof_struct_new_dynarec_hot_state_invc_ptr (0x00000110)
#define offsetof_struct_new_dynarec_hot_state_cp1_fcr0 (0x00000134)
#define offsetof_struct_new_dynarec_hot_state_cp1_fcr31 (0x00000138)
#define offsetof_struct_new_dynarec_hot_state_regs (0x00000140)
#define offsetof_struct_new_dynarec_hot_state_hi (0x00000240)
#define offsetof_struct_new_dynarec_hot_state_lo (0x00000248)
#define offsetof_struct_new_dynarec_hot_state_cp0_regs (0x00000250)
#define offsetof_struct_new_dynarec_hot_state_cp1_regs_simple (0x000002d8)
#define offsetof_struct_new_dynarec_hot_state_cp1_regs_double (0x000003d8)
#define offsetof_struct_new_dynarec_hot_state_rounding_modes (0x000004e0)
#define offsetof_struct_new_dynarec_hot_state_branch_target (0x000004f0)
#define offsetof_struct_new_dynarec_hot_state_pc (0x000004f8)
#define offsetof_struct_new_dynarec_hot_state_fake_pc (0x00000500)
#define offsetof_struct_new_dynarec_hot_state_rs (0x000005d0)
#define offsetof_struct_new_dynarec_hot_state_rt (0x000005d8)
#define offsetof_struct_new_dynarec_hot_state_rd (0x000005e0)
#define offsetof_struct_new_dynarec_hot_state_mini_ht (0x000005f0)
#define offsetof_struct_new_dynarec_hot_state_memory_map (0x000007f0)
src/device/r4300/new_dynarec/x64/asm_defines_nasm.h
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@@ -1,35 +0,0 @@
%define offsetof_struct_device_r4300 (0x00000000)
%define offsetof_struct_r4300_core_cp0 (0x031017f8)
%define offsetof_struct_cp0_last_addr (0x000002a8)
%define offsetof_struct_cp0_count_per_op (0x000002ac)
%define offsetof_struct_cp0_tlb (0x000002b4)
%define offsetof_struct_tlb_entries (0x00000000)
%define offsetof_struct_tlb_LUT_r (0x00000680)
%define offsetof_struct_tlb_LUT_w (0x00400680)
%define offsetof_struct_r4300_core_cached_interp (0x000000f0)
%define offsetof_struct_cached_interp_invalid_code (0x00000000)
%define offsetof_struct_r4300_core_new_dynarec_hot_state (0x02901000)
%define offsetof_struct_r4300_core_extra_memory (0x00901000)
%define offsetof_struct_new_dynarec_hot_state_dynarec_local (0x00000000)
%define offsetof_struct_new_dynarec_hot_state_cycle_count (0x00000100)
%define offsetof_struct_new_dynarec_hot_state_pending_exception (0x00000104)
%define offsetof_struct_new_dynarec_hot_state_pcaddr (0x00000108)
%define offsetof_struct_new_dynarec_hot_state_stop (0x0000010c)
%define offsetof_struct_new_dynarec_hot_state_invc_ptr (0x00000110)
%define offsetof_struct_new_dynarec_hot_state_cp1_fcr0 (0x00000134)
%define offsetof_struct_new_dynarec_hot_state_cp1_fcr31 (0x00000138)
%define offsetof_struct_new_dynarec_hot_state_regs (0x00000140)
%define offsetof_struct_new_dynarec_hot_state_hi (0x00000240)
%define offsetof_struct_new_dynarec_hot_state_lo (0x00000248)
%define offsetof_struct_new_dynarec_hot_state_cp0_regs (0x00000250)
%define offsetof_struct_new_dynarec_hot_state_cp1_regs_simple (0x000002d8)
%define offsetof_struct_new_dynarec_hot_state_cp1_regs_double (0x000003d8)
%define offsetof_struct_new_dynarec_hot_state_rounding_modes (0x000004e0)
%define offsetof_struct_new_dynarec_hot_state_branch_target (0x000004f0)
%define offsetof_struct_new_dynarec_hot_state_pc (0x000004f8)
%define offsetof_struct_new_dynarec_hot_state_fake_pc (0x00000500)
%define offsetof_struct_new_dynarec_hot_state_rs (0x000005d0)
%define offsetof_struct_new_dynarec_hot_state_rt (0x000005d8)
%define offsetof_struct_new_dynarec_hot_state_rd (0x000005e0)
%define offsetof_struct_new_dynarec_hot_state_mini_ht (0x000005f0)
%define offsetof_struct_new_dynarec_hot_state_memory_map (0x000007f0)
src/device/r4300/new_dynarec/x86/asm_defines_gas.h
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@@ -1,35 +0,0 @@
#define offsetof_struct_device_r4300 (0x00000000)
#define offsetof_struct_r4300_core_cp0 (0x029014d0)
#define offsetof_struct_cp0_last_addr (0x00000194)
#define offsetof_struct_cp0_count_per_op (0x00000198)
#define offsetof_struct_cp0_tlb (0x000001a0)
#define offsetof_struct_tlb_entries (0x00000000)
#define offsetof_struct_tlb_LUT_r (0x00000680)
#define offsetof_struct_tlb_LUT_w (0x00400680)
#define offsetof_struct_r4300_core_cached_interp (0x00000098)
#define offsetof_struct_cached_interp_invalid_code (0x00000000)
#define offsetof_struct_r4300_core_new_dynarec_hot_state (0x02501000)
#define offsetof_struct_r4300_core_extra_memory (0x00501000)
#define offsetof_struct_new_dynarec_hot_state_dynarec_local (0x00000000)
#define offsetof_struct_new_dynarec_hot_state_cycle_count (0x00000040)
#define offsetof_struct_new_dynarec_hot_state_pending_exception (0x00000044)
#define offsetof_struct_new_dynarec_hot_state_pcaddr (0x00000048)
#define offsetof_struct_new_dynarec_hot_state_stop (0x0000004c)
#define offsetof_struct_new_dynarec_hot_state_invc_ptr (0x00000050)
#define offsetof_struct_new_dynarec_hot_state_cp1_fcr0 (0x0000006c)
#define offsetof_struct_new_dynarec_hot_state_cp1_fcr31 (0x00000070)
#define offsetof_struct_new_dynarec_hot_state_regs (0x00000074)
#define offsetof_struct_new_dynarec_hot_state_hi (0x00000174)
#define offsetof_struct_new_dynarec_hot_state_lo (0x0000017c)
#define offsetof_struct_new_dynarec_hot_state_cp0_regs (0x00000184)
#define offsetof_struct_new_dynarec_hot_state_cp1_regs_simple (0x0000020c)
#define offsetof_struct_new_dynarec_hot_state_cp1_regs_double (0x0000028c)
#define offsetof_struct_new_dynarec_hot_state_rounding_modes (0x00000314)
#define offsetof_struct_new_dynarec_hot_state_branch_target (0x00000324)
#define offsetof_struct_new_dynarec_hot_state_pc (0x00000328)
#define offsetof_struct_new_dynarec_hot_state_fake_pc (0x0000032c)
#define offsetof_struct_new_dynarec_hot_state_rs (0x000003b0)
#define offsetof_struct_new_dynarec_hot_state_rt (0x000003b8)
#define offsetof_struct_new_dynarec_hot_state_rd (0x000003c0)
#define offsetof_struct_new_dynarec_hot_state_mini_ht (0x000003cc)
#define offsetof_struct_new_dynarec_hot_state_memory_map (0x000004cc)
src/device/r4300/new_dynarec/x86/asm_defines_nasm.h
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@@ -1,35 +0,0 @@
%define offsetof_struct_device_r4300 (0x00000000)
%define offsetof_struct_r4300_core_cp0 (0x029014d0)
%define offsetof_struct_cp0_last_addr (0x00000194)
%define offsetof_struct_cp0_count_per_op (0x00000198)
%define offsetof_struct_cp0_tlb (0x000001a0)
%define offsetof_struct_tlb_entries (0x00000000)
%define offsetof_struct_tlb_LUT_r (0x00000680)
%define offsetof_struct_tlb_LUT_w (0x00400680)
%define offsetof_struct_r4300_core_cached_interp (0x00000098)
%define offsetof_struct_cached_interp_invalid_code (0x00000000)
%define offsetof_struct_r4300_core_new_dynarec_hot_state (0x02501000)
%define offsetof_struct_r4300_core_extra_memory (0x00501000)
%define offsetof_struct_new_dynarec_hot_state_dynarec_local (0x00000000)
%define offsetof_struct_new_dynarec_hot_state_cycle_count (0x00000040)
%define offsetof_struct_new_dynarec_hot_state_pending_exception (0x00000044)
%define offsetof_struct_new_dynarec_hot_state_pcaddr (0x00000048)
%define offsetof_struct_new_dynarec_hot_state_stop (0x0000004c)
%define offsetof_struct_new_dynarec_hot_state_invc_ptr (0x00000050)
%define offsetof_struct_new_dynarec_hot_state_cp1_fcr0 (0x0000006c)
%define offsetof_struct_new_dynarec_hot_state_cp1_fcr31 (0x00000070)
%define offsetof_struct_new_dynarec_hot_state_regs (0x00000074)
%define offsetof_struct_new_dynarec_hot_state_hi (0x00000174)
%define offsetof_struct_new_dynarec_hot_state_lo (0x0000017c)
%define offsetof_struct_new_dynarec_hot_state_cp0_regs (0x00000184)
%define offsetof_struct_new_dynarec_hot_state_cp1_regs_simple (0x0000020c)
%define offsetof_struct_new_dynarec_hot_state_cp1_regs_double (0x0000028c)
%define offsetof_struct_new_dynarec_hot_state_rounding_modes (0x00000314)
%define offsetof_struct_new_dynarec_hot_state_branch_target (0x00000324)
%define offsetof_struct_new_dynarec_hot_state_pc (0x00000328)
%define offsetof_struct_new_dynarec_hot_state_fake_pc (0x0000032c)
%define offsetof_struct_new_dynarec_hot_state_rs (0x000003b0)
%define offsetof_struct_new_dynarec_hot_state_rt (0x000003b8)
%define offsetof_struct_new_dynarec_hot_state_rd (0x000003c0)
%define offsetof_struct_new_dynarec_hot_state_mini_ht (0x000003cc)
%define offsetof_struct_new_dynarec_hot_state_memory_map (0x000004cc)