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Simplify armjit.

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This commit is contained in:
Sacha 2013-03-26 02:41:15 +10:00
parent 85e94798cb
commit 471ddd6380
4 changed files with 38 additions and 39 deletions
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30
Common/ArmEmitter.cpp
View File

@ -100,6 +100,21 @@ void ARMXEmitter::MOVI2F(ARMReg dest, float val, ARMReg tempReg)
// Otherwise, use a literal pool and VLDR directly (+- 1020)
}
void ARMXEmitter::ADDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
{
Operand2 op2;
bool negated;
if (TryMakeOperand2_AllowNegation(val, op2, &negated)) {
if (!negated)
ADD(rd, rs, op2);
else
SUB(rd, rs, op2);
} else {
MOVI2R(scratch, val);
ADD(rd, rs, scratch);
}
}
void ARMXEmitter::ANDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
{
Operand2 op2;
@ -116,6 +131,21 @@ void ARMXEmitter::ANDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
}
}
void ARMXEmitter::CMPI2R(ARMReg rs, u32 val, ARMReg scratch)
{
Operand2 op2;
bool negated;
if (TryMakeOperand2_AllowNegation(val, op2, &negated)) {
if (!negated)
CMP(rs, op2);
else
CMN(rs, op2);
} else {
MOVI2R(scratch, val);
CMP(rs, scratch);
}
}
void ARMXEmitter::ORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch)
{
Operand2 op2;

2
Common/ArmEmitter.h
View File

@ -558,7 +558,9 @@ public:
void MOVI2R(ARMReg reg, u32 val, bool optimize = true);
void MOVI2F(ARMReg dest, float val, ARMReg tempReg);
void ADDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);
void ANDI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);
void CMPI2R(ARMReg rs, u32 val, ARMReg scratch);
void ORI2R(ARMReg rd, ARMReg rs, u32 val, ARMReg scratch);

36
Core/MIPS/ARM/ArmCompALU.cpp
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@ -84,17 +84,7 @@ namespace MIPSComp
gpr.SetImm(rt, gpr.GetImm(rs) + simm);
} else {
gpr.MapDirtyIn(rt, rs);
Operand2 op2;
bool negated;
if (TryMakeOperand2_AllowNegation(simm, op2, &negated)) {
if (!negated)
ADD(gpr.R(rt), gpr.R(rs), op2);
else
SUB(gpr.R(rt), gpr.R(rs), op2);
} else {
MOVI2R(R0, (u32)simm);
ADD(gpr.R(rt), gpr.R(rs), R0);
}
ADDI2R(gpr.R(rt), gpr.R(rs), simm, R0);
}
break;
}
@ -106,17 +96,7 @@ namespace MIPSComp
case 10: // R(rt) = (s32)R(rs) < simm; break; //slti
{
gpr.MapDirtyIn(rt, rs);
Operand2 op2;
bool negated;
if (TryMakeOperand2_AllowNegation(simm, op2, &negated)) {
if (!negated)
CMP(gpr.R(rs), op2);
else
CMN(gpr.R(rs), op2);
} else {
MOVI2R(R0, simm);
CMP(gpr.R(rs), R0);
}
CMPI2R(gpr.R(rs), simm, R0);
SetCC(CC_LT);
MOVI2R(gpr.R(rt), 1);
SetCC(CC_GE);
@ -128,17 +108,7 @@ namespace MIPSComp
case 11: // R(rt) = R(rs) < uimm; break; //sltiu
{
gpr.MapDirtyIn(rt, rs);
Operand2 op2;
bool negated;
if (TryMakeOperand2_AllowNegation(suimm, op2, &negated)) {
if (!negated)
CMP(gpr.R(rs), op2);
else
CMN(gpr.R(rs), op2);
} else {
MOVI2R(R0, suimm);
CMP(gpr.R(rs), R0);
}
CMPI2R(gpr.R(rs), suimm, R0);
SetCC(CC_LO);
MOVI2R(gpr.R(rt), 1);
SetCC(CC_HS);

9
Core/MIPS/ARM/ArmCompVFPU.cpp
View File

@ -582,13 +582,11 @@ namespace MIPSComp
DISABLE;
break;
case 16: // d[i] = 1.0f / s[i]; break; //vrcp
MOVI2R(R0, 0x3F800000); // 1.0f
VMOV(S0, R0);
MOVI2F(S0, 1.0f, R0);
VDIV(tempxregs[i], S0, fpr.V(sregs[i]));
break;
case 17: // d[i] = 1.0f / sqrtf(s[i]); break; //vrsq
MOVI2R(R0, 0x3F800000); // 1.0f
VMOV(S0, R0);
MOVI2F(S0, 1.0f, R0);
VSQRT(S1, fpr.V(sregs[i]));
VDIV(tempxregs[i], S0, S1);
break;
@ -612,8 +610,7 @@ namespace MIPSComp
DISABLE;
break;
case 24: // d[i] = -1.0f / s[i]; break; // vnrcp
MOVI2R(R0, 0x80000000 | 0x3F800000); // -1.0f
VMOV(S0, R0);
MOVI2F(S0, -1.0f, R0);
VDIV(tempxregs[i], S0, fpr.V(sregs[i]));
break;
case 26: // d[i] = -sinf((float)M_PI_2 * s[i]); break; // vnsin